| commit | 51dde6fe3b2fec59fd42f36fd025ac09910a3764 | |
| author | Martin Roth <martin.roth@se-eng.com> | |
| Mon, 8 Dec 2014 05:11:54 +0000 (7 22:11 -0700) | ||
| committer | Martin Roth <gaumless@gmail.com> | |
| Mon, 15 Dec 2014 23:42:13 +0000 (16 00:42 +0100) | ||
| tree | 1bd23caabc9aa084f8eda1689ce013c20a91e919 | treesnapshot (tar.gz zip) |
| parent | cdb61a6f5d2268b059ac56da3b69ad0313f3fb90 | commitdiff |
inteltool: Start adding Bay Trail
- Add silvermont (Bay Trail core) MSRs - these are shared with
rangeley/avoton.
- Add GPIO values and GPIO muxing information.
- Add Bay Trail to the PM list.
Still to do:
- Northbridge functionality (RCBA, Memory timings, etc.)
- Add Graphics registers
Change-Id: I9fe0c0f1efe5f4344aeb3bad3f13037555109060
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7711
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
- Add silvermont (Bay Trail core) MSRs - these are shared with
rangeley/avoton.
- Add GPIO values and GPIO muxing information.
- Add Bay Trail to the PM list.
Still to do:
- Northbridge functionality (RCBA, Memory timings, etc.)
- Add Graphics registers
Change-Id: I9fe0c0f1efe5f4344aeb3bad3f13037555109060
Signed-off-by: Martin Roth <martin.roth@se-eng.com>
Reviewed-on: http://review.coreboot.org/7711
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>