| commit | 507064b835df517723bdc2e06c47322c3d626bf4 | |
| author | Raul E Rangel <rrangel@chromium.org> | |
| Fri, 11 Feb 2022 16:48:58 +0000 (11 09:48 -0700) | ||
| committer | Felix Held <felix-coreboot@felixheld.de> | |
| Sat, 12 Feb 2022 18:44:43 +0000 (12 18:44 +0000) | ||
| tree | 319e85164a34e79e11be633ac4e713228bdb2c0a | treesnapshot (tar.gz zip) |
| parent | d8cf72f7e68dcbfc69f2d2acaa82260cdbed46ab | commitdiff |
soc/amd/cezanne/psp_verstage/uart: Fix off by 1 error
FCH_UART_ID_MAX == 2, and there are 2 UARTS, so we don't need the -1.
BUG=b:215599230
TEST=Build guybrush
Found-by: Coverity CID 1469611
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I5f0171ed2d3da7f86ba3cfd0457f60d2d5722625
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61869
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
FCH_UART_ID_MAX == 2, and there are 2 UARTS, so we don't need the -1.
BUG=b:215599230
TEST=Build guybrush
Found-by: Coverity CID 1469611
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I5f0171ed2d3da7f86ba3cfd0457f60d2d5722625
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61869
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/soc/amd/cezanne/psp_verstage/uart.c | diffblobblamehistory |