| commit | 4b9fa2d6ea6107cf0c94b116dfffa553075fcded | |
| author | Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> | |
| Fri, 13 Mar 2020 07:54:30 +0000 (13 00:54 -0700) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Sun, 15 Mar 2020 12:54:40 +0000 (15 12:54 +0000) | ||
| tree | 14a76e06dbd8d2871e500b88c92786969b915a3b | treesnapshot (tar.gz zip) |
| parent | 1db5bc7dac2bb592708f26dede339ffdf3246567 | commitdiff |
soc/intel/tigerlake: Update Cpu Ratio settings
Add config to override CpuRatio or setting CpuRatio to
allowed maximum processor non-turbo ratio.
BUG=151175469
BRANCH=none
TEST=Build and boot tglrvp and observe there is no extra reset
in meminit.
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I2fa883b443d0a4c77d62275faeacd1ed2c67a97c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39493
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Add config to override CpuRatio or setting CpuRatio to
allowed maximum processor non-turbo ratio.
BUG=151175469
BRANCH=none
TEST=Build and boot tglrvp and observe there is no extra reset
in meminit.
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I2fa883b443d0a4c77d62275faeacd1ed2c67a97c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39493
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Reviewed-by: Caveh Jalali <caveh@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/soc/intel/tigerlake/chip.h | diffblobblamehistory | |
| src/soc/intel/tigerlake/romstage/fsp_params_tgl.c | diffblobblamehistory |