| commit | 49fc4e3e434afdcdc543b34cc60c9462ec08facf | |
| author | Nico Huber <nico.h@gmx.de> | |
| Wed, 17 Aug 2022 19:57:46 +0000 (17 21:57 +0200) | ||
| committer | Felix Held <felix-coreboot@felixheld.de> | |
| Mon, 29 Aug 2022 14:24:19 +0000 (29 14:24 +0000) | ||
| tree | 0cf9ac98537254e9a8bbf898192fd9f9a9955843 | treesnapshot (tar.gz zip) |
| parent | 39564922a56feb18c85da8748bfb0f55b9fa1eeb | commitdiff |
pciexp: Move PCI path check one level up to pciexp_enable_ltr()
If we have a PCIe root port without `ops_pci` or without
`get_ltr_max_latencies`, the parent device wouldn't be PCI.
Hence, check for a PCI path early.
Change-Id: I358cb6756750bb10d0a23ab7133b917bfa25988b
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66845
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
If we have a PCIe root port without `ops_pci` or without
`get_ltr_max_latencies`, the parent device wouldn't be PCI.
Hence, check for a PCI path early.
Change-Id: I358cb6756750bb10d0a23ab7133b917bfa25988b
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66845
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
| src/device/pciexp_device.c | diffblobblamehistory |