| commit | 46575fb1d4f00e0d1e69e9ad38acb4c1e4b38711 | |
| author | Naresh G Solanki <naresh.solanki@intel.com> | |
| Thu, 27 Oct 2016 15:48:25 +0000 (27 21:18 +0530) | ||
| committer | Aaron Durbin <adurbin@chromium.org> | |
| Thu, 3 Nov 2016 16:45:39 +0000 (3 17:45 +0100) | ||
| tree | 677084da5a42cf6a8cad962bef0c36d83e34ee29 | treesnapshot (tar.gz zip) |
| parent | cebf64592702185be0eba4e4b44f1a9c258751fc | commitdiff |
mainboard/intel/kblrvp: Update onboard memory specific configs
1. Update dq, dqs map & Rcomp strength & Rcomp target.
2. Fix rvp3.spd.hex byte 2 to 0x0F(JEDEC LPDDR3 memory type).
Change-Id: I7efc3499b915d1e414cfe914830232993ef10ba2
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/17162
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
1. Update dq, dqs map & Rcomp strength & Rcomp target.
2. Fix rvp3.spd.hex byte 2 to 0x0F(JEDEC LPDDR3 memory type).
Change-Id: I7efc3499b915d1e414cfe914830232993ef10ba2
Signed-off-by: Naresh G Solanki <naresh.solanki@intel.com>
Reviewed-on: https://review.coreboot.org/17162
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
| src/mainboard/intel/kblrvp/spd/rvp3.spd.hex | diffblobblamehistory | |
| src/mainboard/intel/kblrvp/spd/spd_util.c | diffblobblamehistory |