| commit | 43e93d7df900ec3925812b903bd29677a9ed6f08 | |
| author | Angel Pons <th3fanbus@gmail.com> | |
| Fri, 11 Dec 2020 15:48:10 +0000 (11 16:48 +0100) | ||
| committer | Hung-Te Lin <hungte@chromium.org> | |
| Mon, 14 Dec 2020 08:18:06 +0000 (14 08:18 +0000) | ||
| tree | 8a978ebaabecf5fd6b3696d1ce78f2af80b171a6 | treesnapshot (tar.gz zip) |
| parent | f0fd6aeecd74da20967817b66e1074bbb201372b | commitdiff |
soc/intel/alderlake: Drop unreferenced devicetree settings
No mainboard uses these settings, nor does SoC code. Drop them.
Change-Id: Ib4cf88a482f840edf16e2ac42e6ab61eccfba0aa
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
No mainboard uses these settings, nor does SoC code. Drop them.
Change-Id: Ib4cf88a482f840edf16e2ac42e6ab61eccfba0aa
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48566
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
| src/soc/intel/alderlake/chip.h | diffblobblamehistory |