| commit | 42a6f7e417f64a475f6e2b54ea59ee0a733a9c79 | |
| author | Arthur Heymans <arthur@aheymans.xyz> | |
| Tue, 10 Nov 2020 15:46:18 +0000 (10 16:46 +0100) | ||
| committer | Hung-Te Lin <hungte@chromium.org> | |
| Mon, 28 Dec 2020 13:39:23 +0000 (28 13:39 +0000) | ||
| tree | 8d21e58d01cbda59faaa2e8a87634987d92c55eb | treesnapshot (tar.gz zip) |
| parent | b0ab41e0279e47d3bb09d6cddc803686859e6985 | commitdiff |
soc/intel/xeon_sp: Lock down DMI3 PCI registers
This is required for CBnT.
Change-Id: If5637eb8dd7de406b24b92100b68c5fa11c16854
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This is required for CBnT.
Change-Id: If5637eb8dd7de406b24b92100b68c5fa11c16854
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47448
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
| src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h | diffblobblamehistory | |
| src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h | diffblobblamehistory | |
| src/soc/intel/xeon_sp/uncore.c | diffblobblamehistory |