| commit | 42315688b582d26c6bd5a9e80b0f848959955ed6 | |
| author | Arthur Heymans <arthur@aheymans.xyz> | |
| Fri, 5 May 2017 22:28:12 +0000 (6 00:28 +0200) | ||
| committer | Martin Roth <martinroth@google.com> | |
| Wed, 12 Jul 2017 17:38:45 +0000 (12 17:38 +0000) | ||
| tree | 90df5e433ad9aaa75f94cc15400a095bb2fd5900 | treesnapshot (tar.gz zip) |
| parent | 1440c66b16a6c5a1fb4bfaa9511edfeea3f88c18 | commitdiff |
mb/asus/p5gc-mx: Implement resume from S3 support
Needs the ramstage configuration enabling of SuperIO GPIO pnp devices
for BSEL straps.
Also needs VSBGATE# to be on for ram to be powered during S3.
TESTED with 800MHz and 1067MHz FSB CPUs at the correct straps when
resuming from S3.
Change-Id: I6ac927ee9dcce15fc7621aad57969fae8f5805ca
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19602
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Needs the ramstage configuration enabling of SuperIO GPIO pnp devices
for BSEL straps.
Also needs VSBGATE# to be on for ram to be powered during S3.
TESTED with 800MHz and 1067MHz FSB CPUs at the correct straps when
resuming from S3.
Change-Id: I6ac927ee9dcce15fc7621aad57969fae8f5805ca
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19602
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| src/mainboard/asus/p5gc-mx/Kconfig | diffblobblamehistory | |
| src/mainboard/asus/p5gc-mx/devicetree.cb | diffblobblamehistory | |
| src/mainboard/asus/p5gc-mx/romstage.c | diffblobblamehistory |