| commit | 41aab355c18f81f4788d64f8083f721d455f2a4d | |
| author | Subrata Banik <subrata.banik@intel.com> | |
| Mon, 13 Apr 2020 06:53:07 +0000 (13 12:23 +0530) | ||
| committer | Subrata Banik <subrata.banik@intel.com> | |
| Sat, 23 May 2020 07:34:30 +0000 (23 07:34 +0000) | ||
| tree | 9a08d5cceec8a2c55b9a86789e83cd10693a356b | treesnapshot (tar.gz zip) |
| parent | ebf1daa001025377dd1f34ecbfe42b224109ba1f | commitdiff |
soc/intel/common/block: Update SA resource length to support 64 bit
This patch provides an option for accommodating 64 bit width resource
request with CONFIG_PCI_SEGMENT_GROUPS = 16 refer as PCIEX BAR length 4096MB
(Bus 0-4095).
Change-Id: I9a8448af7e9f26c8e0176e58e4fe253a6e77b69a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40336
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This patch provides an option for accommodating 64 bit width resource
request with CONFIG_PCI_SEGMENT_GROUPS = 16 refer as PCIEX BAR length 4096MB
(Bus 0-4095).
Change-Id: I9a8448af7e9f26c8e0176e58e4fe253a6e77b69a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40336
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/soc/intel/common/block/include/intelblocks/systemagent.h | diffblobblamehistory |