| commit | 407d552e0c642da601a88283676ee885402e81c4 | |
| author | Jonathan Zhang <jonzhang@fb.com> | |
| Thu, 1 Oct 2020 21:20:41 +0000 (1 14:20 -0700) | ||
| committer | Angel Pons <th3fanbus@gmail.com> | |
| Thu, 8 Oct 2020 12:04:45 +0000 (8 12:04 +0000) | ||
| tree | eeef89028fa15250d0bba3f24a0384d4813573cb | treesnapshot (tar.gz zip) |
| parent | 86b3bf10e60c137b01b81a37ce9827757f6af42d | commitdiff |
vc/intel/fsp/fsp2_0/CPX-SP: update to Intel ww40 release
Intel CPX-SP FSP ww40 release adds MeUmaEnable FSP-M parameter,
and adds some fields to HOBs.
Update FspmUpd.h and HOB header files.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I3d456be62a5feecdac267c1e8be52e2a25e8aac3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45940
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Intel CPX-SP FSP ww40 release adds MeUmaEnable FSP-M parameter,
and adds some fields to HOBs.
Update FspmUpd.h and HOB header files.
Signed-off-by: Jonathan Zhang <jonzhang@fb.com>
Change-Id: I3d456be62a5feecdac267c1e8be52e2a25e8aac3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45940
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>