| commit | 396035114149f92d69b1ebe3ecb661ba59181e7f | |
| author | Huayang Duan <huayang.duan@mediatek.com> | |
| Tue, 23 Jun 2020 03:25:41 +0000 (23 11:25 +0800) | ||
| committer | Hung-Te Lin <hungte@chromium.org> | |
| Mon, 28 Dec 2020 13:38:20 +0000 (28 13:38 +0000) | ||
| tree | 102aeb9268d3c16a66e6e201c47ff4a504266c20 | treesnapshot (tar.gz zip) |
| parent | 32ed65611d796d507dd004d9a2d97d38b3c2ce7e | commitdiff |
soc/mediatek/mt8192: Do dramc pre-settings before calibration
Before calibration, dramc resets the delay of each PHY IO, calculates
TX path and sets CKE to be rank independent.
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: I071eca037f89a916d6cfaf5b008d64f2b4a269a9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Before calibration, dramc resets the delay of each PHY IO, calculates
TX path and sets CKE to be rank independent.
Signed-off-by: Huayang Duan <huayang.duan@mediatek.com>
Change-Id: I071eca037f89a916d6cfaf5b008d64f2b4a269a9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
| src/soc/mediatek/mt8192/dramc_pi_basic_api.c | diffblobblamehistory | |
| src/soc/mediatek/mt8192/emi.c | diffblobblamehistory |