| commit | 33cd957866ca8d8c7d86b7cfa50f926c40e8d540 | |
| author | Subrata Banik <subrata.banik@intel.com> | |
| Tue, 8 Dec 2020 07:13:47 +0000 (8 12:43 +0530) | ||
| committer | Subrata Banik <subrata.banik@intel.com> | |
| Sat, 12 Dec 2020 04:03:48 +0000 (12 04:03 +0000) | ||
| tree | 70039f4ce34196f1f12eab8f9b372aff641b40b0 | treesnapshot (tar.gz zip) |
| parent | f880eb061bf44101c65487bd74384a1ddcecce5e | commitdiff |
mb/intel/adlrvp: Make CLKSRC and CLKREQ proper for PCIE RP8
1. Make CLKSRC -> 7 and CLKREQ -> 6
2. CLK 6 is using free running CLK
3. Make LAN CLK 7 as unused as GbE is disable
TEST=Able to detect PCIE SD card on 0x1 slot.
Change-Id: I7fbde9492a0c59fc76931bfb7c9522d4f208ebb0
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48449
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
1. Make CLKSRC -> 7 and CLKREQ -> 6
2. CLK 6 is using free running CLK
3. Make LAN CLK 7 as unused as GbE is disable
TEST=Able to detect PCIE SD card on 0x1 slot.
Change-Id: I7fbde9492a0c59fc76931bfb7c9522d4f208ebb0
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48449
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/mainboard/intel/adlrvp/devicetree.cb | diffblobblamehistory |