| commit | 2d324cafd84c18256221894fd14954a80e52f43a | |
| author | V Sowmya <v.sowmya@intel.com> | |
| Wed, 26 Dec 2018 09:10:12 +0000 (26 14:40 +0530) | ||
| committer | Subrata Banik <subrata.banik@intel.com> | |
| Mon, 31 Dec 2018 06:13:41 +0000 (31 06:13 +0000) | ||
| tree | 212c5ea963302dd194cbaa2bddd05cd80a2609bd | treesnapshot (tar.gz zip) |
| parent | 3f3d6b3e270ad457526ae56babb01e2101d407a5 | commitdiff |
mb/google/hatch: Enable NVME support for Hatch
This patch enables the x4 NVME device for hatch,
* Enable the Root port 9.
* Assign the usage type for clock source.
* Configure the GPIO for CLK SRC 1.
BUG=b:120914069
BRANCH=none
TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot.
Change-Id: I69be6b21a5ae5962877a5c38180b5ffac532fed4
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/30431
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This patch enables the x4 NVME device for hatch,
* Enable the Root port 9.
* Assign the usage type for clock source.
* Configure the GPIO for CLK SRC 1.
BUG=b:120914069
BRANCH=none
TEST=USE="-intel_mrc -bmpblk" emerge-hatch coreboot.
Change-Id: I69be6b21a5ae5962877a5c38180b5ffac532fed4
Signed-off-by: V Sowmya <v.sowmya@intel.com>
Reviewed-on: https://review.coreboot.org/c/30431
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| src/mainboard/google/hatch/variants/baseboard/devicetree.cb | diffblobblamehistory | |
| src/mainboard/google/hatch/variants/baseboard/gpio.c | diffblobblamehistory |