soc/intel/cannonlake: Export function to set After G3 state
commit26bc3282f6ed8f4cc54b06df180fa47d3e646cab
authorDuncan Laurie <dlaurie@google.com>
Wed, 23 Jan 2019 22:58:23 +0000 (23 14:58 -0800)
committerPatrick Georgi <pgeorgi@google.com>
Fri, 25 Jan 2019 11:22:22 +0000 (25 11:22 +0000)
tree65fd6c6c2db8c08fb32f62d503fdc3e370bc00bd
parent52b5b587f1bc5d23d20959f1cae664038d6a42ea
soc/intel/cannonlake: Export function to set After G3 state

Export the SOC level function to set the After G3 state so it
can be changed by the mainboard.  The setting will be restored
by a normal boot but in some circumstances coreboot wants to
ensure that it will be powered up again after a reset.

BUG=b:121380403
TEST=update cr50 firmware on sarien and reboot and ensure the
host does not power off after the cr50 initiated reset.

Change-Id: I6cd572ac91229584b9907f87bb4b340963203c32
Signed-off-by: Duncan Laurie <dlaurie@google.com>
Reviewed-on: https://review.coreboot.org/c/31056
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
src/soc/intel/cannonlake/include/soc/pmc.h
src/soc/intel/cannonlake/pmc.c