| commit | 1f21a96c842c285308fd0b433a578ce101483aa1 | |
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | |
| Wed, 10 Jul 2019 11:15:54 +0000 (10 13:15 +0200) | ||
| committer | Martin Roth <martinroth@google.com> | |
| Thu, 11 Jul 2019 15:14:06 +0000 (11 15:14 +0000) | ||
| tree | 670d53d31be99ee8ce68536a80b265f23bfc7b7c | treesnapshot (tar.gz zip) |
| parent | badbcde5425b587fe23f8bd6ce02c740913fdd1d | commitdiff |
mb/siemens/{mc_apl1,...,mc_apl5}: Reduce eMMC bus speed mode
We need to reduce the eMMC bus speed for these Apollo Lake mainboards
because of a limitation on Intel side for industry use cases.
Change-Id: Ide6a1a302001c0752d149bfdab175a27c8f8cc35
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34196
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
We need to reduce the eMMC bus speed for these Apollo Lake mainboards
because of a limitation on Intel side for industry use cases.
Change-Id: Ide6a1a302001c0752d149bfdab175a27c8f8cc35
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34196
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>