soc/intel: Enable TME based on supported CPU SKU and config option
commit1e71fe107a001d8947dabd733ce0076fd80bc56f
authorSubrata Banik <subratabanik@google.com>
Mon, 15 Aug 2022 10:10:59 +0000 (15 15:40 +0530)
committerMartin L Roth <gaumless@gmail.com>
Sun, 21 Aug 2022 15:02:31 +0000 (21 15:02 +0000)
treef7278183ab01384322e5a9276c26c6020d982d97
parent28f1729f157924f37e0a875898404d36fb7a9954
soc/intel: Enable TME based on supported CPU SKU and config option

This patch removes the static kconfig being used to fill in TME enable
FSP UPD. Instead use`is_tme_supported()` and `CONFIG(INTEL_TME)` to check
if the CPU has required TME support rather than hardcoding.

TEST=FSP debug log shows `TmeEnable` UPD is set appropriately for the
TME-supported CPU SKUs.

As per FSP-M debug log:

Without this CL, Alder Lake-P CPU SKU without TME support:
[SPEW ]   TmeEnable = 0x1

With this CL, Alder Lake-P CPU SKU without TME support:
[SPEW ]   TmeEnable = 0x0

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I8aa2922baaf2a49e6e2762d31eaffa7bdcd43b0a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66750
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
src/soc/intel/alderlake/romstage/fsp_params.c
src/soc/intel/meteorlake/romstage/fsp_params.c
src/soc/intel/tigerlake/romstage/fsp_params.c