| commit | 14cb828f4fd818c4d9d1bcf80db9e5a9fc2df19f | |
| author | Lijian Zhao <lijian.zhao@intel.com> | |
| Thu, 12 Oct 2017 23:55:54 +0000 (12 16:55 -0700) | ||
| committer | Aaron Durbin <adurbin@chromium.org> | |
| Mon, 16 Oct 2017 15:23:37 +0000 (16 15:23 +0000) | ||
| tree | 913dc1f29c1cd979da8bca72306d77ffdb937a9b | treesnapshot (tar.gz zip) |
| parent | 776b5ba017dfbe2df363381b7c58aad12518c805 | commitdiff |
intel/cannonlake_rvp: Modify memory parameters to support LP4 board
Replace the support for Cannonlake U DDR4 board to Cannonlake U LPDDR4
platform.
TEST=Able to boot up on CNL U LPDDR RVP.
Change-Id: I2a3dd39875705dcb93a60ceba7c143e3e5328148
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/22001
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Replace the support for Cannonlake U DDR4 board to Cannonlake U LPDDR4
platform.
TEST=Able to boot up on CNL U LPDDR RVP.
Change-Id: I2a3dd39875705dcb93a60ceba7c143e3e5328148
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/22001
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
| src/mainboard/intel/cannonlake_rvp/romstage.c | diffblobblamehistory | |
| src/mainboard/intel/cannonlake_rvp/spd/spd_util.c | diffblobblamehistory |