| commit | 12d31b2764851f119985192419d2c986b48b54e0 | |
| author | Angel Pons <th3fanbus@gmail.com> | |
| Wed, 16 Jun 2021 10:39:23 +0000 (16 12:39 +0200) | ||
| committer | Werner Zeh <werner.zeh@siemens.com> | |
| Mon, 21 Jun 2021 04:25:51 +0000 (21 04:25 +0000) | ||
| tree | 9e4f08efbaf5fbd39a49978b2b1ba064db2119e6 | treesnapshot (tar.gz zip) |
| parent | 621ed4c06c8c8761e083c550c0edf3c9c66793c9 | commitdiff |
southbridge/amd: Create ACPI MCFG MMCONFIG
These southbridges are paired with MMCONF-enabled northbridges.
Change-Id: I0416de6425bb57471856731ad12ce8194ac98be2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55572
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
These southbridges are paired with MMCONF-enabled northbridges.
Change-Id: I0416de6425bb57471856731ad12ce8194ac98be2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55572
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
| src/southbridge/amd/agesa/hudson/lpc.c | diffblobblamehistory | |
| src/southbridge/amd/cimx/sb800/late.c | diffblobblamehistory |