| commit | 0e0f9e51c4c4f190cbe7ef5bffa138601c644d3c | |
| author | Robert Chen <robert.chen@quanta.corp-partner.google.com> | |
| Fri, 10 Feb 2023 01:55:21 +0000 (9 20:55 -0500) | ||
| committer | Felix Held <felix-coreboot@felixheld.de> | |
| Mon, 13 Feb 2023 14:43:44 +0000 (13 14:43 +0000) | ||
| tree | bcf6a7edbc52dd179216e241ec134ccf0ab5f81c | treesnapshot (tar.gz zip) |
| parent | 3eb17b91daac0b3acaffb01568d724d23c6f0eea | commitdiff |
mb/google/brya/var/lisbon: Update gpio table
eMMC RST pin could reply on PLT_RST so we could keep GPP B3 in VIH.
BUG=b:263548436
TEST=emerge-brask coreboot
Change-Id: Iffbc9dc932325cdd2176b36795a2ff1b3690fbf8
Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72941
Reviewed-by: Kevin Chiu <kevin.chiu.17802@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
eMMC RST pin could reply on PLT_RST so we could keep GPP B3 in VIH.
BUG=b:263548436
TEST=emerge-brask coreboot
Change-Id: Iffbc9dc932325cdd2176b36795a2ff1b3690fbf8
Signed-off-by: Robert Chen <robert.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72941
Reviewed-by: Kevin Chiu <kevin.chiu.17802@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
| src/mainboard/google/brya/variants/lisbon/gpio.c | diffblobblamehistory |