soc/intel/common/timer: Calculate TSC frequency based on CPUID 0x15
commit0a9be33a8aa8e41663c58e0f2f1641f44c7cf5de
authorSubrata Banik <subrata.banik@intel.com>
Thu, 11 Apr 2019 11:04:44 +0000 (11 16:34 +0530)
committerSubrata Banik <subrata.banik@intel.com>
Wed, 17 Apr 2019 15:05:08 +0000 (17 15:05 +0000)
tree93e9081bee530feb4b7801f10682fb0dcaa9f257
parent26c43b7a77bdf28680ef663ef6eb61f6bf8252ab
soc/intel/common/timer: Calculate TSC frequency based on CPUID 0x15

This patch ensures to follow Intel SDM Vol 3B Sec 18.7.3 to
calculate nominal TSC frequency.

As per SDM recommendation:
For any processor in which CPUID.15H is enumerated and
MSR_PLATFORM_INFO[15:8] (which gives the scalable bus frequency) is
available, a more accurate frequency can be obtained by using CPUID.15H

This patch also adds header file to capture Intel  processor model number.

BUG=b:129839774
TEST=Boot ICL platform and calculate TSC frequency using below methods
1. TSC freq calculated based on MSR 0xCE
tsc: Detected 1600.000 MHz processor

2. TSC freq calculated based on CPUID 0x15
tsc: Detected 1612.800 MHz TSC

Method 2 actually reduce ~25ms of boot performance time.

Note: Method 2 is recommended from gen 6 processor onwards.

Change-Id: I9ff4b9159a94e61b7e634bd6095f7cc6d7df87c7
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32283
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
src/arch/x86/include/arch/intel-family.h [new file with mode: 0644]
src/soc/intel/common/block/timer/timer.c