sb/amd/pi/hudson/soc/gpio: add SOC_GPIO_TOTAL_PINS definition
commit09f767dc2757c538ab3fdf2fb76f91131313e062
authorFelix Held <felix-coreboot@felixheld.de>
Wed, 4 Aug 2021 17:33:51 +0000 (4 19:33 +0200)
committerFelix Held <felix-coreboot@felixheld.de>
Sat, 4 Sep 2021 02:47:24 +0000 (4 02:47 +0000)
tree69796beb57f8fff1ab8a552301b43c955be4c42b
parent2709cff57da4784d08f67fe95054f278fcd4411b
sb/amd/pi/hudson/soc/gpio: add SOC_GPIO_TOTAL_PINS definition

EGPIO132 is the last documented GPIO on the GPIO controller in the NDA
version of the BKDG for AMD Family 16h Models 30h-3Fh Processors (#52740
Rev 3.06) which is the only SoC using this code, so define
SOC_GPIO_TOTAL_PINS as 133, since the internal GPIO numbers are
0-indexed. This definition will be needed the subsequent patch that'll
add the remote GPIO support to the common AMD GPIO code to make sure
that the compiler can optimize out the code path needed to support the
remote GPIO access which isn't available on this platform anyway.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I877d462c5e753c9bbb3461dbb10cde2adc2cb12c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56809
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
src/southbridge/amd/pi/hudson/soc/gpio.h