soc/intel/tigerlake: Correct GPIO community PID configuration
commit087064f471650e90677fd990a84e976e601bd32a
authorEric Lai <ericr_lai@compal.corp-partner.google.com>
Tue, 26 May 2020 12:10:22 +0000 (26 20:10 +0800)
committerPatrick Georgi <pgeorgi@google.com>
Thu, 28 May 2020 09:40:42 +0000 (28 09:40 +0000)
treeff4a1b7912f7ae4596e10effb597294aa75a6f1d
parentbe7507db29c7d4471878b1fa767da47901060223
soc/intel/tigerlake: Correct GPIO community PID configuration

Current implementation returns the incorrect GPIO community PID.
The GPIO community index 3 should return PID for COMM_4 and index
4 should return PID for COMM_5.

TEST=Verify PCR port id is correct for each community.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I5dc48e5b31f43853b3a613c17f13f7df71f1fbfa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41725
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
src/soc/intel/tigerlake/acpi/gpio.asl