| commit | 0688ab8d95f18f718510cc17aeb01a47519a9a5a | |
| author | Tristan Shieh <tristan.shieh@mediatek.com> | |
| Fri, 19 Oct 2018 09:29:23 +0000 (19 17:29 +0800) | ||
| committer | Patrick Georgi <pgeorgi@google.com> | |
| Wed, 5 Dec 2018 13:35:59 +0000 (5 13:35 +0000) | ||
| tree | 05fcd7af442ef1f32e85b34d1cdf5ac25371d434 | treesnapshot (tar.gz zip) |
| parent | 3a065f1a76feb4f23af6708caef5f912292610fd | commitdiff |
google/kukui: Support TPM
Init SPI bus 0 to connect TPM, configure interrupt type of GPIO CR50_IRQ,
implement tis_plat_irq_status(), and set up chromeos GPIO table for TPM
interrupt.
BUG=b:80501386
BRANCH=none
Test=Boots correctly on Kukui.
Change-Id: Ieaa6ae65fbfb5ab6323e226e8171dd7a992c3a39
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/29192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Init SPI bus 0 to connect TPM, configure interrupt type of GPIO CR50_IRQ,
implement tis_plat_irq_status(), and set up chromeos GPIO table for TPM
interrupt.
BUG=b:80501386
BRANCH=none
Test=Boots correctly on Kukui.
Change-Id: Ieaa6ae65fbfb5ab6323e226e8171dd7a992c3a39
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/29192
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>