AUTHORS, util/: Drop individual copyright notices
[coreboot.git] / util / superiotool / fintek.c
blob48cb89061e7d205de582bc9608869a09242f0964
1 /* This file is part of the superiotool project */
2 /*
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License as published by
5 * the Free Software Foundation; either version 2 of the License, or
6 * (at your option) any later version.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include "superiotool.h"
16 #define DEVICE_ID_BYTE1_REG 0x20
17 #define DEVICE_ID_BYTE2_REG 0x21
19 #define VENDOR_ID_BYTE1_REG 0x23
20 #define VENDOR_ID_BYTE2_REG 0x24
22 #define FINTEK_VENDOR_ID 0x3419
24 static const struct superio_registers reg_table[] = {
25 {0x0106, "F71862FG / F71863FG", { /* Same ID? Datasheet typo? */
26 /* We assume reserved bits are read as 0. */
27 {NOLDN, NULL,
28 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
29 0x2b,0x2c,0x2d,EOT},
30 {0x06,0x01,0x19,0x34,0x00,0x00,MISC,0x00,0x00,0x00,
31 0x00,0x00,0x08,EOT}},
32 {0x0, "Floppy",
33 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
34 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
35 {0x1, "COM1",
36 {0x30,0x60,0x61,0x70,0xf0,EOT},
37 {0x01,0x03,0xf8,0x04,0x00,EOT}},
38 {0x2, "COM2",
39 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
40 {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
41 {0x3, "Parallel port",
42 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
43 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
44 {0x4, "Hardware monitor",
45 {0x30,0x60,0x61,0x70,EOT},
46 {0x01,0x02,0x95,0x00,EOT}},
47 {0x5, "Keyboard",
48 {0x30,0x60,0x61,0x70,0x72,EOT},
49 {0x01,0x00,0x60,0x00,0x00,EOT}},
50 {0x6, "GPIO",
51 {0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,
52 0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,
53 EOT},
54 {0x00,0x0f,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,
55 NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0x3f,NANA,0x00,
56 EOT}},
57 {0x7, "VID",
58 {0x30,0x60,0x61, 0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
59 0xf7,EOT},
60 {0x00,0x00,0x00, 0x00,0x00,MISC,0x00,NANA,0x00,0x00,
61 0x00,EOT}},
62 {0x8, "SPI",
63 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
64 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
65 {0x10,0x04,0x01,NANA,0x00,0x00,0x00,NANA,0x00,0x00,
66 0x00,0x00,0x00,0x00,0x00,EOT}},
67 {0xa, "PME, ACPI",
68 {0x30,0xf0,0xf1,0xf4,0xf5,0xf7,EOT},
69 {0x00,0x00,NANA,0x06,0x1c,0x01,EOT}},
70 {EOT}}},
71 {0x0110, "F71808A", {
72 /* We assume reserved bits are read as 0. */
73 {NOLDN, NULL,
74 {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
75 0x29,0x2a,0x2b,0x2c,0x2d,EOT},
76 {0x00,0x00,0x10,0x01,0x19,0x34,0x00,0x00,MISC,0x00,
77 0xc0,0x21,0x2f,0x5c,0x27,EOT}},
78 {0x1, "COM1",
79 {0x30,0x60,0x61,0x70,0xf0,EOT},
80 {0x01,0x03,0xf8,0x04,0x00,EOT}},
81 {0x4, "Hardware monitor",
82 {0x30,0x60,0x61,0x70,EOT},
83 {0x01,0x02,0x95,0x00,EOT}},
84 {0x5, "Keyboard",
85 {0x30,0x60,0x61,0x70,0x72,0xfe,0xff,EOT},
86 {0x01,0x00,0x60,0x01,0x0c,0x01,0x29,EOT}},
87 {0x6, "GPIO",
88 {0x70,0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xcb,0xcc,
89 0xcd,0xce,0xcf,0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,
90 0xd7,0xd8,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,0xf3,
91 EOT},
92 {0x00,0x00,0x3f,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
93 0x00,0xe0,0x40,0x00,0x00,NANA,0x00,0x00,0x00,0x00,
94 0x00,0x00,0x00,0x1f,NANA,0x00,0x00,0xff,NANA,0x00,
95 EOT}},
96 {0x7, "WDT",
97 {0x30,0x60,0x61,0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
98 EOT},
99 {0x00,0x00,0x00,0x03,NANA,NANA,NANA,0x00,0x0a,0x00,
100 EOT}},
101 {0x8, "CIR",
102 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
103 0xfc,0xfd,0xfe,EOT},
104 {0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b,
105 0x00,0x00,0x00,EOT}},
106 {0xa, "PME, ACPI, and EUP Power Saving",
107 {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
108 0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
109 0xf6,0xf7,0xf8,0xf9,0xfa,0xfd,EOT},
110 {0x00,0x10,0xcc,0x0c,0x13,0x09,0xc7,0x09,0x63,0x00,
111 0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x3c,
112 0x1f,0x00,0x00,0x00,0x00,NANA,EOT}},
113 {EOT}}},
114 {0x0710, "F71869A/AD", {
115 /* We assume reserved bits are read as 0. */
116 {NOLDN, NULL,
117 {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,
118 0x29,0x29,0x2a,0x2a,0x2b,0x2b,0x2c,0x2c,0x2d,EOT},
119 {0x00,0x00,0x10,0x07,0x19,0x34,0x00,0x00,NANA,0x38,
120 0x6f,0x03,0x0f,0xe7,0x0f,NANA,0x00,NANA,0x28,EOT}},
121 {0x0, "Floppy",
122 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
123 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
124 {0x1, "COM1",
125 {0x30,0x60,0x61,0x70,0xf0,EOT},
126 {0x01,0x03,0xf8,0x04,0x00,EOT}},
127 {0x2, "COM2",
128 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
129 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
130 {0x3, "Parallel port",
131 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
132 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
133 {0x4, "Hardware monitor",
134 {0x30,0x60,0x61,0x70,EOT},
135 {0x01,0x02,0x95,0x00,EOT}},
136 {0x5, "Keyboard",
137 {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
138 {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
139 {0x6, "GPIO",
140 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
141 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
142 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xa0,
143 0xa1,0xa2,0xa4,0xa5,0xa6,0xa9,0xab,0xac,0xad,0xae,
144 0xaf,0x90,0x91,0x92,0x80,0x81,0x82,0x83,EOT},
145 {0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
146 NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
147 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x00,0x00,0x00,
148 0x1f,NANA,0x00,0x00,0x00,0x00,0x00,0xe0,0x00,0x00,
149 0x40,0x00,0xff,NANA,0x00,0xff,NANA,0x00,EOT}},
150 {0x7, "WDT",
151 {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
152 {0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
153 {0x8, "CIR",
154 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf8,0xf9,0xfa,0xfb,
155 0xfc,0xfd,0xfe,EOT},
156 {0x00,0x00,0x00,0x00,NANA,NANA,0x00,0x00,0x80,0x3b,
157 0x00,0x00,0x00,EOT}},
158 {0xa, "PME, ACPI, and ERP Power Saving",
159 {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
160 0xe9,0xec,0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,
161 0xf6,0xf7,0xf8,0xf9,0xfa,0xfc,0xfe,EOT},
162 {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
163 0x0f,0x00,0x00,0x00,0x00,NANA,0x00,NANA,0x06,0x1c,
164 0x1f,0x86,0x00,0x00,0x00,0x07,0x00,EOT}},
165 {EOT}}},
166 {0x1408, "F71869E/ED", {
167 /* We assume reserved bits are read as 0. */
168 {NOLDN, NULL,
169 {0x02,0x07,0x20,0x21,0x23,0x24,0x26,0x27,0x28,0x29,
170 0x2a,0x2b,0x2d,EOT},
171 {0x00,0x00,0x08,0x14,0x19,0x34,0x00,NANA,0x38,0x6f,
172 0x07,0x0f,0x28,EOT}},
173 {0x00, "FDC",
174 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
175 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
176 {0x01, "UART1",
177 {0x30,0x60,0x61,0x70,0xf0,EOT},
178 {0x01,0x03,0xf8,0x04,0x00,EOT}},
179 {0x02, "UART2",
180 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
181 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
182 {0x03, "Parallel port",
183 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
184 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
185 {0x04, "Hardware Monitor",
186 {0x30,0x60,0x61,0x70,EOT},
187 {0x01,0x02,0x95,0x00,EOT}},
188 {0x05, "KBC",
189 {0x30,0x60,0x61,0x70,0x72,0xf0,0xfe,0xff,EOT},
190 {0x01,0x00,0x60,0x01,0x0c,0x83,0x81,0x29,EOT}},
191 {0x06, "GPIO",
192 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,0xf3,0xe0,0xe1,
193 0xe2,0xe3,0xe4,0xe5,0xe6,0xd0,0xd1,0xd2,0xd3,0xc0,
194 0xc1,0xc2,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,
195 0x90,0x91,0x92,0x93,EOT},
196 {0x00,0x00,0x00,0x00,0x00,0x3f,NANA,0x00,0x00,0xff,
197 NANA,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,0x00,
198 0xff,NANA,0x00,0x0f,NANA,0x00,0x00,0x1f,NANA,0x00,
199 0x00,0x3f,NANA,0x00,EOT}},
200 {0x07, "WDT",
201 {0xf0,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,EOT},
202 {0x01,0x00,0x00,NANA,0x00,0x0a,0x00,EOT}},
203 {0x0a, "PME, ACPI, and EUP Power Saving",
204 {0x30,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
205 0xed,0xee,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,
206 0xf8,0xf9,0xfe,EOT},
207 {0x00,0x00,0xcc,0x3c,0x13,0x09,0xc7,0x09,0x63,0x08,
208 0x00,0x00,0x00,0x00,0x00,NANA,0x06,0x1c,0x1f,0x86,
209 0x00,0x00,0x00,EOT}},
210 {EOT}}},
211 {0x2307, "F71889", {
212 /* We assume reserved bits are read as 0. */
213 {NOLDN, NULL,
214 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,0x2b,
215 0x2c,0x2d,EOT},
216 {0x07,0x23,0x19,0x34,0x00,0x00,0x00,0x00,0xf0,0x30,
217 0x00,0x08,EOT}},
218 {0x0, "Floppy",
219 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
220 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
221 {0x1, "COM1",
222 {0x30,0x60,0x61,0x70,0xf0,EOT},
223 {0x01,0x03,0xf8,0x04,0x00,EOT}},
224 {0x2, "COM2",
225 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
226 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
227 {0x3, "Parallel port",
228 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
229 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
230 {0x4, "Hardware monitor",
231 {0x30,0x60,0x61,0x70,EOT},
232 {0x01,0x02,0x95,0x00,EOT}},
233 {0x5, "Keyboard",
234 {0x30,0x60,0x61,0x70,0x72,0xfe,EOT},
235 {0x01,0x00,0x60,0x01,0x0c,0x81,EOT}},
236 {0x6, "GPIO",
237 {0x80,0x81,0x82,0x83,0x90,0x91,0x92,0x93,0xa0,0xa1,
238 0xa2,0xa3,0xb0,0xb1,0xb2,0xc0,0xc1,0xc2,0xc3,0xd0,
239 0xd1,0xd2,0xd3,0xe0,0xe1,0xe2,0xe3,0xf0,0xf1,0xf2,
240 0xf3,0xfe,0xff,EOT},
241 {0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0x1f,
242 NANA,0x00,0x00,0xff,NANA,0x00,0xff,NANA,0x00,0x00,
243 0xff,NANA,0x00,0x00,0x7f,NANA,0x00,0x00,0x7f,NANA,
244 0x00,0x00,0x00,EOT}},
245 {0x7, "VID",
246 {0x30,0x60,0x61,EOT},
247 {0x00,0x00,0x00,EOT}},
248 {0x8, "SPI",
249 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
250 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
251 {0x00,RSVD,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
252 0x00,0x00,0x00,0x00,0x00,EOT}},
253 {0xa, "PME, ACPI",
254 {0x30,0xf0,0xf1,0xf4,0xf5,0xf6,EOT},
255 {0x00,0x00,0x00,0x26,0x1c,0x07,EOT}},
256 {0xb, "VREF",
257 {0xf0,0xf1,0xf2,0xf3,0xff,EOT},
258 {0x64,0x64,0x64,0x00,0x00,EOT}},
259 {EOT}}},
260 {0x4103, "F71872F/FG / F71806F/FG", { /* Same ID? Datasheet typo? */
261 {NOLDN, NULL,
262 {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,
263 0x29,0x2a,0x2b,0x2c,0x2d,EOT},
264 {0x03,0x41,RSVD,0x19,0x34,0x00,0x00,MISC,0x66,
265 0x80,0x00,0x00,0x00,0x04,EOT}},
266 {0x0, "Floppy",
267 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
268 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
269 {0x1, "COM1",
270 {0x30,0x60,0x61,0x70,0xf0,EOT},
271 {0x01,0x03,0xf8,0x04,0x00,EOT}},
272 {0x2, "COM2",
273 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
274 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
275 {0x3, "Parallel port",
276 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
277 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
278 {0x4, "Hardware monitor",
279 {0x30,0x60,0x61,0x70,EOT},
280 {0x00,0x02,0x95,0x00,EOT}},
281 {0x5, "Keyboard", /* Only documented on F71872F/FG. */
282 {0x30,0x60,0x61,0x70,0x72,0xf0,0xf1,EOT},
283 {0x01,0x00,0x60,0x00,0x00,0x83,0x00,EOT}},
284 {0x6, "GPIO",
285 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
286 0xe9,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,
287 EOT},
288 {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
289 0x7f,0x00,0x7f,NANA,0x00,0xff,NANA,0x00,0x03,NANA,
290 EOT}},
291 {0x7, "VID",
292 {0x30,0x60,0x61,EOT},
293 {0x00,0x00,0x00,EOT}},
294 {0xa, "PME, ACPI",
295 {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
296 {0x00,0x00,0x61,0x06,0x3c,EOT}},
297 {EOT}}},
298 {0x4105, "F71882FG/F71883FG", { /* Same ID? Datasheet typo? */
299 /* We assume reserved bits are read as 0. */
300 {NOLDN, NULL,
301 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,
302 0x2b,0x2c,0x2d,EOT},
303 {0x05,0x41,0x19,0x34,0x00,0x00,0x00,0x00,0x00,0x00,
304 0x00,0x08,0x08,EOT}},
305 {0x0, "Floppy",
306 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
307 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
308 {0x1, "COM1",
309 {0x30,0x60,0x61,0x70,0xf0,EOT},
310 {0x01,0x03,0xf8,0x04,0x00,EOT}},
311 {0x2, "COM2",
312 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
313 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
314 {0x3, "Parallel port",
315 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
316 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
317 {0x4, "Hardware monitor",
318 {0x30,0x60,0x61,0x70,EOT},
319 {0x01,0x02,0x95,0x00,EOT}},
320 {0x5, "Keyboard",
321 {0x30,0x60,0x61,0x70,0x72,0xf0,EOT},
322 {0x01,0x00,0x60,0x00,0x00,0x83,EOT}},
323 {0x6, "GPIO",
324 {0x70,0xe0,0xe1,0xe2,0xe3,0xd0,0xd1,0xd2,0xd3,0xc0,
325 0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xf0,0xf1,0xf2,
326 0xf3,EOT},
327 {0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,
328 0x0f,NANA,0x00,0x00,0x0f,NANA,0x00,0x00,0xff,NANA,
329 0x00,EOT}},
330 {0x7, "VID",
331 {0x30,0x60,0x61,EOT},
332 {0x00,0x00,0x00,EOT}},
333 {0x7, "SPI",
334 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,
335 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
336 {0x10,0x04,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
337 0x00,0x00,0x00,0x00,0x00,EOT}},
338 {0xa, "PME, ACPI",
339 {0x30,0xf0,0xf1,0xf4,0xf5,EOT},
340 {0x00,0x00,0x01,0x06,0x1c,EOT}},
341 {EOT}}},
342 {0x0604, "F71805F/FG", {
343 /* We assume reserved bits are read as 0. */
344 {NOLDN, NULL,
345 {0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,EOT},
346 {0x04,0x06,0x19,0x34,0x00,0x00,0x3f,0x08,0x00,EOT}},
347 {0x0, "Floppy",
348 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
349 {0x01,0x03,0xf0,0x06,0x02,0x0e,0x03,0x00,EOT}},
350 {0x1, "COM1",
351 {0x30,0x60,0x61,0x70,0xf0,EOT},
352 {0x01,0x03,0xf8,0x04,0x00,EOT}},
353 {0x2, "COM2",
354 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
355 {0x01,0x02,0xf8,0x03,0x00,0x04,EOT}},
356 {0x3, "Parallel port",
357 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
358 {0x01,0x03,0x78,0x07,0x03,0x42,EOT}},
359 {0x4, "Hardware monitor",
360 {0x30,0x60,0x61,0x70,EOT},
361 {0x00,0x02,0x95,0x00,EOT}},
362 {0x6, "GPIO",
363 {0x70,0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe8,
364 0xe9,0xf0,0xf1,0xf3,0xf4,EOT},
365 {0x00,0x00,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,
366 0x00,0x00,NANA,0x00,NANA,EOT}},
367 {0xa, "PME",
368 {0x30,0xf0,0xf1,EOT},
369 {0x00,0x00,0x00,EOT}},
370 {EOT}}},
371 {0x0581, "F8000", { /* Fintek/ASUS F8000 */
372 {EOT}}},
373 {0x0802, "F81216D/DG", {
374 {NOLDN, NULL,
375 {0x25,0x2f,EOT},
376 {0x00,RSVD,EOT}},
377 {0x0, "UART1",
378 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
379 {NANA,NANA,NANA,NANA,0x00,0x40,EOT}},
380 {0x1, "UART2",
381 {0x30,0x60,0x61,0x70,0xf0,EOT},
382 {NANA,NANA,NANA,NANA,0x00,EOT}},
383 {0x2, "UART3",
384 {0x30,0x60,0x61,0x70,0xf0,EOT},
385 {NANA,NANA,NANA,NANA,0x00,EOT}},
386 {0x3, "UART4",
387 {0x30,0x60,0x61,0x70,0xf0,EOT},
388 {NANA,NANA,NANA,NANA,0x00,EOT}},
389 {0x8, "WDT",
390 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
391 {0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
392 {EOT}}},
393 {0x1602, "F81216AD", {
394 {NOLDN, NULL,
395 {0x25,0x27,EOT},
396 {0x00,NANA,EOT}},
397 {0x0, "UART1",
398 {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf4,0xf5,EOT},
399 {NANA,NANA,NANA,NANA,0x00,0x40,0x00,0x00,EOT}},
400 {0x1, "UART2",
401 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
402 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
403 {0x2, "UART3",
404 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
405 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
406 {0x3, "UART4",
407 {0x30,0x60,0x61,0x70,0xf0,0xf4,0xf5,EOT},
408 {NANA,NANA,NANA,NANA,0x00,0x00,0x00,EOT}},
409 {0x8, "WDT",
410 {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
411 {0x00,NANA,NANA,NANA,NANA,NANA,EOT}},
412 {EOT}}},
413 {0x0407, "F81865F/F-I", {
414 {NOLDN, NULL,
415 {0x02,0x07,0x20,0x21,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2a,0x2a,0x2b,0x2c,0x2d,EOT},
416 {NANA,0x00,0x07,0x04,0x19,0x34,NANA,NANA,NANA,0x00,0x00,0x00,0x00,0x1f,0x00,0x08,EOT}},
417 {0x00, "FDC",
418 {0x30,0x60,0x61,0x70,0x74,0xf0,0xf2,0xf4,EOT},
419 {NANA,0x03,0xf0,NANA,NANA,NANA,NANA,NANA,EOT}},
420 {0x03, "LPT",
421 {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
422 {NANA,0x03,0x78,NANA,NANA,NANA,EOT}},
423 {0x04, "HWMON",
424 {0x30,0x60,0x61,0x70,EOT},
425 {NANA,0x02,0x95,NANA,EOT}},
426 {0x05, "KBC",
427 {0x30,0x60,0x61,0x70,0x72,0xfe,0xf0,EOT},
428 {NANA,0x00,0x60,NANA,NANA,NANA,0x71,EOT}},
429 {0x06, "GPIO",
430 {0x30,0x60,0x61,0x70,0xf1,0xf2,0xf3,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xe0,0xe1,0xe2,0xe3,0xef,0xd0,0xd1,0xd2,0xd3,0xc0,0xc1,0xc2,0xc3,0xb0,0xb1,0xb2,0xb3,0xa0,0xa1,0xa2,0xa3,0x90,0x91,0x92,0x93,EOT},
431 {NANA,0x00,0x60,NANA,0x00,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,NANA,0x00,NANA,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,0x00,0xff,NANA,0x00,NANA,NANA,NANA,NANA,EOT}},
432 {0x07, "WDT",
433 {0x30,0x60,0x61,0xf5,0xf6,0xfa,EOT},
434 {NANA,0x00,0x00,0x00,0x00,NANA,EOT}},
435 {0x08, "SPI",
436 {0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,EOT},
437 {0x10,0x04,NANA,NANA,0x00,0x00,NANA,NANA,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
438 {0x0a, "PME & ACPI",
439 {0x30,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,EOT},
440 {NANA,NANA,NANA,NANA,NANA,0x06,NANA,0x00,EOT}},
441 {0x0b, "RTC",
442 {0x30,0x60,0x61,0x70,EOT},
443 {NANA,0x00,0x00,NANA,EOT}},
444 {0x10, "UART1",
445 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
446 {NANA,0x03,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
447 {0x11, "UART2",
448 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
449 {NANA,0x02,0xf8,NANA,NANA,NANA,0x00,0x00,EOT}},
450 {0x12, "UART3",
451 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
452 {NANA,0x03,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
453 {0x13, "UART4",
454 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
455 {NANA,0x02,0xe8,NANA,NANA,NANA,0x00,0x00,EOT}},
456 {0x14, "UART5",
457 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
458 {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
459 {0x15, "UART6",
460 {0x30,0x60,0x61,0x70,0xf0,0xf2,0xf4,0xf5,EOT},
461 {NANA,0x00,0x00,NANA,NANA,NANA,0x00,0x00,EOT}},
462 {EOT}}},
463 {0x1010, "F81866", {
464 {EOT}}},
465 {0x0215, "F81962/F81964/F81966/F81967", {
466 {EOT}}},
467 {EOT}
470 static const struct superio_registers hwm_table[] = {
471 {0x0110, "F71808A", {
472 {NOLDN, NULL,
473 {0x01, 0x02, 0x03, 0x08, 0x0a, 0x0b, 0x0c, 0x0d,
474 0x0f,
475 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
476 0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
477 /* 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
478 0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f, */
479 0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
480 0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
481 0x60, 0x61, 0x62, 0x63, 0x64, 0x66, 0x6b, 0x6c,
482 0x6d, 0x6f, 0x7f,
483 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
484 0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e,
485 0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
486 0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d,
487 0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x98,
488 0x9b, 0x9c, 0x9e, 0x9f,
489 0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7,
490 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf,
491 0xb0, 0xb1, 0xb2, 0xb3, 0xb4, 0xb5, 0xb6, 0xb7,
492 0xb8, 0xb9, 0xba, 0xbb, 0xbc, 0xbd, 0xbe, 0xbf,
493 0xc0, 0xc1, 0xc2, 0xc3, 0xc4, 0xc5, 0xc6, 0xc7,
494 0xc8, 0xc9, 0xca, 0xcb, 0xcc, 0xcd, 0xce, 0xcf,
495 0xe0, 0xe1, 0xe2, 0xe3, 0xe4, 0xec, 0xed, 0xee,
496 0xef, EOT},
497 {0x03, 0x00, 0x01, 0x4c, 0x00, 0x00, 0x55, 0x00,
498 0x20,
499 NANA, NANA, NANA, NANA, RSVD, RSVD, RSVD, NANA,
500 NANA, RSVD, RSVD, RSVD, RSVD, NANA, NANA, NANA,
501 /* RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD,
502 RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, */
503 0x44, 0x00, NANA, 0x00, 0x00, 0x00, 0x00, 0x00,
504 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
505 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, 0x06, 0x40,
506 0x04, 0x00, 0x00,
507 RSVD, RSVD, NANA, RSVD, NANA, RSVD, RSVD, RSVD,
508 NANA, NANA, NANA, NANA, NANA, RSVD, RSVD,
509 RSVD, RSVD, NANA, NANA, NANA, NANA, RSVD, RSVD,
510 RSVD, RSVD, RSVD, RSVD, RSVD, RSVD,
511 0x00, NANA, NANA, 0x00, 0x2e, 0xff, 0x05, 0x44,
512 0x05, 0x55, 0x66, 0x00,
513 0x03, 0xff, 0x00, 0x83, 0x03, 0xff, 0x3c, 0x32,
514 0x28, 0x1e, 0xff, 0xd9, 0xb2, 0x99, 0x80, 0x1d,
515 0x0c, 0x25, 0x00, 0x80, 0x03, 0xff, 0x3c, 0x32,
516 0x28, 0x1e, 0xff, 0xd9, 0xb2, 0x99, 0x80, 0x1e,
517 0x0f, 0xff, RSVD, 0x7f, RSVD, RSVD, RSVD, RSVD,
518 RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, RSVD, 0x00,
519 NANA, NANA, NANA, NANA, NANA, 0x00, 0x01, 0x01,
520 0x00, EOT}},
521 {EOT}}},
522 {EOT}
525 void probe_idregs_fintek(uint16_t port)
527 uint16_t vid, did, hwmport;
529 probing_for("Fintek", "", port);
531 enter_conf_mode_winbond_fintek_ite_8787(port);
533 did = regval(port, DEVICE_ID_BYTE1_REG);
534 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
536 vid = regval(port, VENDOR_ID_BYTE1_REG);
537 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
539 if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
540 if (verbose)
541 printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
542 exit_conf_mode_winbond_fintek_ite_8787(port);
543 return;
546 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
547 get_superio_name(reg_table, did), vid, did, port);
548 chip_found = 1;
550 dump_superio("Fintek", reg_table, port, did, LDN_SEL);
552 if (extra_dump) {
553 regwrite(port, LDN_SEL, 0x04); /* Select LDN 4 (HWM). */
555 /* Get HWM base address (stored in LDN 4, index 0x60/0x61). */
556 hwmport = regval(port, 0x60) << 8;
557 hwmport |= regval(port, 0x61);
559 printf("Hardware monitor (0x%04x)\n", hwmport);
560 dump_superio("Fintek-HWM", hwm_table, hwmport, did, LDN_SEL);
563 exit_conf_mode_winbond_fintek_ite_8787(port);
567 void probe_idregs_fintek_alternative(uint16_t port)
569 uint16_t vid, did;
571 probing_for("Fintek", "", port);
573 enter_conf_mode_fintek_7777(port);
575 did = regval(port, DEVICE_ID_BYTE1_REG);
576 did |= (regval(port, DEVICE_ID_BYTE2_REG) << 8);
578 vid = regval(port, VENDOR_ID_BYTE1_REG);
579 vid |= (regval(port, VENDOR_ID_BYTE2_REG) << 8);
581 if (vid != FINTEK_VENDOR_ID || superio_unknown(reg_table, did)) {
582 if (verbose)
583 printf(NOTFOUND "vid=0x%04x, id=0x%04x\n", vid, did);
584 exit_conf_mode_fintek_7777(port);
585 return;
588 printf("Found Fintek %s (vid=0x%04x, id=0x%04x) at 0x%x\n",
589 get_superio_name(reg_table, did), vid, did, port);
590 chip_found = 1;
592 dump_superio("Fintek", reg_table, port, did, LDN_SEL);
594 exit_conf_mode_fintek_7777(port);
597 void print_fintek_chips(void)
599 print_vendor_chips("Fintek", reg_table);