mb: Set coreboot as DSDT's manufacturer model ID
[coreboot.git] / src / mainboard / google / glados / dsdt.asl
blobc1e3616331a51df96572f5235f83fce99897fc7f
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2007-2009 coresystems GmbH
5  * Copyright (C) 2015 Google Inc.
6  * Copyright (C) 2015 Intel Corporation
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; version 2 of the License.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
18 #include <arch/acpi.h>
19 DefinitionBlock(
20         "dsdt.aml",
21         "DSDT",
22         0x02,           // DSDT revision: ACPI v2.0 and up
23         OEM_ID,
24         ACPI_TABLE_CREATOR,
25         0x20110725      // OEM revision
28         // Some generic macros
29         #include <soc/intel/skylake/acpi/platform.asl>
31         // global NVS and variables
32         #include <soc/intel/skylake/acpi/globalnvs.asl>
34         // CPU
35         #include <soc/intel/skylake/acpi/cpu.asl>
37         Scope (\_SB) {
38                 Device (PCI0)
39                 {
40                         #include <soc/intel/skylake/acpi/systemagent.asl>
41                         #include <soc/intel/skylake/acpi/pch.asl>
42                 }
44                 // Dynamic Platform Thermal Framework
45                 #include "acpi/dptf.asl"
46         }
48         // Chrome OS specific
49         #include <vendorcode/google/chromeos/acpi/chromeos.asl>
51         // Chipset specific sleep states
52         #include <soc/intel/skylake/acpi/sleepstates.asl>
54         // Mainboard specific
55         #include "acpi/mainboard.asl"