From 5957639832e2eced873c4723034b2b606b8682fd Mon Sep 17 00:00:00 2001 From: bny Date: Mon, 15 Feb 2010 13:56:46 +0100 Subject: [PATCH] forgot to remove these --- chibi/chb_drvr.c | 680 ------------------------------------------------------- chibi/chb_drvr.h | 243 -------------------- 2 files changed, 923 deletions(-) delete mode 100644 chibi/chb_drvr.c delete mode 100644 chibi/chb_drvr.h diff --git a/chibi/chb_drvr.c b/chibi/chb_drvr.c deleted file mode 100644 index 155fa94..0000000 --- a/chibi/chb_drvr.c +++ /dev/null @@ -1,680 +0,0 @@ -/******************************************************************* - Copyright (C) 2009 FreakLabs - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - 3. Neither the name of the the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software - without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND - ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - SUCH DAMAGE. - - Originally written by Christopher Wang aka Akiba. - Please post support questions to the FreakLabs forum. - -*******************************************************************/ -#include -#include "chb.h" -#include "chb_drvr.h" -#include "chb_buf.h" -#include "chb_spi.h" -#include "chb_eeprom.h" - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -static U8 chb_get_state() -{ - return chb_reg_read(TRX_STATUS) & 0x1f; -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -static U8 chb_get_status() -{ - return chb_reg_read(TRX_STATE) >> CHB_TRAC_STATUS_POS; -} - -/**************************************************************************/ -/*! - Each nop takes 2 cycles so this should give us an 8 cycle delay or 1 usec. - I'm just too lazy to implement the timer interrupt right now. - Gimme a break, its almost midnight on a friday... - - TODO: replace this with a proper interrupt driven delay -*/ -/**************************************************************************/ -static void chb_delay_us(U16 usec) -{ - do - { - asm("nop"); - asm("nop"); - asm("nop"); - asm("nop"); - } while (--usec); -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -void chb_reset() -{ - CHB_RST_ENABLE(); - CHB_SLPTR_DISABLE(); - chb_delay_us(TIME_RESET); - CHB_RST_DISABLE(); -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -U8 chb_reg_read(U8 addr) -{ - U8 val = 0; - - /* Add the register read command to the register address. */ - addr |= 0x80; - - CHB_ENTER_CRIT(); - CHB_SPI_ENABLE(); - - /*Send Register address and read register content.*/ - val = chb_xfer_byte(addr); - val = chb_xfer_byte(val); - - CHB_SPI_DISABLE(); - CHB_LEAVE_CRIT(); - - return val; -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -U16 chb_reg_read16(U8 addr) -{ - U8 i; - U16 val = 0; - - for (i=0; i<2; i++) - { - addr |= chb_reg_read(addr + i) << (8 * i); - } - return val; -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -void chb_reg_write(U8 addr, U8 val) -{ - U8 dummy; - - /* Add the Register Write command to the address. */ - addr |= 0xC0; - - CHB_ENTER_CRIT(); - CHB_SPI_ENABLE(); - - /*Send Register address and write register content.*/ - dummy = chb_xfer_byte(addr); - dummy = chb_xfer_byte(val); - - CHB_SPI_DISABLE(); - CHB_LEAVE_CRIT(); -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -void chb_reg_write16(U8 addr, U16 val) -{ - U8 i; - - for (i=0; i<2; i++) - { - chb_reg_write(addr + i, val >> (8 * i)); - } -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -void chb_reg_write64(U8 addr, U8 *val) -{ - U8 i; - - for (i=0; i<8; i++) - { - chb_reg_write(addr + i, *(val + i)); - } -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -void chb_reg_read_mod_write(U8 addr, U8 val, U8 mask) -{ - U8 tmp; - - tmp = chb_reg_read(addr); - val &= mask; // mask off stray bits from val - tmp &= ~mask; // mask off bits in reg val - tmp |= val; // copy val into reg val - chb_reg_write(addr, tmp); // write back to reg -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -void chb_frame_write(U8 *hdr, U8 hdr_len, U8 *data, U8 data_len) -{ - U8 i, dummy; - - // dont allow transmission longer than max frame size - if ((hdr_len + data_len) > 127) - { - return; - } - - // initiate spi transaction - CHB_ENTER_CRIT(); - CHB_SPI_ENABLE(); - - // send fifo write command - dummy = chb_xfer_byte(CHB_SPI_CMD_FW); - - // write hdr contents to fifo - for (i=0; i= CHB_MIN_FRAME_LENGTH) && (len <= CHB_MAX_FRAME_LENGTH)) - { - chb_buf_write(len); - - for (i=0; isrc_addr = addr; -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -U16 chb_get_short_addr() -{ - U8 addr[2]; - - chb_eeprom_read(CHB_EEPROM_SHORT_ADDR, addr, 2); - return *(U16 *)addr; -} - -/**************************************************************************/ -/*! - Load the data into the fifo, initiate a transmission attempt, - and return the status of the transmission attempt. -*/ -/**************************************************************************/ -U8 chb_tx(U8 *hdr, U8 *data, U8 len) -{ - U8 state = chb_get_state(); - pcb_t *pcb = chb_get_pcb(); - - if ((state == BUSY_TX) || (state == BUSY_TX_ARET)) - { - return RADIO_WRONG_STATE; - } - - // TODO: check why we need to transition to the off state before we go to tx_aret_on - chb_set_state(TRX_OFF); - chb_set_state(TX_ARET_ON); - - // TODO: try and start the frame transmission by writing TX_START command instead of toggling - // sleep pin...i just feel like it's kind of weird... - - // write frame to buffer. first write header into buffer (add 1 for len byte), then data. - chb_frame_write(hdr, CHB_HDR_SZ + 1, data, len); - - // TEST - check data in buffer - //{ - // U8 i, len, tmp[30]; - // - // len = 1 + CHB_HDR_SZ + len; - // chb_sram_read(0, len, tmp); - // for (i=0; itx_end); - pcb->tx_end = false; - - // check the status of the transmission - return chb_get_status(); -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -static void chb_radio_init() -{ - U8 ieee_addr[8]; - - // reset chip - chb_reset(); - - // disable intps while we config the radio - chb_reg_write(IRQ_MASK, 0); - - // force transceiver off while we configure the intps - chb_reg_read_mod_write(TRX_STATE, CMD_FORCE_TRX_OFF, 0x1F); - chb_delay_us(TIME_P_ON_TO_TRX_OFF); - - // set radio cfg parameters - // **note** uncomment if these will be set to something other than default - //chb_reg_read_mod_write(XAH_CTRL_0, CHB_MAX_FRAME_RETRIES << CHB_MAX_FRAME_RETRIES_POS, 0xF << CHB_MAX_FRAME_RETRIES_POS); - //chb_reg_read_mod_write(XAH_CTRL_0, CHB_MAX_CSMA_RETRIES << CHB_MAX_CSMA_RETIRES_POS, 0x7 << CHB_MAX_CSMA_RETIRES_POS); - //chb_reg_read_mod_write(CSMA_SEED_1, CHB_MIN_BE << CHB_MIN_BE_POS, 0x3 << CHB_MIN_BE_POS); - //chb_reg_read_mod_write(CSMA_SEED_1, CHB_CSMA_SEED1 << CHB_CSMA_SEED1_POS, 0x7 << CHB_CSMA_SEED1); - //chb_ret_write(CSMA_SEED0, CHB_CSMA_SEED0); - //chb_reg_read_mod_write(PHY_CC_CCA, CHB_CCA_MODE << CHB_CCA_MODE_POS,0x3 << CHB_CCA_MODE_POS); - //chb_reg_write(CCA_THRES, CHB_CCA_ED_THRES); - //chb_reg_read_mod_write(PHY_TX_PWR, CHB_TX_PWR, 0xf); - - // set the channel - chb_set_channel(CHB_CHANNEL); - - // set autocrc mode - chb_reg_read_mod_write(PHY_TX_PWR, 1 << CHB_AUTO_CRC_POS, 1 << CHB_AUTO_CRC_POS); - - // set fsm state - // put trx in rx auto ack mode - chb_set_state(RX_AACK_ON); - - // set pan ID - chb_reg_write16(PAN_ID_0, CHB_PAN_ID); - - // set short addr - // NOTE: Possibly get this from EEPROM - chb_reg_write16(SHORT_ADDR_0, chb_get_short_addr()); - - // set long addr - // NOTE: Possibly get this from EEPROM - chb_get_ieee_addr(ieee_addr); - chb_reg_write64(IEEE_ADDR_0, ieee_addr); - - // re-enable intps while we config the radio - chb_reg_write(IRQ_MASK, 0xc); - - // enable mcu intp pin on INT4 - EICRB |= _BV(ISC40) | _BV(ISC41); - EIMSK |= _BV(INT4); - - while (chb_get_state() != RX_AACK_ON); -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -void chb_drvr_init() -{ - // config SPI for at86rf230 access - chb_spi_init(); - - // configure IOs - CHB_DDR_SLPTR |= (_BV(CHB_SLPTRPIN)); - CHB_DDR_RST |= (_BV(CHB_RSTPIN)); - - // config radio - chb_radio_init(); -} - -/**************************************************************************/ -/*! - -*/ -/**************************************************************************/ -ISR(CHB_RADIO_IRQ) -{ - U8 dummy, state, intp_src = 0; - pcb_t *pcb = chb_get_pcb(); - - CHB_ENTER_CRIT(); - - /*Read Interrupt source.*/ - CHB_SPI_ENABLE(); - - /*Send Register address and read register content.*/ - dummy = chb_xfer_byte(IRQ_STATUS | CHB_SPI_CMD_RR); - intp_src = chb_xfer_byte(0); - - CHB_SPI_DISABLE(); - - while (intp_src) - { - /*Handle the incomming interrupt. Prioritized.*/ - if ((intp_src & CHB_IRQ_RX_START_MASK)) - { - intp_src &= ~CHB_IRQ_RX_START_MASK; - } - else if (intp_src & CHB_IRQ_TRX_END_MASK) - { - state = chb_get_state(); - - if ((state == RX_ON) || (state == RX_AACK_ON) || (state == BUSY_RX_AACK)) - { - chb_frame_read(); - pcb->rcvd_xfers++; - pcb->data_rcv = true; - } - else - { - pcb->tx_end = true; - } - intp_src &= ~CHB_IRQ_TRX_END_MASK; - while (chb_set_state(RX_AACK_ON) != RADIO_SUCCESS); - } - else if (intp_src & CHB_IRQ_TRX_UR_MASK) - { - intp_src &= ~CHB_IRQ_TRX_UR_MASK; - pcb->underrun++; - } - else if (intp_src & CHB_IRQ_PLL_UNLOCK_MASK) - { - intp_src &= ~CHB_IRQ_PLL_UNLOCK_MASK; - } - else if (intp_src & CHB_IRQ_PLL_LOCK_MASK) - { - intp_src &= ~CHB_IRQ_PLL_LOCK_MASK; - } - else if (intp_src & CHB_IRQ_BAT_LOW_MASK) - { - intp_src &= ~CHB_IRQ_BAT_LOW_MASK; - pcb->battlow++; - } - else - { - } - } - CHB_LEAVE_CRIT(); -} diff --git a/chibi/chb_drvr.h b/chibi/chb_drvr.h deleted file mode 100644 index 5bc69dd..0000000 --- a/chibi/chb_drvr.h +++ /dev/null @@ -1,243 +0,0 @@ -/******************************************************************* - Copyright (C) 2009 FreakLabs - All rights reserved. - - Redistribution and use in source and binary forms, with or without - modification, are permitted provided that the following conditions - are met: - - 1. Redistributions of source code must retain the above copyright - notice, this list of conditions and the following disclaimer. - 2. Redistributions in binary form must reproduce the above copyright - notice, this list of conditions and the following disclaimer in the - documentation and/or other materials provided with the distribution. - 3. Neither the name of the the copyright holder nor the names of its contributors - may be used to endorse or promote products derived from this software - without specific prior written permission. - - THIS SOFTWARE IS PROVIDED BY THE THE COPYRIGHT HOLDERS AND CONTRIBUTORS ``AS IS'' AND - ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE - FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - SUCH DAMAGE. - - Originally written by Christopher Wang aka Akiba. - Please post support questions to the FreakLabs forum. - -*******************************************************************/ -#ifndef CHIBI_DRVR_H -#define CHIBI_DRVR_H - -#include -#include -#include "types.h" - -#define CHB_EEPROM_IEEE_ADDR 0x00 -#define CHB_EEPROM_SHORT_ADDR 0x09 - -#define CHB_SPI_CMD_RW 0xC0 /**< Register Write (short mode). */ -#define CHB_SPI_CMD_RR 0x80 /**< Register Read (short mode). */ -#define CHB_SPI_CMD_FW 0x60 /**< Frame Transmit Mode (long mode). */ -#define CHB_SPI_CMD_FR 0x20 /**< Frame Receive Mode (long mode). */ -#define CHB_SPI_CMD_SW 0x40 /**< SRAM Write. */ -#define CHB_SPI_CMD_SR 0x00 /**< SRAM Read. */ -#define CHB_SPI_CMD_RADDRM 0x7F /**< Register Address Mask. */ - -#define CHB_IRQ_BAT_LOW_MASK 0x80 /**< Mask for the BAT_LOW interrupt. */ -#define CHB_IRQ_TRX_UR_MASK 0x40 /**< Mask for the TRX_UR interrupt. */ -#define CHB_IRQ_TRX_END_MASK 0x08 /**< Mask for the TRX_END interrupt. */ -#define CHB_IRQ_RX_START_MASK 0x04 /**< Mask for the RX_START interrupt. */ -#define CHB_IRQ_PLL_UNLOCK_MASK 0x02 /**< Mask for the PLL_UNLOCK interrupt. */ -#define CHB_IRQ_PLL_LOCK_MASK 0x01 /**< Mask for the PLL_LOCK interrupt. */ - -#define CHB_RSTPORT PORTB -#define CHB_RSTPIN 4 -#define CHB_SLPTRPORT PORTB -#define CHB_SLPTRPIN 5 -#define CHB_DDR_SLPTR DDRB -#define CHB_DDR_RST DDRB -#define CHB_RADIO_IRQ INT4_vect - -#define CHB_ENTER_CRIT() {U8 volatile saved_sreg = SREG; cli() -#define CHB_LEAVE_CRIT() SREG = saved_sreg;} -#define CHB_RST_ENABLE() do {CHB_RSTPORT &= ~(_BV(CHB_RSTPIN));} while (0) -#define CHB_RST_DISABLE() do {CHB_RSTPORT |= (_BV(CHB_RSTPIN));} while (0) -#define CHB_SLPTR_ENABLE() do {CHB_SLPTRPORT |= (_BV(CHB_SLPTRPIN));} while (0) -#define CHB_SLPTR_DISABLE() do {CHB_SLPTRPORT &= ~(_BV(CHB_SLPTRPIN));} while (0) - -enum -{ - CCA_ED = 1, /**< Use energy detection above threshold mode. */ - CCA_CARRIER_SENSE = 2, /**< Use carrier sense mode. */ - CCA_CARRIER_SENSE_WITH_ED = 3 /**< Use a combination of both energy detection and carrier sense. */ -}; - -enum -{ - CHB_CHANNEL = 11, - CHB_PAN_ID = 0x1234, - CHB_TX_PWR = 0x0, - CHB_SHORT_ADDR = 0x0, - CHB_IEEE_ADDR = 0x0, - CHB_MAX_FRAME_RETRIES = 3, - CHB_MAX_CSMA_RETRIES = 4, - CHB_MIN_BE = 0, - CHB_CCA_MODE = CCA_ED, - CHB_CCA_ED_THRES = 0x7, - CHB_CSMA_SEED0 = 0, - CHB_CSMA_SEED1 = 0 -}; - -enum -{ - TRX_STATUS = 0x01, - TRX_STATE = 0x02, - TRX_CTRL0 = 0x03, - TRX_CTRL1 = 0x04, - PHY_TX_PWR = 0x05, - PHY_RSSI = 0x06, - PHY_ED_LEVEL = 0x07, - PHY_CC_CCA = 0x08, - CCA_THRES = 0x09, - IRQ_MASK = 0x0e, - IRQ_STATUS = 0x0f, - VREG_CTRL = 0x10, - BATMON = 0x11, - XOSC_CTRL = 0x12, - FTN_CTRL = 0x18, - PLL_CF = 0x1a, - PLL_DCU = 0x1b, - PART_NUM = 0x1c, - VERSION_NUM = 0x1d, - MAN_ID_0 = 0x1e, - MAN_ID_1 = 0x1f, - SHORT_ADDR_0 = 0x20, - SHORT_ADDR_1 = 0x21, - PAN_ID_0 = 0x22, - PAN_ID_1 = 0x23, - IEEE_ADDR_0 = 0x24, - IEEE_ADDR_1 = 0x25, - IEEE_ADDR_2 = 0x26, - IEEE_ADDR_3 = 0x27, - IEEE_ADDR_4 = 0x28, - IEEE_ADDR_5 = 0x29, - IEEE_ADDR_6 = 0x2a, - IEEE_ADDR_7 = 0x2b, - XAH_CTRL_0 = 0x2c, - CSMA_SEED_0 = 0x2d, - CSMA_SEED_1 = 0x2e -}; - -enum -{ - CHB_MAX_FRAME_RETRIES_POS = 4, - CHB_MAX_CSMA_RETIRES_POS = 1, - CHB_MIN_BE_POS = 6, - CHB_CSMA_SEED1_POS = 0, - CHB_CCA_MODE_POS = 5, - CHB_AUTO_CRC_POS = 7, - CHB_TRX_END_POS = 3, - CHB_TRAC_STATUS_POS = 5, - CHB_MIN_FRAME_LENGTH = 3, - CHB_MAX_FRAME_LENGTH = 0x7f -}; - -enum{ - TIME_TO_ENTER_P_ON = 510, /**< Transition time from VCC is applied to P_ON. */ - TIME_P_ON_TO_TRX_OFF = 510, /**< Transition time from P_ON to TRX_OFF. */ - TIME_SLEEP_TO_TRX_OFF = 880, /**< Transition time from SLEEP to TRX_OFF. */ - TIME_RESET = 6, /**< Time to hold the RST pin low during reset */ - TIME_ED_MEASUREMENT = 140, /**< Time it takes to do a ED measurement. */ - TIME_CCA = 140, /**< Time it takes to do a CCA. */ - TIME_PLL_LOCK = 150, /**< Maximum time it should take for the PLL to lock. */ - TIME_FTN_TUNING = 25, /**< Maximum time it should take to do the filter tuning. */ - TIME_NOCLK_TO_WAKE = 6, /**< Transition time from *_NOCLK to being awake. */ - TIME_CMD_FORCE_TRX_OFF = 1, /**< Time it takes to execute the FORCE_TRX_OFF command. */ - TIME_TRX_OFF_TO_PLL_ACTIVE = 180, /**< Transition time from TRX_OFF to: RX_ON, PLL_ON, TX_ARET_ON and RX_AACK_ON. */ - TIME_STATE_TRANSITION_PLL_ACTIVE = 1, /**< Transition time from PLL active state to another. */ -}; - -enum{ - RADIO_SUCCESS = 0x40, /**< The requested service was performed successfully. */ - RADIO_UNSUPPORTED_DEVICE, /**< The connected device is not an Atmel AT86RF230. */ - RADIO_INVALID_ARGUMENT, /**< One or more of the supplied function arguments are invalid. */ - RADIO_TIMED_OUT, /**< The requested service timed out. */ - RADIO_WRONG_STATE, /**< The end-user tried to do an invalid state transition. */ - RADIO_BUSY_STATE, /**< The radio transceiver is busy receiving or transmitting. */ - RADIO_STATE_TRANSITION_FAILED, /**< The requested state transition could not be completed. */ - RADIO_CCA_IDLE, /**< Channel is clear, available to transmit a new frame. */ - RADIO_CCA_BUSY, /**< Channel busy. */ - RADIO_TRX_BUSY, /**< Transceiver is busy receiving or transmitting data. */ - RADIO_BAT_LOW, /**< Measured battery voltage is lower than voltage threshold. */ - RADIO_BAT_OK, /**< Measured battery voltage is above the voltage threshold. */ - RADIO_CRC_FAILED, /**< The CRC failed for the actual frame. */ - RADIO_CHANNEL_ACCESS_FAILURE, /**< The channel access failed during the auto mode. */ - RADIO_NO_ACK, /**< No acknowledge frame was received. */ -}; - -enum -{ - CMD_NOP = 0, - CMD_TX_START = 2, - CMD_FORCE_TRX_OFF = 3, - CMD_RX_ON = 6, - CMD_TRX_OFF = 8, - CMD_PLL_ON = 9, - CMD_RX_AACK_ON = 22, - CMD_TX_ARET_ON = 25 -}; - -enum -{ - P_ON = 0, - BUSY_RX = 1, - BUSY_TX = 2, - RX_ON = 6, - TRX_OFF = 8, - PLL_ON = 9, - SLEEP = 15, - BUSY_RX_AACK = 17, - BUSY_TX_ARET = 18, - RX_AACK_ON = 22, - TX_ARET_ON = 25, - RX_ON_NOCLK = 28, - RX_AACK_ON_NOCLK = 29, - BUSY_RX_AACK_NOCLK = 30 -}; - -// init -void chb_drvr_init(); - -// data access -U8 chb_reg_read(U8 addr); -U16 chb_reg_read16(U8 addr); -void chb_reg_write(U8 addr, U8 val); -void chb_reg_write16(U8 addr, U16 val); -void chb_reg_write64(U8 addr, U8 *val); -void chb_reg_read_mod_write(U8 addr, U8 val, U8 mask); -void chb_frame_write(U8 *hdr, U8 hdr_len, U8 *data, U8 data_len); - -// general configuration -U8 chb_set_channel(U8 channel); -void chb_set_ieee_addr(U8 *addr); -void chb_get_ieee_addr(U8 *addr); -void chb_set_short_addr(U16 addr); -U16 chb_get_short_addr(); - -// data transmit -U8 chb_tx(U8 *hdr, U8 *data, U8 len); - -#ifdef CHB_DEBUG -// sram access -void chb_sram_read(U8 addr, U8 len, U8 *data); -void chb_sram_write(U8 addr, U8 len, U8 *data); -#endif - -#endif - -- 2.11.4.GIT