From 3d43b2c4eb217e0b3935f03fc1bbe7a01bccaee1 Mon Sep 17 00:00:00 2001
From: neil <neil@fb15a70f-31f2-0310-bbcc-cdcc74a49acc>
Date: Tue, 17 Mar 2009 00:00:14 +0000
Subject: [PATCH] Added missing properties and fixed inconsistent line endings.

git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@30936 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
---
 arch/common/hidd.intelG33/intelG33_hardware.c |  2 +-
 arch/common/hidd.intelG33/intelG33_regs.h     | 24 ++++++++++++------------
 2 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/arch/common/hidd.intelG33/intelG33_hardware.c b/arch/common/hidd.intelG33/intelG33_hardware.c
index 8865c649f..f2039c9cf 100644
--- a/arch/common/hidd.intelG33/intelG33_hardware.c
+++ b/arch/common/hidd.intelG33/intelG33_hardware.c
@@ -14,7 +14,7 @@
 
 #include "intelG33_intern.h"
 #include "intelG33_regs.h"
-
+
 void init_GMBus(struct staticdata *sd) {
 }
 
diff --git a/arch/common/hidd.intelG33/intelG33_regs.h b/arch/common/hidd.intelG33/intelG33_regs.h
index 2476c502e..bec96f33a 100644
--- a/arch/common/hidd.intelG33/intelG33_regs.h
+++ b/arch/common/hidd.intelG33/intelG33_regs.h
@@ -69,21 +69,21 @@ MMADR+
 #define writel(b,addr) ( (*(volatile uint32_t *) (addr)) = (b) )
 
 #define G33_RD_REGL(a, reg) ( readl(sd->Chipset.a + reg) )
-#define G33_RD_REGW(a, reg) ( readw(sd->Chipset.a + reg) )
-#define G33_RD_REGB(a, reg) ( readb(sd->Chipset.a + reg) )
-
-#define G33_WR_REGL(a, reg, value) ( writel((value), (sd->Chipset.a + reg)) )
-#define G33_WR_REGW(a, reg, value) ( writew((value), (sd->Chipset.a + reg)) )
-#define G33_WR_REGB(a, reg, value) ( writeb((value), (sd->Chipset.a + reg)) )
+#define G33_RD_REGW(a, reg) ( readw(sd->Chipset.a + reg) )
+#define G33_RD_REGB(a, reg) ( readb(sd->Chipset.a + reg) )
+
+#define G33_WR_REGL(a, reg, value) ( writel((value), (sd->Chipset.a + reg)) )
+#define G33_WR_REGW(a, reg, value) ( writew((value), (sd->Chipset.a + reg)) )
+#define G33_WR_REGB(a, reg, value) ( writeb((value), (sd->Chipset.a + reg)) )
 
 /* Should get away with this... or not... */
-#define G33_SETBMASK_REGL(a, reg, value) ( writel((readl(sd->Chipset.a + reg )|value), (sd->Chipset.a + reg)) )
-#define G33_SETBMASK_REGW(a, reg, value) ( writew((readw(sd->Chipset.a + reg )|value), (sd->Chipset.a + reg)) )
+#define G33_SETBMASK_REGL(a, reg, value) ( writel((readl(sd->Chipset.a + reg )|value), (sd->Chipset.a + reg)) )
+#define G33_SETBMASK_REGW(a, reg, value) ( writew((readw(sd->Chipset.a + reg )|value), (sd->Chipset.a + reg)) )
 #define G33_SETBMASK_REGB(a, reg, value) ( writeb((readb(sd->Chipset.a + reg )|value), (sd->Chipset.a + reg)) )
-
-#define G33_CLRBMASK_REGL(a, reg, value) ( writel((readl(sd->Chipset.a + reg )&(~value)), (sd->Chipset.a + reg)) )
-#define G33_CLRBMASK_REGW(a, reg, value) ( writew((readw(sd->Chipset.a + reg )&(~value)), (sd->Chipset.a + reg)) )
-#define G33_CLRBMASK_REGB(a, reg, value) ( writeb((readb(sd->Chipset.a + reg )&(~value)), (sd->Chipset.a + reg)) )
+
+#define G33_CLRBMASK_REGL(a, reg, value) ( writel((readl(sd->Chipset.a + reg )&(~value)), (sd->Chipset.a + reg)) )
+#define G33_CLRBMASK_REGW(a, reg, value) ( writew((readw(sd->Chipset.a + reg )&(~value)), (sd->Chipset.a + reg)) )
+#define G33_CLRBMASK_REGB(a, reg, value) ( writeb((readb(sd->Chipset.a + reg )&(~value)), (sd->Chipset.a + reg)) )
 
 #define G33_WRM_REGL(a, reg, value, mask) ( writel( (((readl(sd->Chipset.a + reg )&(~mask)))&value), (sd->Chipset.a + reg)) )
 #define G33_WRM_REGW(a, reg, value, mask) ( writew( (((readw(sd->Chipset.a + reg )&(~mask)))&value), (sd->Chipset.a + reg)) )
-- 
2.11.4.GIT