| commit | 8a9c720f7e950349a2d70fd220ecd64053b1abd9 | |
| author | neil <neil@fb15a70f-31f2-0310-bbcc-cdcc74a49acc> | |
| Thu, 28 May 2009 20:46:48 +0000 (28 20:46 +0000) | ||
| committer | neil <neil@fb15a70f-31f2-0310-bbcc-cdcc74a49acc> | |
| Thu, 28 May 2009 20:46:48 +0000 (28 20:46 +0000) | ||
| tree | 800d466c216f707e93bb30dc425bb3d1e8ce23ee | treesnapshot (tar.gz zip) |
| parent | cbd44f4d0fc1ceb3392a856769ce66c380f233cc | commitdiff |
- Always use DMA status register where available instead of busy flag to
determine if an interrupt is for us. This should solve problems with IRQ
sharing, and with PIO mode on some SATA chipsets.
- Clear DMA interrupt bit before clearing interrupt by reading status
register. Otherwise, it seems that the DMA bit could get set again for a
new interrupt before we clear it, resulting in a missed interrupt.
git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@31319 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
determine if an interrupt is for us. This should solve problems with IRQ
sharing, and with PIO mode on some SATA chipsets.
- Clear DMA interrupt bit before clearing interrupt by reading status
register. Otherwise, it seems that the DMA bit could get set again for a
new interrupt before we clear it, resulting in a missed interrupt.
git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@31319 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
| arch/common/ata.device/ata.conf | diffblobblamehistory | |
| arch/common/ata.device/ata_init.c | diffblobblamehistory | |
| arch/common/ata.device/lowlevel.c | diffblobblamehistory |