1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef INFER_ADDR_PREFIX
44 #define INFER_ADDR_PREFIX 1
47 #ifndef SCALE1_WHEN_NO_INDEX
48 /* Specifying a scale factor besides 1 when there is no index is
49 futile. eg. `mov (%ebx,2),%al' does exactly the same as
50 `mov (%ebx),%al'. To slavishly follow what the programmer
51 specified, set SCALE1_WHEN_NO_INDEX to 0. */
52 #define SCALE1_WHEN_NO_INDEX 1
58 static unsigned int mode_from_disp_size
PARAMS ((unsigned int));
59 static int fits_in_signed_byte
PARAMS ((long));
60 static int fits_in_unsigned_byte
PARAMS ((long));
61 static int fits_in_unsigned_word
PARAMS ((long));
62 static int fits_in_signed_word
PARAMS ((long));
63 static int smallest_imm_type
PARAMS ((long));
64 static int add_prefix
PARAMS ((unsigned int));
65 static void set_16bit_code_flag
PARAMS ((int));
66 static void set_16bit_gcc_code_flag
PARAMS((int));
67 static void set_intel_syntax
PARAMS ((int));
70 static bfd_reloc_code_real_type reloc
71 PARAMS ((int, int, bfd_reloc_code_real_type
));
74 /* 'md_assemble ()' gathers together information and puts it into a
79 /* TM holds the template for the insn were currently assembling. */
82 /* SUFFIX holds the instruction mnemonic suffix if given.
83 (e.g. 'l' for 'movl') */
86 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
88 /* OPERANDS gives the number of given operands. */
89 unsigned int operands
;
91 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
92 of given register, displacement, memory operands and immediate
94 unsigned int reg_operands
, disp_operands
, mem_operands
, imm_operands
;
96 /* TYPES [i] is the type (see above #defines) which tells us how to
97 search through DISPS [i] & IMMS [i] & REGS [i] for the required
99 unsigned int types
[MAX_OPERANDS
];
101 /* Displacements (if given) for each operand. */
102 expressionS
*disps
[MAX_OPERANDS
];
104 /* Relocation type for operand */
106 enum bfd_reloc_code_real disp_reloc
[MAX_OPERANDS
];
108 int disp_reloc
[MAX_OPERANDS
];
111 /* Immediate operands (if given) for each operand. */
112 expressionS
*imms
[MAX_OPERANDS
];
114 /* Register operands (if given) for each operand. */
115 const reg_entry
*regs
[MAX_OPERANDS
];
117 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
118 the base index byte below. */
119 const reg_entry
*base_reg
;
120 const reg_entry
*index_reg
;
121 unsigned int log2_scale_factor
;
123 /* SEG gives the seg_entries of this insn. They are zero unless
124 explicit segment overrides are given. */
125 const seg_entry
*seg
[2]; /* segments for memory operands (if given) */
127 /* PREFIX holds all the given prefix opcodes (usually null).
128 PREFIXES is the number of prefix opcodes. */
129 unsigned int prefixes
;
130 unsigned char prefix
[MAX_PREFIXES
];
132 /* RM and SIB are the modrm byte and the sib byte where the
133 addressing modes of this insn are encoded. */
139 typedef struct _i386_insn i386_insn
;
141 /* List of chars besides those in app.c:symbol_chars that can start an
142 operand. Used to prevent the scrubber eating vital white-space. */
144 const char extra_symbol_chars
[] = "*%-(@";
146 const char extra_symbol_chars
[] = "*%-(";
149 /* This array holds the chars that always start a comment. If the
150 pre-processor is disabled, these aren't very useful */
151 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
152 /* Putting '/' here makes it impossible to use the divide operator.
153 However, we need it for compatibility with SVR4 systems. */
154 const char comment_chars
[] = "#/";
155 #define PREFIX_SEPARATOR '\\'
157 const char comment_chars
[] = "#";
158 #define PREFIX_SEPARATOR '/'
161 /* This array holds the chars that only start a comment at the beginning of
162 a line. If the line seems to have the form '# 123 filename'
163 .line and .file directives will appear in the pre-processed output */
164 /* Note that input_file.c hand checks for '#' at the beginning of the
165 first line of the input file. This is because the compiler outputs
166 #NO_APP at the beginning of its output. */
167 /* Also note that comments started like this one will always work if
168 '/' isn't otherwise defined. */
169 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
170 const char line_comment_chars
[] = "";
172 const char line_comment_chars
[] = "/";
175 const char line_separator_chars
[] = "";
177 /* Chars that can be used to separate mant from exp in floating point nums */
178 const char EXP_CHARS
[] = "eE";
180 /* Chars that mean this number is a floating point constant */
183 const char FLT_CHARS
[] = "fFdDxX";
185 /* tables for lexical analysis */
186 static char mnemonic_chars
[256];
187 static char register_chars
[256];
188 static char operand_chars
[256];
189 static char identifier_chars
[256];
190 static char digit_chars
[256];
193 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
194 #define is_operand_char(x) (operand_chars[(unsigned char) x])
195 #define is_register_char(x) (register_chars[(unsigned char) x])
196 #define is_space_char(x) ((x) == ' ')
197 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
198 #define is_digit_char(x) (digit_chars[(unsigned char) x])
200 /* put here all non-digit non-letter charcters that may occur in an operand */
201 static char operand_special_chars
[] = "%$-+(,)*._~/<>|&^!:[@]";
203 /* md_assemble() always leaves the strings it's passed unaltered. To
204 effect this we maintain a stack of saved characters that we've smashed
205 with '\0's (indicating end of strings for various sub-fields of the
206 assembler instruction). */
207 static char save_stack
[32];
208 static char *save_stack_p
; /* stack pointer */
209 #define END_STRING_AND_SAVE(s) \
210 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
211 #define RESTORE_END_STRING(s) \
212 do { *(s) = *--save_stack_p; } while (0)
214 /* The instruction we're assembling. */
217 /* Possible templates for current insn. */
218 static const templates
*current_templates
;
220 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
221 static expressionS disp_expressions
[2], im_expressions
[2];
223 static int this_operand
; /* current operand we are working on */
225 static int flag_do_long_jump
; /* FIXME what does this do? */
227 static int flag_16bit_code
; /* 1 if we're writing 16-bit code, 0 if 32-bit */
229 static int intel_syntax
= 0; /* 1 for intel syntax, 0 if att syntax */
231 static int allow_naked_reg
= 0; /* 1 if register prefix % not required */
233 static char stackop_size
= '\0'; /* Used in 16 bit gcc mode to add an l
234 suffix to call, ret, enter, leave, push,
235 and pop instructions. */
237 /* Interface to relax_segment.
238 There are 2 relax states for 386 jump insns: one for conditional &
239 one for unconditional jumps. This is because the these two types
240 of jumps add different sizes to frags when we're figuring out what
241 sort of jump to choose to reach a given label. */
244 #define COND_JUMP 1 /* conditional jump */
245 #define UNCOND_JUMP 2 /* unconditional jump */
249 #define SMALL16 (SMALL|CODE16)
251 #define BIG16 (BIG|CODE16)
255 #define INLINE __inline__
261 #define ENCODE_RELAX_STATE(type,size) \
262 ((relax_substateT)((type<<2) | (size)))
263 #define SIZE_FROM_RELAX_STATE(s) \
264 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
266 /* This table is used by relax_frag to promote short jumps to long
267 ones where necessary. SMALL (short) jumps may be promoted to BIG
268 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
269 don't allow a short jump in a 32 bit code segment to be promoted to
270 a 16 bit offset jump because it's slower (requires data size
271 prefix), and doesn't work, unless the destination is in the bottom
272 64k of the code segment (The top 16 bits of eip are zeroed). */
274 const relax_typeS md_relax_table
[] =
277 1) most positive reach of this state,
278 2) most negative reach of this state,
279 3) how many bytes this mode will add to the size of the current frag
280 4) which index into the table to try if we can't fit into this one.
287 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG
)},
288 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP
, BIG16
)},
289 /* dword conditionals adds 4 bytes to frag:
290 1 extra opcode byte, 3 extra displacement bytes. */
292 /* word conditionals add 2 bytes to frag:
293 1 extra opcode byte, 1 extra displacement byte. */
296 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
)},
297 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
)},
298 /* dword jmp adds 3 bytes to frag:
299 0 extra opcode bytes, 3 extra displacement bytes. */
301 /* word jmp adds 1 byte to frag:
302 0 extra opcode bytes, 1 extra displacement byte. */
309 i386_align_code (fragP
, count
)
313 /* Various efficient no-op patterns for aligning code labels. */
314 /* Note: Don't try to assemble the instructions in the comments. */
315 /* 0L and 0w are not legal */
316 static const char f32_1
[] =
318 static const char f32_2
[] =
319 {0x89,0xf6}; /* movl %esi,%esi */
320 static const char f32_3
[] =
321 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
322 static const char f32_4
[] =
323 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
324 static const char f32_5
[] =
326 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
327 static const char f32_6
[] =
328 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
329 static const char f32_7
[] =
330 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
331 static const char f32_8
[] =
333 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
334 static const char f32_9
[] =
335 {0x89,0xf6, /* movl %esi,%esi */
336 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
337 static const char f32_10
[] =
338 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
339 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
340 static const char f32_11
[] =
341 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
342 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
343 static const char f32_12
[] =
344 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
345 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
346 static const char f32_13
[] =
347 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
348 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
349 static const char f32_14
[] =
350 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
351 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
352 static const char f32_15
[] =
353 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
354 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
355 static const char f16_3
[] =
356 {0x8d,0x74,0x00}; /* lea 0(%esi),%esi */
357 static const char f16_4
[] =
358 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
359 static const char f16_5
[] =
361 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
362 static const char f16_6
[] =
363 {0x89,0xf6, /* mov %si,%si */
364 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
365 static const char f16_7
[] =
366 {0x8d,0x74,0x00, /* lea 0(%si),%si */
367 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
368 static const char f16_8
[] =
369 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
370 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
371 static const char *const f32_patt
[] = {
372 f32_1
, f32_2
, f32_3
, f32_4
, f32_5
, f32_6
, f32_7
, f32_8
,
373 f32_9
, f32_10
, f32_11
, f32_12
, f32_13
, f32_14
, f32_15
375 static const char *const f16_patt
[] = {
376 f32_1
, f32_2
, f16_3
, f16_4
, f16_5
, f16_6
, f16_7
, f16_8
,
377 f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
, f32_15
380 if (count
> 0 && count
<= 15)
384 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
385 f16_patt
[count
- 1], count
);
386 if (count
> 8) /* adjust jump offset */
387 fragP
->fr_literal
[fragP
->fr_fix
+ 1] = count
- 2;
390 memcpy(fragP
->fr_literal
+ fragP
->fr_fix
,
391 f32_patt
[count
- 1], count
);
392 fragP
->fr_var
= count
;
396 static char *output_invalid
PARAMS ((int c
));
397 static int i386_operand
PARAMS ((char *operand_string
));
398 static int i386_intel_operand
PARAMS ((char *operand_string
, int got_a_float
));
399 static const reg_entry
*parse_register
PARAMS ((char *reg_string
,
403 static void s_bss
PARAMS ((int));
406 symbolS
*GOT_symbol
; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
408 static INLINE
unsigned int
409 mode_from_disp_size (t
)
412 return (t
& Disp8
) ? 1 : (t
& (Disp16
|Disp32
)) ? 2 : 0;
416 fits_in_signed_byte (num
)
419 return (num
>= -128) && (num
<= 127);
420 } /* fits_in_signed_byte() */
423 fits_in_unsigned_byte (num
)
426 return (num
& 0xff) == num
;
427 } /* fits_in_unsigned_byte() */
430 fits_in_unsigned_word (num
)
433 return (num
& 0xffff) == num
;
434 } /* fits_in_unsigned_word() */
437 fits_in_signed_word (num
)
440 return (-32768 <= num
) && (num
<= 32767);
441 } /* fits_in_signed_word() */
444 smallest_imm_type (num
)
448 /* This code is disabled because all the Imm1 forms in the opcode table
449 are slower on the i486, and they're the versions with the implicitly
450 specified single-position displacement, which has another syntax if
451 you really want to use that form. If you really prefer to have the
452 one-byte-shorter Imm1 form despite these problems, re-enable this
455 return Imm1
| Imm8
| Imm8S
| Imm16
| Imm32
;
457 return (fits_in_signed_byte (num
)
458 ? (Imm8S
| Imm8
| Imm16
| Imm32
)
459 : fits_in_unsigned_byte (num
)
460 ? (Imm8
| Imm16
| Imm32
)
461 : (fits_in_signed_word (num
) || fits_in_unsigned_word (num
))
464 } /* smallest_imm_type() */
466 /* Returns 0 if attempting to add a prefix where one from the same
467 class already exists, 1 if non rep/repne added, 2 if rep/repne
481 case CS_PREFIX_OPCODE
:
482 case DS_PREFIX_OPCODE
:
483 case ES_PREFIX_OPCODE
:
484 case FS_PREFIX_OPCODE
:
485 case GS_PREFIX_OPCODE
:
486 case SS_PREFIX_OPCODE
:
490 case REPNE_PREFIX_OPCODE
:
491 case REPE_PREFIX_OPCODE
:
494 case LOCK_PREFIX_OPCODE
:
502 case ADDR_PREFIX_OPCODE
:
506 case DATA_PREFIX_OPCODE
:
513 as_bad (_("same type of prefix used twice"));
518 i
.prefix
[q
] = prefix
;
523 set_16bit_code_flag (new_16bit_code_flag
)
524 int new_16bit_code_flag
;
526 flag_16bit_code
= new_16bit_code_flag
;
531 set_16bit_gcc_code_flag (new_16bit_code_flag
)
532 int new_16bit_code_flag
;
534 flag_16bit_code
= new_16bit_code_flag
;
535 stackop_size
= new_16bit_code_flag
? 'l' : '\0';
539 set_intel_syntax (syntax_flag
)
542 /* Find out if register prefixing is specified. */
543 int ask_naked_reg
= 0;
546 if (! is_end_of_line
[(unsigned char) *input_line_pointer
])
548 char *string
= input_line_pointer
;
549 int e
= get_symbol_end ();
551 if (strcmp(string
, "prefix") == 0)
553 else if (strcmp(string
, "noprefix") == 0)
556 as_bad (_("Bad argument to syntax directive."));
557 *input_line_pointer
= e
;
559 demand_empty_rest_of_line ();
561 intel_syntax
= syntax_flag
;
563 if (ask_naked_reg
== 0)
566 allow_naked_reg
= (intel_syntax
567 && (bfd_get_symbol_leading_char (stdoutput
) != '\0'));
569 allow_naked_reg
= 0; /* conservative default */
573 allow_naked_reg
= (ask_naked_reg
< 0);
576 const pseudo_typeS md_pseudo_table
[] =
581 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
582 {"align", s_align_bytes
, 0},
584 {"align", s_align_ptwo
, 0},
586 {"ffloat", float_cons
, 'f'},
587 {"dfloat", float_cons
, 'd'},
588 {"tfloat", float_cons
, 'x'},
590 {"noopt", s_ignore
, 0},
591 {"optim", s_ignore
, 0},
592 {"code16gcc", set_16bit_gcc_code_flag
, 1},
593 {"code16", set_16bit_code_flag
, 1},
594 {"code32", set_16bit_code_flag
, 0},
595 {"intel_syntax", set_intel_syntax
, 1},
596 {"att_syntax", set_intel_syntax
, 0},
600 /* for interface with expression () */
601 extern char *input_line_pointer
;
603 /* hash table for instruction mnemonic lookup */
604 static struct hash_control
*op_hash
;
605 /* hash table for register lookup */
606 static struct hash_control
*reg_hash
;
612 const char *hash_err
;
614 /* initialize op_hash hash table */
615 op_hash
= hash_new ();
618 register const template *optab
;
619 register templates
*core_optab
;
621 optab
= i386_optab
; /* setup for loop */
622 core_optab
= (templates
*) xmalloc (sizeof (templates
));
623 core_optab
->start
= optab
;
628 if (optab
->name
== NULL
629 || strcmp (optab
->name
, (optab
- 1)->name
) != 0)
631 /* different name --> ship out current template list;
632 add to hash table; & begin anew */
633 core_optab
->end
= optab
;
634 hash_err
= hash_insert (op_hash
,
640 as_fatal (_("Internal Error: Can't hash %s: %s"),
644 if (optab
->name
== NULL
)
646 core_optab
= (templates
*) xmalloc (sizeof (templates
));
647 core_optab
->start
= optab
;
652 /* initialize reg_hash hash table */
653 reg_hash
= hash_new ();
655 register const reg_entry
*regtab
;
657 for (regtab
= i386_regtab
;
658 regtab
< i386_regtab
+ sizeof (i386_regtab
) / sizeof (i386_regtab
[0]);
661 hash_err
= hash_insert (reg_hash
, regtab
->reg_name
, (PTR
) regtab
);
667 /* fill in lexical tables: mnemonic_chars, operand_chars. */
672 for (c
= 0; c
< 256; c
++)
677 mnemonic_chars
[c
] = c
;
678 register_chars
[c
] = c
;
679 operand_chars
[c
] = c
;
681 else if (islower (c
))
683 mnemonic_chars
[c
] = c
;
684 register_chars
[c
] = c
;
685 operand_chars
[c
] = c
;
687 else if (isupper (c
))
689 mnemonic_chars
[c
] = tolower (c
);
690 register_chars
[c
] = mnemonic_chars
[c
];
691 operand_chars
[c
] = c
;
694 if (isalpha (c
) || isdigit (c
))
695 identifier_chars
[c
] = c
;
698 identifier_chars
[c
] = c
;
699 operand_chars
[c
] = c
;
704 identifier_chars
['@'] = '@';
706 digit_chars
['-'] = '-';
707 identifier_chars
['_'] = '_';
708 identifier_chars
['.'] = '.';
710 for (p
= operand_special_chars
; *p
!= '\0'; p
++)
711 operand_chars
[(unsigned char) *p
] = *p
;
714 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
715 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
)
717 record_alignment (text_section
, 2);
718 record_alignment (data_section
, 2);
719 record_alignment (bss_section
, 2);
725 i386_print_statistics (file
)
728 hash_print_statistics (file
, "i386 opcode", op_hash
);
729 hash_print_statistics (file
, "i386 register", reg_hash
);
735 /* debugging routines for md_assemble */
736 static void pi
PARAMS ((char *, i386_insn
*));
737 static void pte
PARAMS ((template *));
738 static void pt
PARAMS ((unsigned int));
739 static void pe
PARAMS ((expressionS
*));
740 static void ps
PARAMS ((symbolS
*));
747 register template *p
;
750 fprintf (stdout
, "%s: template ", line
);
752 fprintf (stdout
, " modrm: mode %x reg %x reg/mem %x",
753 x
->rm
.mode
, x
->rm
.reg
, x
->rm
.regmem
);
754 fprintf (stdout
, " base %x index %x scale %x\n",
755 x
->bi
.base
, x
->bi
.index
, x
->bi
.scale
);
756 for (i
= 0; i
< x
->operands
; i
++)
758 fprintf (stdout
, " #%d: ", i
+ 1);
760 fprintf (stdout
, "\n");
762 & (Reg
| SReg2
| SReg3
| Control
| Debug
| Test
| RegMMX
| RegXMM
))
763 fprintf (stdout
, "%s\n", x
->regs
[i
]->reg_name
);
764 if (x
->types
[i
] & Imm
)
766 if (x
->types
[i
] & Disp
)
776 fprintf (stdout
, " %d operands ", t
->operands
);
777 fprintf (stdout
, "opcode %x ",
779 if (t
->extension_opcode
!= None
)
780 fprintf (stdout
, "ext %x ", t
->extension_opcode
);
781 if (t
->opcode_modifier
& D
)
782 fprintf (stdout
, "D");
783 if (t
->opcode_modifier
& W
)
784 fprintf (stdout
, "W");
785 fprintf (stdout
, "\n");
786 for (i
= 0; i
< t
->operands
; i
++)
788 fprintf (stdout
, " #%d type ", i
+ 1);
789 pt (t
->operand_types
[i
]);
790 fprintf (stdout
, "\n");
798 fprintf (stdout
, " operation %d\n", e
->X_op
);
799 fprintf (stdout
, " add_number %ld (%lx)\n",
800 (long) e
->X_add_number
, (long) e
->X_add_number
);
803 fprintf (stdout
, " add_symbol ");
804 ps (e
->X_add_symbol
);
805 fprintf (stdout
, "\n");
809 fprintf (stdout
, " op_symbol ");
811 fprintf (stdout
, "\n");
819 fprintf (stdout
, "%s type %s%s",
821 S_IS_EXTERNAL (s
) ? "EXTERNAL " : "",
822 segment_name (S_GET_SEGMENT (s
)));
841 { BaseIndex
, "BaseIndex" },
845 { InOutPortReg
, "InOutPortReg" },
846 { ShiftCount
, "ShiftCount" },
847 { Control
, "control reg" },
848 { Test
, "test reg" },
849 { Debug
, "debug reg" },
850 { FloatReg
, "FReg" },
851 { FloatAcc
, "FAcc" },
855 { JumpAbsolute
, "Jump Absolute" },
866 register struct type_name
*ty
;
870 fprintf (stdout
, _("Unknown"));
874 for (ty
= type_names
; ty
->mask
; ty
++)
876 fprintf (stdout
, "%s, ", ty
->tname
);
881 #endif /* DEBUG386 */
884 tc_i386_force_relocation (fixp
)
888 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
889 || fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
894 return fixp
->fx_r_type
==7;
899 static bfd_reloc_code_real_type reloc
900 PARAMS ((int, int, bfd_reloc_code_real_type
));
902 static bfd_reloc_code_real_type
903 reloc (size
, pcrel
, other
)
906 bfd_reloc_code_real_type other
;
908 if (other
!= NO_RELOC
) return other
;
914 case 1: return BFD_RELOC_8_PCREL
;
915 case 2: return BFD_RELOC_16_PCREL
;
916 case 4: return BFD_RELOC_32_PCREL
;
918 as_bad (_("Can not do %d byte pc-relative relocation"), size
);
924 case 1: return BFD_RELOC_8
;
925 case 2: return BFD_RELOC_16
;
926 case 4: return BFD_RELOC_32
;
928 as_bad (_("Can not do %d byte relocation"), size
);
931 return BFD_RELOC_NONE
;
935 * Here we decide which fixups can be adjusted to make them relative to
936 * the beginning of the section instead of the symbol. Basically we need
937 * to make sure that the dynamic relocations are done correctly, so in
938 * some cases we force the original symbol to be used.
941 tc_i386_fix_adjustable (fixP
)
944 #if defined (OBJ_ELF) || defined (TE_PE)
945 /* Prevent all adjustments to global symbols, or else dynamic
946 linking will not work correctly. */
947 if (S_IS_EXTERN (fixP
->fx_addsy
))
949 if (S_IS_WEAK (fixP
->fx_addsy
))
952 /* adjust_reloc_syms doesn't know about the GOT */
953 if (fixP
->fx_r_type
== BFD_RELOC_386_GOTOFF
954 || fixP
->fx_r_type
== BFD_RELOC_386_PLT32
955 || fixP
->fx_r_type
== BFD_RELOC_386_GOT32
956 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_INHERIT
957 || fixP
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
962 #define reloc(SIZE,PCREL,OTHER) 0
963 #define BFD_RELOC_16 0
964 #define BFD_RELOC_32 0
965 #define BFD_RELOC_16_PCREL 0
966 #define BFD_RELOC_32_PCREL 0
967 #define BFD_RELOC_386_PLT32 0
968 #define BFD_RELOC_386_GOT32 0
969 #define BFD_RELOC_386_GOTOFF 0
973 intel_float_operand
PARAMS ((char *mnemonic
));
976 intel_float_operand (mnemonic
)
979 if (mnemonic
[0] == 'f' && mnemonic
[1] =='i')
982 if (mnemonic
[0] == 'f')
988 /* This is the guts of the machine-dependent assembler. LINE points to a
989 machine dependent instruction. This function is supposed to emit
990 the frags/bytes it assembles to. */
996 /* Points to template once we've found it. */
999 /* Count the size of the instruction generated. */
1004 char mnemonic
[MAX_MNEM_SIZE
];
1006 /* Initialize globals. */
1007 memset (&i
, '\0', sizeof (i
));
1008 for (j
= 0; j
< MAX_OPERANDS
; j
++)
1009 i
.disp_reloc
[j
] = NO_RELOC
;
1010 memset (disp_expressions
, '\0', sizeof (disp_expressions
));
1011 memset (im_expressions
, '\0', sizeof (im_expressions
));
1012 save_stack_p
= save_stack
; /* reset stack pointer */
1014 /* First parse an instruction mnemonic & call i386_operand for the operands.
1015 We assume that the scrubber has arranged it so that line[0] is the valid
1016 start of a (possibly prefixed) mnemonic. */
1019 char *token_start
= l
;
1022 /* Non-zero if we found a prefix only acceptable with string insns. */
1023 const char *expecting_string_instruction
= NULL
;
1028 while ((*mnem_p
= mnemonic_chars
[(unsigned char) *l
]) != 0)
1031 if (mnem_p
>= mnemonic
+ sizeof (mnemonic
))
1033 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1038 if (!is_space_char (*l
)
1039 && *l
!= END_OF_INSN
1040 && *l
!= PREFIX_SEPARATOR
)
1042 as_bad (_("invalid character %s in mnemonic"),
1043 output_invalid (*l
));
1046 if (token_start
== l
)
1048 if (*l
== PREFIX_SEPARATOR
)
1049 as_bad (_("expecting prefix; got nothing"));
1051 as_bad (_("expecting mnemonic; got nothing"));
1055 /* Look up instruction (or prefix) via hash table. */
1056 current_templates
= hash_find (op_hash
, mnemonic
);
1058 if (*l
!= END_OF_INSN
1059 && (! is_space_char (*l
) || l
[1] != END_OF_INSN
)
1060 && current_templates
1061 && (current_templates
->start
->opcode_modifier
& IsPrefix
))
1063 /* If we are in 16-bit mode, do not allow addr16 or data16.
1064 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1065 if ((current_templates
->start
->opcode_modifier
& (Size16
| Size32
))
1066 && (((current_templates
->start
->opcode_modifier
& Size32
) != 0)
1069 as_bad (_("redundant %s prefix"),
1070 current_templates
->start
->name
);
1073 /* Add prefix, checking for repeated prefixes. */
1074 switch (add_prefix (current_templates
->start
->base_opcode
))
1079 expecting_string_instruction
=
1080 current_templates
->start
->name
;
1083 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1090 if (!current_templates
)
1092 /* See if we can get a match by trimming off a suffix. */
1095 case DWORD_MNEM_SUFFIX
:
1096 case WORD_MNEM_SUFFIX
:
1097 case BYTE_MNEM_SUFFIX
:
1098 case SHORT_MNEM_SUFFIX
:
1099 #if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
1100 case LONG_MNEM_SUFFIX
:
1102 i
.suffix
= mnem_p
[-1];
1104 current_templates
= hash_find (op_hash
, mnemonic
);
1108 case INTEL_DWORD_MNEM_SUFFIX
:
1111 i
.suffix
= mnem_p
[-1];
1113 current_templates
= hash_find (op_hash
, mnemonic
);
1117 if (!current_templates
)
1119 as_bad (_("no such 386 instruction: `%s'"), token_start
);
1124 /* check for rep/repne without a string instruction */
1125 if (expecting_string_instruction
1126 && !(current_templates
->start
->opcode_modifier
& IsString
))
1128 as_bad (_("expecting string instruction after `%s'"),
1129 expecting_string_instruction
);
1133 /* There may be operands to parse. */
1134 if (*l
!= END_OF_INSN
)
1136 /* parse operands */
1138 /* 1 if operand is pending after ','. */
1139 unsigned int expecting_operand
= 0;
1141 /* Non-zero if operand parens not balanced. */
1142 unsigned int paren_not_balanced
;
1146 /* skip optional white space before operand */
1147 if (is_space_char (*l
))
1149 if (!is_operand_char (*l
) && *l
!= END_OF_INSN
)
1151 as_bad (_("invalid character %s before operand %d"),
1152 output_invalid (*l
),
1156 token_start
= l
; /* after white space */
1157 paren_not_balanced
= 0;
1158 while (paren_not_balanced
|| *l
!= ',')
1160 if (*l
== END_OF_INSN
)
1162 if (paren_not_balanced
)
1165 as_bad (_("unbalanced parenthesis in operand %d."),
1168 as_bad (_("unbalanced brackets in operand %d."),
1173 break; /* we are done */
1175 else if (!is_operand_char (*l
) && !is_space_char (*l
))
1177 as_bad (_("invalid character %s in operand %d"),
1178 output_invalid (*l
),
1185 ++paren_not_balanced
;
1187 --paren_not_balanced
;
1192 ++paren_not_balanced
;
1194 --paren_not_balanced
;
1198 if (l
!= token_start
)
1199 { /* yes, we've read in another operand */
1200 unsigned int operand_ok
;
1201 this_operand
= i
.operands
++;
1202 if (i
.operands
> MAX_OPERANDS
)
1204 as_bad (_("spurious operands; (%d operands/instruction max)"),
1208 /* now parse operand adding info to 'i' as we go along */
1209 END_STRING_AND_SAVE (l
);
1212 operand_ok
= i386_intel_operand (token_start
, intel_float_operand (mnemonic
));
1214 operand_ok
= i386_operand (token_start
);
1216 RESTORE_END_STRING (l
); /* restore old contents */
1222 if (expecting_operand
)
1224 expecting_operand_after_comma
:
1225 as_bad (_("expecting operand after ','; got nothing"));
1230 as_bad (_("expecting operand before ','; got nothing"));
1235 /* now *l must be either ',' or END_OF_INSN */
1238 if (*++l
== END_OF_INSN
)
1239 { /* just skip it, if it's \n complain */
1240 goto expecting_operand_after_comma
;
1242 expecting_operand
= 1;
1245 while (*l
!= END_OF_INSN
); /* until we get end of insn */
1249 /* Now we've parsed the mnemonic into a set of templates, and have the
1252 Next, we find a template that matches the given insn,
1253 making sure the overlap of the given operands types is consistent
1254 with the template operand types. */
1256 #define MATCH(overlap, given, template) \
1258 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1259 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1261 /* If given types r0 and r1 are registers they must be of the same type
1262 unless the expected operand type register overlap is null.
1263 Note that Acc in a template matches every size of reg. */
1264 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1265 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1266 ((g0) & Reg) == ((g1) & Reg) || \
1267 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1270 register unsigned int overlap0
, overlap1
;
1271 unsigned int overlap2
;
1272 unsigned int found_reverse_match
;
1275 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1277 && (strcmp (mnemonic
, "enter") != 0)
1278 && (strcmp (mnemonic
, "bound") != 0)
1279 && (strncmp (mnemonic
, "fsub", 4) !=0)
1280 && (strncmp (mnemonic
, "fdiv", 4) !=0))
1282 const reg_entry
*temp_reg
= NULL
;
1283 expressionS
*temp_disp
= NULL
;
1284 expressionS
*temp_imm
= NULL
;
1285 unsigned int temp_type
;
1289 if (i
.operands
== 2)
1294 else if (i
.operands
== 3)
1302 temp_type
= i
.types
[xchg2
];
1303 if (temp_type
& (Reg
| FloatReg
))
1304 temp_reg
= i
.regs
[xchg2
];
1305 else if (temp_type
& Imm
)
1306 temp_imm
= i
.imms
[xchg2
];
1307 else if (temp_type
& Disp
)
1308 temp_disp
= i
.disps
[xchg2
];
1310 i
.types
[xchg2
] = i
.types
[xchg1
];
1312 if (i
.types
[xchg1
] & (Reg
| FloatReg
))
1314 i
.regs
[xchg2
] = i
.regs
[xchg1
];
1315 i
.regs
[xchg1
] = NULL
;
1317 else if (i
.types
[xchg2
] & Imm
)
1319 i
.imms
[xchg2
] = i
.imms
[xchg1
];
1320 i
.imms
[xchg1
] = NULL
;
1322 else if (i
.types
[xchg2
] & Disp
)
1324 i
.disps
[xchg2
] = i
.disps
[xchg1
];
1325 i
.disps
[xchg1
] = NULL
;
1328 if (temp_type
& (Reg
| FloatReg
))
1330 i
.regs
[xchg1
] = temp_reg
;
1331 if (! (i
.types
[xchg1
] & (Reg
| FloatReg
)))
1332 i
.regs
[xchg2
] = NULL
;
1334 else if (temp_type
& Imm
)
1336 i
.imms
[xchg1
] = temp_imm
;
1337 if (! (i
.types
[xchg1
] & Imm
))
1338 i
.imms
[xchg2
] = NULL
;
1340 else if (temp_type
& Disp
)
1342 i
.disps
[xchg1
] = temp_disp
;
1343 if (! (i
.types
[xchg1
] & Disp
))
1344 i
.disps
[xchg2
] = NULL
;
1347 i
.types
[xchg1
] = temp_type
;
1349 if (!strcmp(mnemonic
,"jmp")
1350 || !strcmp (mnemonic
, "call"))
1351 if ((i
.types
[0] & Reg
) || i
.types
[0] & BaseIndex
)
1352 i
.types
[0] |= JumpAbsolute
;
1358 found_reverse_match
= 0;
1359 suffix_check
= (i
.suffix
== BYTE_MNEM_SUFFIX
1361 : (i
.suffix
== WORD_MNEM_SUFFIX
1363 : (i
.suffix
== SHORT_MNEM_SUFFIX
1365 : (i
.suffix
== LONG_MNEM_SUFFIX
1367 : (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
1369 : (i
.suffix
== LONG_DOUBLE_MNEM_SUFFIX
? No_xSuf
: 0))))));
1371 for (t
= current_templates
->start
;
1372 t
< current_templates
->end
;
1375 /* Must have right number of operands. */
1376 if (i
.operands
!= t
->operands
)
1379 /* For some opcodes, don't check the suffix */
1382 if (strcmp (t
->name
, "fnstcw")
1383 && strcmp (t
->name
, "fldcw")
1384 && (t
->opcode_modifier
& suffix_check
))
1387 /* Must not have disallowed suffix. */
1388 else if ((t
->opcode_modifier
& suffix_check
))
1391 else if (!t
->operands
)
1392 break; /* 0 operands always matches */
1394 overlap0
= i
.types
[0] & t
->operand_types
[0];
1395 switch (t
->operands
)
1398 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0]))
1403 overlap1
= i
.types
[1] & t
->operand_types
[1];
1404 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[0])
1405 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[1])
1406 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1407 t
->operand_types
[0],
1408 overlap1
, i
.types
[1],
1409 t
->operand_types
[1]))
1412 /* check if other direction is valid ... */
1413 if ((t
->opcode_modifier
& (D
|FloatD
)) == 0)
1416 /* try reversing direction of operands */
1417 overlap0
= i
.types
[0] & t
->operand_types
[1];
1418 overlap1
= i
.types
[1] & t
->operand_types
[0];
1419 if (!MATCH (overlap0
, i
.types
[0], t
->operand_types
[1])
1420 || !MATCH (overlap1
, i
.types
[1], t
->operand_types
[0])
1421 || !CONSISTENT_REGISTER_MATCH (overlap0
, i
.types
[0],
1422 t
->operand_types
[1],
1423 overlap1
, i
.types
[1],
1424 t
->operand_types
[0]))
1426 /* does not match either direction */
1429 /* found_reverse_match holds which of D or FloatDR
1431 found_reverse_match
= t
->opcode_modifier
& (D
|FloatDR
);
1434 /* found a forward 2 operand match here */
1435 if (t
->operands
== 3)
1437 /* Here we make use of the fact that there are no
1438 reverse match 3 operand instructions, and all 3
1439 operand instructions only need to be checked for
1440 register consistency between operands 2 and 3. */
1441 overlap2
= i
.types
[2] & t
->operand_types
[2];
1442 if (!MATCH (overlap2
, i
.types
[2], t
->operand_types
[2])
1443 || !CONSISTENT_REGISTER_MATCH (overlap1
, i
.types
[1],
1444 t
->operand_types
[1],
1445 overlap2
, i
.types
[2],
1446 t
->operand_types
[2]))
1450 /* found either forward/reverse 2 or 3 operand match here:
1451 slip through to break */
1453 break; /* we've found a match; break out of loop */
1454 } /* for (t = ... */
1455 if (t
== current_templates
->end
)
1456 { /* we found no match */
1457 as_bad (_("suffix or operands invalid for `%s'"),
1458 current_templates
->start
->name
);
1462 if ((t
->opcode_modifier
& (IsPrefix
|IgnoreSize
)) == (IsPrefix
|IgnoreSize
))
1464 /* Warn them that a data or address size prefix doesn't affect
1465 assembly of the next line of code. */
1466 as_warn (_("stand-alone `%s' prefix"), t
->name
);
1469 /* Copy the template we found. */
1471 if (found_reverse_match
)
1473 i
.tm
.operand_types
[0] = t
->operand_types
[1];
1474 i
.tm
.operand_types
[1] = t
->operand_types
[0];
1478 if (i
.tm
.opcode_modifier
& FWait
)
1479 if (! add_prefix (FWAIT_OPCODE
))
1482 /* Check string instruction segment overrides */
1483 if ((i
.tm
.opcode_modifier
& IsString
) != 0 && i
.mem_operands
!= 0)
1485 int mem_op
= (i
.types
[0] & AnyMem
) ? 0 : 1;
1486 if ((i
.tm
.operand_types
[mem_op
] & EsSeg
) != 0)
1488 if (i
.seg
[0] != NULL
&& i
.seg
[0] != &es
)
1490 as_bad (_("`%s' operand %d must use `%%es' segment"),
1495 /* There's only ever one segment override allowed per instruction.
1496 This instruction possibly has a legal segment override on the
1497 second operand, so copy the segment to where non-string
1498 instructions store it, allowing common code. */
1499 i
.seg
[0] = i
.seg
[1];
1501 else if ((i
.tm
.operand_types
[mem_op
+ 1] & EsSeg
) != 0)
1503 if (i
.seg
[1] != NULL
&& i
.seg
[1] != &es
)
1505 as_bad (_("`%s' operand %d must use `%%es' segment"),
1513 /* If matched instruction specifies an explicit instruction mnemonic
1515 if (i
.tm
.opcode_modifier
& (Size16
| Size32
))
1517 if (i
.tm
.opcode_modifier
& Size16
)
1518 i
.suffix
= WORD_MNEM_SUFFIX
;
1520 i
.suffix
= DWORD_MNEM_SUFFIX
;
1522 else if (i
.reg_operands
)
1524 /* If there's no instruction mnemonic suffix we try to invent one
1525 based on register operands. */
1528 /* We take i.suffix from the last register operand specified,
1529 Destination register type is more significant than source
1532 for (op
= i
.operands
; --op
>= 0; )
1533 if (i
.types
[op
] & Reg
)
1535 i
.suffix
= ((i
.types
[op
] & Reg8
) ? BYTE_MNEM_SUFFIX
:
1536 (i
.types
[op
] & Reg16
) ? WORD_MNEM_SUFFIX
:
1541 else if (i
.suffix
== BYTE_MNEM_SUFFIX
)
1544 for (op
= i
.operands
; --op
>= 0; )
1546 /* If this is an eight bit register, it's OK. If it's
1547 the 16 or 32 bit version of an eight bit register,
1548 we will just use the low portion, and that's OK too. */
1549 if (i
.types
[op
] & Reg8
)
1552 /* movzx and movsx should not generate this warning. */
1554 && (i
.tm
.base_opcode
== 0xfb7
1555 || i
.tm
.base_opcode
== 0xfb6
1556 || i
.tm
.base_opcode
== 0xfbe
1557 || i
.tm
.base_opcode
== 0xfbf))
1560 if ((i
.types
[op
] & WordReg
) && i
.regs
[op
]->reg_num
< 4
1562 /* Check that the template allows eight bit regs
1563 This kills insns such as `orb $1,%edx', which
1564 maybe should be allowed. */
1565 && (i
.tm
.operand_types
[op
] & (Reg8
|InOutPortReg
))
1569 #if REGISTER_WARNINGS
1570 if ((i
.tm
.operand_types
[op
] & InOutPortReg
) == 0)
1571 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1572 (i
.regs
[op
] - (i
.types
[op
] & Reg16
? 8 : 16))->reg_name
,
1573 i
.regs
[op
]->reg_name
,
1578 /* Any other register is bad */
1579 if (i
.types
[op
] & (Reg
| RegMMX
| RegXMM
1581 | Control
| Debug
| Test
1582 | FloatReg
| FloatAcc
))
1584 as_bad (_("`%%%s' not allowed with `%s%c'"),
1585 i
.regs
[op
]->reg_name
,
1592 else if (i
.suffix
== DWORD_MNEM_SUFFIX
)
1595 for (op
= i
.operands
; --op
>= 0; )
1596 /* Reject eight bit registers, except where the template
1597 requires them. (eg. movzb) */
1598 if ((i
.types
[op
] & Reg8
) != 0
1599 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1601 as_bad (_("`%%%s' not allowed with `%s%c'"),
1602 i
.regs
[op
]->reg_name
,
1607 #if REGISTER_WARNINGS
1608 /* Warn if the e prefix on a general reg is missing. */
1609 else if ((i
.types
[op
] & Reg16
) != 0
1610 && (i
.tm
.operand_types
[op
] & (Reg32
|Acc
)) != 0)
1612 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1613 (i
.regs
[op
] + 8)->reg_name
,
1614 i
.regs
[op
]->reg_name
,
1619 else if (i
.suffix
== WORD_MNEM_SUFFIX
)
1622 for (op
= i
.operands
; --op
>= 0; )
1623 /* Reject eight bit registers, except where the template
1624 requires them. (eg. movzb) */
1625 if ((i
.types
[op
] & Reg8
) != 0
1626 && (i
.tm
.operand_types
[op
] & (Reg16
|Reg32
|Acc
)) != 0)
1628 as_bad (_("`%%%s' not allowed with `%s%c'"),
1629 i
.regs
[op
]->reg_name
,
1634 #if REGISTER_WARNINGS
1635 /* Warn if the e prefix on a general reg is present. */
1636 else if ((i
.types
[op
] & Reg32
) != 0
1637 && (i
.tm
.operand_types
[op
] & (Reg16
|Acc
)) != 0)
1639 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1640 (i
.regs
[op
] - 8)->reg_name
,
1641 i
.regs
[op
]->reg_name
,
1649 else if ((i
.tm
.opcode_modifier
& DefaultSize
) && !i
.suffix
)
1651 i
.suffix
= stackop_size
;
1654 /* Make still unresolved immediate matches conform to size of immediate
1655 given in i.suffix. Note: overlap2 cannot be an immediate! */
1656 if ((overlap0
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1657 && overlap0
!= Imm8
&& overlap0
!= Imm8S
1658 && overlap0
!= Imm16
&& overlap0
!= Imm32
)
1662 overlap0
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1663 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1665 else if (overlap0
== (Imm16
| Imm32
))
1668 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1672 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1676 if ((overlap1
& (Imm8
| Imm8S
| Imm16
| Imm32
))
1677 && overlap1
!= Imm8
&& overlap1
!= Imm8S
1678 && overlap1
!= Imm16
&& overlap1
!= Imm32
)
1682 overlap1
&= (i
.suffix
== BYTE_MNEM_SUFFIX
? (Imm8
| Imm8S
) :
1683 (i
.suffix
== WORD_MNEM_SUFFIX
? Imm16
: Imm32
));
1685 else if (overlap1
== (Imm16
| Imm32
))
1688 (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0)) ? Imm16
: Imm32
;
1692 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1696 assert ((overlap2
& Imm
) == 0);
1698 i
.types
[0] = overlap0
;
1699 if (overlap0
& ImplicitRegister
)
1701 if (overlap0
& Imm1
)
1702 i
.imm_operands
= 0; /* kludge for shift insns */
1704 i
.types
[1] = overlap1
;
1705 if (overlap1
& ImplicitRegister
)
1708 i
.types
[2] = overlap2
;
1709 if (overlap2
& ImplicitRegister
)
1712 /* Finalize opcode. First, we change the opcode based on the operand
1713 size given by i.suffix: We need not change things for byte insns. */
1715 if (!i
.suffix
&& (i
.tm
.opcode_modifier
& W
))
1717 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1721 /* For movzx and movsx, need to check the register type */
1723 && (i
.tm
.base_opcode
== 0xfb6 || i
.tm
.base_opcode
== 0xfbe))
1724 if (i
.suffix
&& i
.suffix
== BYTE_MNEM_SUFFIX
)
1726 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1728 if ((i
.regs
[1]->reg_type
& Reg16
) != 0)
1729 if (!add_prefix (prefix
))
1733 if (i
.suffix
&& i
.suffix
!= BYTE_MNEM_SUFFIX
)
1735 /* It's not a byte, select word/dword operation. */
1736 if (i
.tm
.opcode_modifier
& W
)
1738 if (i
.tm
.opcode_modifier
& ShortForm
)
1739 i
.tm
.base_opcode
|= 8;
1741 i
.tm
.base_opcode
|= 1;
1743 /* Now select between word & dword operations via the operand
1744 size prefix, except for instructions that will ignore this
1746 if (((intel_syntax
&& (i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1747 || i
.suffix
== DWORD_MNEM_SUFFIX
1748 || i
.suffix
== LONG_MNEM_SUFFIX
) == flag_16bit_code
1749 && !(i
.tm
.opcode_modifier
& IgnoreSize
))
1751 unsigned int prefix
= DATA_PREFIX_OPCODE
;
1752 if (i
.tm
.opcode_modifier
& JumpByte
) /* jcxz, loop */
1753 prefix
= ADDR_PREFIX_OPCODE
;
1755 if (! add_prefix (prefix
))
1758 /* Size floating point instruction. */
1759 if (i
.suffix
== LONG_MNEM_SUFFIX
1760 || (intel_syntax
&& i
.suffix
== INTEL_DWORD_MNEM_SUFFIX
))
1762 if (i
.tm
.opcode_modifier
& FloatMF
)
1763 i
.tm
.base_opcode
^= 4;
1767 if (i
.tm
.opcode_modifier
& ImmExt
)
1769 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1770 opcode suffix which is coded in the same place as an 8-bit
1771 immediate field would be. Here we fake an 8-bit immediate
1772 operand from the opcode suffix stored in tm.extension_opcode. */
1776 assert(i
.imm_operands
== 0 && i
.operands
<= 2);
1778 exp
= &im_expressions
[i
.imm_operands
++];
1779 i
.imms
[i
.operands
] = exp
;
1780 i
.types
[i
.operands
++] = Imm8
;
1781 exp
->X_op
= O_constant
;
1782 exp
->X_add_number
= i
.tm
.extension_opcode
;
1783 i
.tm
.extension_opcode
= None
;
1786 /* For insns with operands there are more diddles to do to the opcode. */
1789 /* Default segment register this instruction will use
1790 for memory accesses. 0 means unknown.
1791 This is only for optimizing out unnecessary segment overrides. */
1792 const seg_entry
*default_seg
= 0;
1794 /* If we found a reverse match we must alter the opcode
1795 direction bit. found_reverse_match holds bits to change
1796 (different for int & float insns). */
1798 i
.tm
.base_opcode
^= found_reverse_match
;
1800 /* The imul $imm, %reg instruction is converted into
1801 imul $imm, %reg, %reg, and the clr %reg instruction
1802 is converted into xor %reg, %reg. */
1803 if (i
.tm
.opcode_modifier
& regKludge
)
1805 unsigned int first_reg_op
= (i
.types
[0] & Reg
) ? 0 : 1;
1806 /* Pretend we saw the extra register operand. */
1807 i
.regs
[first_reg_op
+1] = i
.regs
[first_reg_op
];
1811 if (i
.tm
.opcode_modifier
& ShortForm
)
1813 /* The register or float register operand is in operand 0 or 1. */
1814 unsigned int op
= (i
.types
[0] & (Reg
| FloatReg
)) ? 0 : 1;
1815 /* Register goes in low 3 bits of opcode. */
1816 i
.tm
.base_opcode
|= i
.regs
[op
]->reg_num
;
1817 if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
1819 /* Warn about some common errors, but press on regardless.
1820 The first case can be generated by gcc (<= 2.8.1). */
1821 if (i
.operands
== 2)
1823 /* reversed arguments on faddp, fsubp, etc. */
1824 as_warn (_("translating to `%s %%%s,%%%s'"), i
.tm
.name
,
1825 i
.regs
[1]->reg_name
,
1826 i
.regs
[0]->reg_name
);
1830 /* extraneous `l' suffix on fp insn */
1831 as_warn (_("translating to `%s %%%s'"), i
.tm
.name
,
1832 i
.regs
[0]->reg_name
);
1836 else if (i
.tm
.opcode_modifier
& Modrm
)
1838 /* The opcode is completed (modulo i.tm.extension_opcode which
1839 must be put into the modrm byte).
1840 Now, we make the modrm & index base bytes based on all the
1841 info we've collected. */
1843 /* i.reg_operands MUST be the number of real register operands;
1844 implicit registers do not count. */
1845 if (i
.reg_operands
== 2)
1847 unsigned int source
, dest
;
1848 source
= ((i
.types
[0]
1849 & (Reg
| RegMMX
| RegXMM
1851 | Control
| Debug
| Test
))
1856 /* One of the register operands will be encoded in the
1857 i.tm.reg field, the other in the combined i.tm.mode
1858 and i.tm.regmem fields. If no form of this
1859 instruction supports a memory destination operand,
1860 then we assume the source operand may sometimes be
1861 a memory operand and so we need to store the
1862 destination in the i.rm.reg field. */
1863 if ((i
.tm
.operand_types
[dest
] & AnyMem
) == 0)
1865 i
.rm
.reg
= i
.regs
[dest
]->reg_num
;
1866 i
.rm
.regmem
= i
.regs
[source
]->reg_num
;
1870 i
.rm
.reg
= i
.regs
[source
]->reg_num
;
1871 i
.rm
.regmem
= i
.regs
[dest
]->reg_num
;
1875 { /* if it's not 2 reg operands... */
1878 unsigned int fake_zero_displacement
= 0;
1879 unsigned int op
= ((i
.types
[0] & AnyMem
)
1881 : (i
.types
[1] & AnyMem
) ? 1 : 2);
1888 if (! i
.disp_operands
)
1889 fake_zero_displacement
= 1;
1892 /* Operand is just <disp> */
1893 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
1895 i
.rm
.regmem
= NO_BASE_REGISTER_16
;
1896 i
.types
[op
] &= ~Disp
;
1897 i
.types
[op
] |= Disp16
;
1901 i
.rm
.regmem
= NO_BASE_REGISTER
;
1902 i
.types
[op
] &= ~Disp
;
1903 i
.types
[op
] |= Disp32
;
1906 else /* ! i.base_reg && i.index_reg */
1908 i
.sib
.index
= i
.index_reg
->reg_num
;
1909 i
.sib
.base
= NO_BASE_REGISTER
;
1910 i
.sib
.scale
= i
.log2_scale_factor
;
1911 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1912 i
.types
[op
] &= ~Disp
;
1913 i
.types
[op
] |= Disp32
; /* Must be 32 bit */
1916 else if (i
.base_reg
->reg_type
& Reg16
)
1918 switch (i
.base_reg
->reg_num
)
1923 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1924 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6;
1931 if ((i
.types
[op
] & Disp
) == 0)
1933 /* fake (%bp) into 0(%bp) */
1934 i
.types
[op
] |= Disp8
;
1935 fake_zero_displacement
= 1;
1938 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1939 i
.rm
.regmem
= i
.index_reg
->reg_num
- 6 + 2;
1941 default: /* (%si) -> 4 or (%di) -> 5 */
1942 i
.rm
.regmem
= i
.base_reg
->reg_num
- 6 + 4;
1944 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1946 else /* i.base_reg and 32 bit mode */
1948 i
.rm
.regmem
= i
.base_reg
->reg_num
;
1949 i
.sib
.base
= i
.base_reg
->reg_num
;
1950 if (i
.base_reg
->reg_num
== EBP_REG_NUM
)
1953 if (i
.disp_operands
== 0)
1955 fake_zero_displacement
= 1;
1956 i
.types
[op
] |= Disp8
;
1959 else if (i
.base_reg
->reg_num
== ESP_REG_NUM
)
1963 i
.sib
.scale
= i
.log2_scale_factor
;
1966 /* <disp>(%esp) becomes two byte modrm
1967 with no index register. We've already
1968 stored the code for esp in i.rm.regmem
1969 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1970 base register besides %esp will not use
1971 the extra modrm byte. */
1972 i
.sib
.index
= NO_INDEX_REGISTER
;
1973 #if ! SCALE1_WHEN_NO_INDEX
1974 /* Another case where we force the second
1976 if (i
.log2_scale_factor
)
1977 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1982 i
.sib
.index
= i
.index_reg
->reg_num
;
1983 i
.rm
.regmem
= ESCAPE_TO_TWO_BYTE_ADDRESSING
;
1985 i
.rm
.mode
= mode_from_disp_size (i
.types
[op
]);
1988 if (fake_zero_displacement
)
1990 /* Fakes a zero displacement assuming that i.types[op]
1991 holds the correct displacement size. */
1994 exp
= &disp_expressions
[i
.disp_operands
++];
1996 exp
->X_op
= O_constant
;
1997 exp
->X_add_number
= 0;
1998 exp
->X_add_symbol
= (symbolS
*) 0;
1999 exp
->X_op_symbol
= (symbolS
*) 0;
2003 /* Fill in i.rm.reg or i.rm.regmem field with register
2004 operand (if any) based on i.tm.extension_opcode.
2005 Again, we must be careful to make sure that
2006 segment/control/debug/test/MMX registers are coded
2007 into the i.rm.reg field. */
2012 & (Reg
| RegMMX
| RegXMM
2014 | Control
| Debug
| Test
))
2017 & (Reg
| RegMMX
| RegXMM
2019 | Control
| Debug
| Test
))
2022 /* If there is an extension opcode to put here, the
2023 register number must be put into the regmem field. */
2024 if (i
.tm
.extension_opcode
!= None
)
2025 i
.rm
.regmem
= i
.regs
[op
]->reg_num
;
2027 i
.rm
.reg
= i
.regs
[op
]->reg_num
;
2029 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
2030 we must set it to 3 to indicate this is a register
2031 operand in the regmem field. */
2032 if (!i
.mem_operands
)
2036 /* Fill in i.rm.reg field with extension opcode (if any). */
2037 if (i
.tm
.extension_opcode
!= None
)
2038 i
.rm
.reg
= i
.tm
.extension_opcode
;
2041 else if (i
.tm
.opcode_modifier
& (Seg2ShortForm
| Seg3ShortForm
))
2043 if (i
.tm
.base_opcode
== POP_SEG_SHORT
&& i
.regs
[0]->reg_num
== 1)
2045 as_bad (_("you can't `pop %%cs'"));
2048 i
.tm
.base_opcode
|= (i
.regs
[0]->reg_num
<< 3);
2050 else if ((i
.tm
.base_opcode
& ~(D
|W
)) == MOV_AX_DISP32
)
2054 else if ((i
.tm
.opcode_modifier
& IsString
) != 0)
2056 /* For the string instructions that allow a segment override
2057 on one of their operands, the default segment is ds. */
2061 /* If a segment was explicitly specified,
2062 and the specified segment is not the default,
2063 use an opcode prefix to select it.
2064 If we never figured out what the default segment is,
2065 then default_seg will be zero at this point,
2066 and the specified segment prefix will always be used. */
2067 if ((i
.seg
[0]) && (i
.seg
[0] != default_seg
))
2069 if (! add_prefix (i
.seg
[0]->seg_prefix
))
2073 else if ((i
.tm
.opcode_modifier
& Ugh
) != 0)
2075 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc. */
2076 as_warn (_("translating to `%sp'"), i
.tm
.name
);
2080 /* Handle conversion of 'int $3' --> special int3 insn. */
2081 if (i
.tm
.base_opcode
== INT_OPCODE
&& i
.imms
[0]->X_add_number
== 3)
2083 i
.tm
.base_opcode
= INT3_OPCODE
;
2087 /* We are ready to output the insn. */
2092 if (i
.tm
.opcode_modifier
& Jump
)
2094 long n
= (long) i
.disps
[0]->X_add_number
;
2095 int prefix
= (i
.prefix
[DATA_PREFIX
] != 0);
2103 if (flag_16bit_code
)
2106 if (!intel_syntax
&& (i
.prefixes
!= 0))
2107 as_warn (_("skipping prefixes on this instruction"));
2109 if (i
.disps
[0]->X_op
== O_constant
)
2111 if (fits_in_signed_byte (n
))
2115 p
[0] = i
.tm
.base_opcode
;
2120 /* Use 16-bit jumps only for 16-bit code,
2121 because text segments are limited to 64K anyway;
2122 Use 32-bit jumps for 32-bit code, because they're faster,
2123 and a 16-bit jump will clear the top 16 bits of %eip. */
2124 int jmp_size
= code16
? 2 : 4;
2125 if (code16
&& !fits_in_signed_word (n
))
2127 as_bad (_("16-bit jump out of range"));
2131 if (i
.tm
.base_opcode
== JUMP_PC_RELATIVE
)
2133 /* unconditional jump */
2134 insn_size
+= prefix
+ 1 + jmp_size
;
2135 p
= frag_more (prefix
+ 1 + jmp_size
);
2137 *p
++ = DATA_PREFIX_OPCODE
;
2139 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2143 /* conditional jump */
2144 insn_size
+= prefix
+ 2 + jmp_size
;
2145 p
= frag_more (prefix
+ 2 + jmp_size
);
2147 *p
++ = DATA_PREFIX_OPCODE
;
2148 *p
++ = TWO_BYTE_OPCODE_ESCAPE
;
2149 *p
++ = i
.tm
.base_opcode
+ 0x10;
2150 md_number_to_chars (p
, (valueT
) n
, jmp_size
);
2156 int size
= code16
? 2 : 4;
2158 /* It's a symbol; end frag & setup for relax.
2159 Make sure there are more than 6 chars left in the current frag;
2160 if not we'll have to start a new one. */
2161 frag_grow (prefix
+ 1 + 2 + size
);
2162 insn_size
+= 1 + prefix
;
2163 p
= frag_more (1 + prefix
);
2165 *p
++ = DATA_PREFIX_OPCODE
;
2166 *p
= i
.tm
.base_opcode
;
2167 frag_var (rs_machine_dependent
,
2168 prefix
+ 2 + size
, /* 2 opcode/prefix + displacement */
2170 ((unsigned char) *p
== JUMP_PC_RELATIVE
2171 ? ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
) | code16
2172 : ENCODE_RELAX_STATE (COND_JUMP
, SMALL
) | code16
),
2173 i
.disps
[0]->X_add_symbol
,
2177 else if (i
.tm
.opcode_modifier
& (JumpByte
| JumpDword
))
2179 int size
= (i
.tm
.opcode_modifier
& JumpByte
) ? 1 : 4;
2180 long n
= (long) i
.disps
[0]->X_add_number
;
2182 if (size
== 1) /* then this is a loop or jecxz type instruction */
2184 if (i
.prefix
[ADDR_PREFIX
])
2187 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE
);
2195 if (i
.prefix
[DATA_PREFIX
])
2198 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE
);
2202 if (flag_16bit_code
)
2209 if (!intel_syntax
&& (i
.prefixes
!= 0))
2210 as_warn (_("skipping prefixes on this instruction"));
2212 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2214 insn_size
+= 1 + size
;
2215 p
= frag_more (1 + size
);
2219 insn_size
+= 2 + size
; /* opcode can be at most two bytes */
2220 p
= frag_more (2 + size
);
2221 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2223 *p
++ = i
.tm
.base_opcode
& 0xff;
2225 if (i
.disps
[0]->X_op
== O_constant
)
2227 if (size
== 1 && !fits_in_signed_byte (n
))
2229 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
2232 else if (size
== 2 && !fits_in_signed_word (n
))
2234 as_bad (_("16-bit jump out of range"));
2237 md_number_to_chars (p
, (valueT
) n
, size
);
2241 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2242 i
.disps
[0], 1, reloc (size
, 1, i
.disp_reloc
[0]));
2246 else if (i
.tm
.opcode_modifier
& JumpInterSegment
)
2250 int prefix
= i
.prefix
[DATA_PREFIX
] != 0;
2258 if (flag_16bit_code
)
2262 reloc_type
= BFD_RELOC_32
;
2266 reloc_type
= BFD_RELOC_16
;
2269 if (!intel_syntax
&& (i
.prefixes
!= 0))
2270 as_warn (_("skipping prefixes on this instruction"));
2272 insn_size
+= prefix
+ 1 + 2 + size
; /* 1 opcode; 2 segment; offset */
2273 p
= frag_more (prefix
+ 1 + 2 + size
);
2275 *p
++ = DATA_PREFIX_OPCODE
;
2276 *p
++ = i
.tm
.base_opcode
;
2277 if (i
.imms
[1]->X_op
== O_constant
)
2279 long n
= (long) i
.imms
[1]->X_add_number
;
2281 if (size
== 2 && !fits_in_unsigned_word (n
))
2283 as_bad (_("16-bit jump out of range"));
2286 md_number_to_chars (p
, (valueT
) n
, size
);
2289 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2290 i
.imms
[1], 0, reloc_type
);
2291 if (i
.imms
[0]->X_op
!= O_constant
)
2292 as_bad (_("can't handle non absolute segment in `%s'"),
2294 md_number_to_chars (p
+ size
, (valueT
) i
.imms
[0]->X_add_number
, 2);
2298 /* Output normal instructions here. */
2301 /* The prefix bytes. */
2303 q
< i
.prefix
+ sizeof (i
.prefix
) / sizeof (i
.prefix
[0]);
2310 md_number_to_chars (p
, (valueT
) *q
, 1);
2314 /* Now the opcode; be careful about word order here! */
2315 if (fits_in_unsigned_byte (i
.tm
.base_opcode
))
2318 FRAG_APPEND_1_CHAR (i
.tm
.base_opcode
);
2320 else if (fits_in_unsigned_word (i
.tm
.base_opcode
))
2324 /* put out high byte first: can't use md_number_to_chars! */
2325 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2326 *p
= i
.tm
.base_opcode
& 0xff;
2329 { /* opcode is either 3 or 4 bytes */
2330 if (i
.tm
.base_opcode
& 0xff000000)
2334 *p
++ = (i
.tm
.base_opcode
>> 24) & 0xff;
2341 *p
++ = (i
.tm
.base_opcode
>> 16) & 0xff;
2342 *p
++ = (i
.tm
.base_opcode
>> 8) & 0xff;
2343 *p
= (i
.tm
.base_opcode
) & 0xff;
2346 /* Now the modrm byte and sib byte (if present). */
2347 if (i
.tm
.opcode_modifier
& Modrm
)
2351 md_number_to_chars (p
,
2352 (valueT
) (i
.rm
.regmem
<< 0
2356 /* If i.rm.regmem == ESP (4)
2357 && i.rm.mode != (Register mode)
2359 ==> need second modrm byte. */
2360 if (i
.rm
.regmem
== ESCAPE_TO_TWO_BYTE_ADDRESSING
2362 && !(i
.base_reg
&& (i
.base_reg
->reg_type
& Reg16
) != 0))
2366 md_number_to_chars (p
,
2367 (valueT
) (i
.sib
.base
<< 0
2369 | i
.sib
.scale
<< 6),
2374 if (i
.disp_operands
)
2376 register unsigned int n
;
2378 for (n
= 0; n
< i
.operands
; n
++)
2382 if (i
.disps
[n
]->X_op
== O_constant
)
2385 long val
= (long) i
.disps
[n
]->X_add_number
;
2387 if (i
.types
[n
] & (Disp8
| Disp16
))
2392 mask
= ~ (long) 0xffff;
2393 if (i
.types
[n
] & Disp8
)
2396 mask
= ~ (long) 0xff;
2399 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2400 as_warn (_("%ld shortened to %ld"),
2404 p
= frag_more (size
);
2405 md_number_to_chars (p
, (valueT
) val
, size
);
2407 else if (i
.types
[n
] & Disp32
)
2411 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 4,
2413 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_32
));
2416 { /* must be Disp16 */
2419 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, 2,
2421 TC_RELOC (i
.disp_reloc
[n
], BFD_RELOC_16
));
2425 } /* end displacement output */
2427 /* output immediate */
2430 register unsigned int n
;
2432 for (n
= 0; n
< i
.operands
; n
++)
2436 if (i
.imms
[n
]->X_op
== O_constant
)
2439 long val
= (long) i
.imms
[n
]->X_add_number
;
2441 if (i
.types
[n
] & (Imm8
| Imm8S
| Imm16
))
2446 mask
= ~ (long) 0xffff;
2447 if (i
.types
[n
] & (Imm8
| Imm8S
))
2450 mask
= ~ (long) 0xff;
2452 if ((val
& mask
) != 0 && (val
& mask
) != mask
)
2453 as_warn (_("%ld shortened to %ld"),
2457 p
= frag_more (size
);
2458 md_number_to_chars (p
, (valueT
) val
, size
);
2461 { /* not absolute_section */
2462 /* Need a 32-bit fixup (don't support 8bit
2463 non-absolute ims). Try to support other
2469 if (i
.types
[n
] & (Imm8
| Imm8S
))
2471 else if (i
.types
[n
] & Imm16
)
2476 p
= frag_more (size
);
2477 r_type
= reloc (size
, 0, i
.disp_reloc
[0]);
2478 #ifdef BFD_ASSEMBLER
2479 if (r_type
== BFD_RELOC_32
2481 && GOT_symbol
== i
.imms
[n
]->X_add_symbol
2482 && (i
.imms
[n
]->X_op
== O_symbol
2483 || (i
.imms
[n
]->X_op
== O_add
2484 && ((symbol_get_value_expression
2485 (i
.imms
[n
]->X_op_symbol
)->X_op
)
2488 r_type
= BFD_RELOC_386_GOTPC
;
2489 i
.imms
[n
]->X_add_number
+= 3;
2492 fix_new_exp (frag_now
, p
- frag_now
->fr_literal
, size
,
2493 i
.imms
[n
], pcrel
, r_type
);
2497 } /* end immediate output */
2505 #endif /* DEBUG386 */
2509 static int i386_immediate
PARAMS ((char *));
2512 i386_immediate (imm_start
)
2515 char *save_input_line_pointer
;
2519 if (i
.imm_operands
== MAX_IMMEDIATE_OPERANDS
)
2521 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2525 exp
= &im_expressions
[i
.imm_operands
++];
2526 i
.imms
[this_operand
] = exp
;
2528 if (is_space_char (*imm_start
))
2531 save_input_line_pointer
= input_line_pointer
;
2532 input_line_pointer
= imm_start
;
2537 * We can have operands of the form
2538 * <symbol>@GOTOFF+<nnn>
2539 * Take the easy way out here and copy everything
2540 * into a temporary buffer...
2544 cp
= strchr (input_line_pointer
, '@');
2551 /* GOT relocations are not supported in 16 bit mode */
2552 if (flag_16bit_code
)
2553 as_bad (_("GOT relocations not supported in 16 bit mode"));
2555 if (GOT_symbol
== NULL
)
2556 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2558 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2560 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2563 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2565 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2568 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2570 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2574 as_bad (_("Bad reloc specifier in expression"));
2576 /* Replace the relocation token with ' ', so that errors like
2577 foo@GOTOFF1 will be detected. */
2578 first
= cp
- input_line_pointer
;
2579 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2580 memcpy (tmpbuf
, input_line_pointer
, first
);
2581 tmpbuf
[first
] = ' ';
2582 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2583 input_line_pointer
= tmpbuf
;
2588 exp_seg
= expression (exp
);
2591 if (*input_line_pointer
)
2592 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer
);
2594 input_line_pointer
= save_input_line_pointer
;
2596 if (exp
->X_op
== O_absent
)
2598 /* missing or bad expr becomes absolute 0 */
2599 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2601 exp
->X_op
= O_constant
;
2602 exp
->X_add_number
= 0;
2603 exp
->X_add_symbol
= (symbolS
*) 0;
2604 exp
->X_op_symbol
= (symbolS
*) 0;
2605 i
.types
[this_operand
] |= Imm
;
2607 else if (exp
->X_op
== O_constant
)
2610 if (flag_16bit_code
^ (i
.prefix
[DATA_PREFIX
] != 0))
2613 i
.types
[this_operand
] |=
2614 (bigimm
| smallest_imm_type ((long) exp
->X_add_number
));
2616 /* If a suffix is given, this operand may be shortended. */
2619 case WORD_MNEM_SUFFIX
:
2620 i
.types
[this_operand
] |= Imm16
;
2622 case BYTE_MNEM_SUFFIX
:
2623 i
.types
[this_operand
] |= Imm16
| Imm8
| Imm8S
;
2628 else if (exp_seg
!= text_section
2629 && exp_seg
!= data_section
2630 && exp_seg
!= bss_section
2631 && exp_seg
!= undefined_section
2632 #ifdef BFD_ASSEMBLER
2633 && !bfd_is_com_section (exp_seg
)
2637 as_bad (_("Unimplemented segment type %d in operand"), exp_seg
);
2643 /* This is an address. The size of the address will be
2644 determined later, depending on destination register,
2645 suffix, or the default for the section. We exclude
2646 Imm8S here so that `push $foo' and other instructions
2647 with an Imm8S form will use Imm16 or Imm32. */
2648 i
.types
[this_operand
] |= (Imm8
| Imm16
| Imm32
);
2654 static int i386_scale
PARAMS ((char *));
2660 if (!isdigit (*scale
))
2667 i
.log2_scale_factor
= 0;
2670 i
.log2_scale_factor
= 1;
2673 i
.log2_scale_factor
= 2;
2676 i
.log2_scale_factor
= 3;
2680 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2684 if (i
.log2_scale_factor
!= 0 && ! i
.index_reg
)
2686 as_warn (_("scale factor of %d without an index register"),
2687 1 << i
.log2_scale_factor
);
2688 #if SCALE1_WHEN_NO_INDEX
2689 i
.log2_scale_factor
= 0;
2695 static int i386_displacement
PARAMS ((char *, char *));
2698 i386_displacement (disp_start
, disp_end
)
2702 register expressionS
*exp
;
2704 char *save_input_line_pointer
;
2705 int bigdisp
= Disp32
;
2707 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0))
2709 i
.types
[this_operand
] |= bigdisp
;
2711 exp
= &disp_expressions
[i
.disp_operands
];
2712 i
.disps
[this_operand
] = exp
;
2713 i
.disp_reloc
[this_operand
] = NO_RELOC
;
2715 save_input_line_pointer
= input_line_pointer
;
2716 input_line_pointer
= disp_start
;
2717 END_STRING_AND_SAVE (disp_end
);
2719 #ifndef GCC_ASM_O_HACK
2720 #define GCC_ASM_O_HACK 0
2723 END_STRING_AND_SAVE (disp_end
+ 1);
2724 if ((i
.types
[this_operand
] & BaseIndex
) != 0
2725 && displacement_string_end
[-1] == '+')
2727 /* This hack is to avoid a warning when using the "o"
2728 constraint within gcc asm statements.
2731 #define _set_tssldt_desc(n,addr,limit,type) \
2732 __asm__ __volatile__ ( \
2734 "movw %w1,2+%0\n\t" \
2736 "movb %b1,4+%0\n\t" \
2737 "movb %4,5+%0\n\t" \
2738 "movb $0,6+%0\n\t" \
2739 "movb %h1,7+%0\n\t" \
2741 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2743 This works great except that the output assembler ends
2744 up looking a bit weird if it turns out that there is
2745 no offset. You end up producing code that looks like:
2758 So here we provide the missing zero.
2761 *displacement_string_end
= '0';
2767 * We can have operands of the form
2768 * <symbol>@GOTOFF+<nnn>
2769 * Take the easy way out here and copy everything
2770 * into a temporary buffer...
2774 cp
= strchr (input_line_pointer
, '@');
2781 /* GOT relocations are not supported in 16 bit mode */
2782 if (flag_16bit_code
)
2783 as_bad (_("GOT relocations not supported in 16 bit mode"));
2785 if (GOT_symbol
== NULL
)
2786 GOT_symbol
= symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME
);
2788 if (strncmp (cp
+ 1, "PLT", 3) == 0)
2790 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_PLT32
;
2793 else if (strncmp (cp
+ 1, "GOTOFF", 6) == 0)
2795 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOTOFF
;
2798 else if (strncmp (cp
+ 1, "GOT", 3) == 0)
2800 i
.disp_reloc
[this_operand
] = BFD_RELOC_386_GOT32
;
2804 as_bad (_("Bad reloc specifier in expression"));
2806 /* Replace the relocation token with ' ', so that errors like
2807 foo@GOTOFF1 will be detected. */
2808 first
= cp
- input_line_pointer
;
2809 tmpbuf
= (char *) alloca (strlen(input_line_pointer
));
2810 memcpy (tmpbuf
, input_line_pointer
, first
);
2811 tmpbuf
[first
] = ' ';
2812 strcpy (tmpbuf
+ first
+ 1, cp
+ 1 + len
);
2813 input_line_pointer
= tmpbuf
;
2818 exp_seg
= expression (exp
);
2820 #ifdef BFD_ASSEMBLER
2821 /* We do this to make sure that the section symbol is in
2822 the symbol table. We will ultimately change the relocation
2823 to be relative to the beginning of the section */
2824 if (i
.disp_reloc
[this_operand
] == BFD_RELOC_386_GOTOFF
)
2826 if (S_IS_LOCAL(exp
->X_add_symbol
)
2827 && S_GET_SEGMENT (exp
->X_add_symbol
) != undefined_section
)
2828 section_symbol (S_GET_SEGMENT (exp
->X_add_symbol
));
2829 assert (exp
->X_op
== O_symbol
);
2830 exp
->X_op
= O_subtract
;
2831 exp
->X_op_symbol
= GOT_symbol
;
2832 i
.disp_reloc
[this_operand
] = BFD_RELOC_32
;
2837 if (*input_line_pointer
)
2838 as_bad (_("Ignoring junk `%s' after expression"),
2839 input_line_pointer
);
2841 RESTORE_END_STRING (disp_end
+ 1);
2843 RESTORE_END_STRING (disp_end
);
2844 input_line_pointer
= save_input_line_pointer
;
2846 if (exp
->X_op
== O_constant
)
2848 if (fits_in_signed_byte (exp
->X_add_number
))
2849 i
.types
[this_operand
] |= Disp8
;
2852 else if (exp_seg
!= text_section
2853 && exp_seg
!= data_section
2854 && exp_seg
!= bss_section
2855 && exp_seg
!= undefined_section
)
2857 as_bad (_ ("Unimplemented segment type %d in operand"), exp_seg
);
2864 static int i386_operand_modifier
PARAMS ((char **, int));
2867 i386_operand_modifier (op_string
, got_a_float
)
2871 if (!strncasecmp (*op_string
, "BYTE PTR", 8))
2873 i
.suffix
= BYTE_MNEM_SUFFIX
;
2878 else if (!strncasecmp (*op_string
, "WORD PTR", 8))
2880 i
.suffix
= WORD_MNEM_SUFFIX
;
2885 else if (!strncasecmp (*op_string
, "DWORD PTR", 9))
2888 i
.suffix
= SHORT_MNEM_SUFFIX
;
2890 i
.suffix
= DWORD_MNEM_SUFFIX
;
2895 else if (!strncasecmp (*op_string
, "QWORD PTR", 9))
2897 i
.suffix
= INTEL_DWORD_MNEM_SUFFIX
;
2902 else if (!strncasecmp (*op_string
, "XWORD PTR", 9))
2904 i
.suffix
= LONG_DOUBLE_MNEM_SUFFIX
;
2909 else if (!strncasecmp (*op_string
, "SHORT", 5))
2915 else if (!strncasecmp (*op_string
, "OFFSET FLAT:", 12))
2921 else if (!strncasecmp (*op_string
, "FLAT", 4))
2927 else return NONE_FOUND
;
2930 static char * build_displacement_string
PARAMS ((int, char *));
2933 build_displacement_string (initial_disp
, op_string
)
2937 char *temp_string
= (char *) malloc (strlen (op_string
) + 1);
2938 char *end_of_operand_string
;
2942 temp_string
[0] = '\0';
2943 tc
= end_of_operand_string
= strchr (op_string
, '[');
2944 if ( initial_disp
&& !end_of_operand_string
)
2946 strcpy (temp_string
, op_string
);
2947 return (temp_string
);
2950 /* Build the whole displacement string */
2953 strncpy (temp_string
, op_string
, end_of_operand_string
- op_string
);
2954 temp_string
[end_of_operand_string
- op_string
] = '\0';
2958 temp_disp
= op_string
;
2960 while (*temp_disp
!= '\0')
2963 int add_minus
= (*temp_disp
== '-');
2965 if (*temp_disp
== '+' || *temp_disp
== '-' || *temp_disp
== '[')
2968 if (is_space_char (*temp_disp
))
2971 /* Don't consider registers */
2972 if ( !((*temp_disp
== REGISTER_PREFIX
|| allow_naked_reg
)
2973 && parse_register (temp_disp
, &end_op
)) )
2975 char *string_start
= temp_disp
;
2977 while (*temp_disp
!= ']'
2978 && *temp_disp
!= '+'
2979 && *temp_disp
!= '-'
2980 && *temp_disp
!= '*')
2984 strcat (temp_string
, "-");
2986 strcat (temp_string
, "+");
2988 strncat (temp_string
, string_start
, temp_disp
- string_start
);
2989 if (*temp_disp
== '+' || *temp_disp
== '-')
2993 while (*temp_disp
!= '\0'
2994 && *temp_disp
!= '+'
2995 && *temp_disp
!= '-')
3002 static int i386_parse_seg
PARAMS ((char *));
3005 i386_parse_seg (op_string
)
3008 if (is_space_char (*op_string
))
3011 /* Should be one of es, cs, ss, ds fs or gs */
3012 switch (*op_string
++)
3015 i
.seg
[i
.mem_operands
] = &es
;
3018 i
.seg
[i
.mem_operands
] = &cs
;
3021 i
.seg
[i
.mem_operands
] = &ss
;
3024 i
.seg
[i
.mem_operands
] = &ds
;
3027 i
.seg
[i
.mem_operands
] = &fs
;
3030 i
.seg
[i
.mem_operands
] = &gs
;
3033 as_bad (_("bad segment name `%s'"), op_string
);
3037 if (*op_string
++ != 's')
3039 as_bad (_("bad segment name `%s'"), op_string
);
3043 if (is_space_char (*op_string
))
3046 if (*op_string
!= ':')
3048 as_bad (_("bad segment name `%s'"), op_string
);
3056 static int i386_index_check
PARAMS((const char *));
3058 /* Make sure the memory operand we've been dealt is valid.
3059 Returns 1 on success, 0 on a failure.
3062 i386_index_check (operand_string
)
3063 const char *operand_string
;
3065 #if INFER_ADDR_PREFIX
3070 if (flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ?
3071 /* 16 bit mode checks */
3073 && ((i
.base_reg
->reg_type
& (Reg16
|BaseIndex
))
3074 != (Reg16
|BaseIndex
)))
3076 && (((i
.index_reg
->reg_type
& (Reg16
|BaseIndex
))
3077 != (Reg16
|BaseIndex
))
3079 && i
.base_reg
->reg_num
< 6
3080 && i
.index_reg
->reg_num
>= 6
3081 && i
.log2_scale_factor
== 0)))) :
3082 /* 32 bit mode checks */
3084 && (i
.base_reg
->reg_type
& Reg32
) == 0)
3086 && ((i
.index_reg
->reg_type
& (Reg32
|BaseIndex
))
3087 != (Reg32
|BaseIndex
)))))
3089 #if INFER_ADDR_PREFIX
3090 if (i
.prefix
[ADDR_PREFIX
] == 0 && stackop_size
!= '\0')
3092 i
.prefix
[ADDR_PREFIX
] = ADDR_PREFIX_OPCODE
;
3094 /* Change the size of any displacement too. At most one of
3095 Disp16 or Disp32 is set.
3096 FIXME. There doesn't seem to be any real need for separate
3097 Disp16 and Disp32 flags. The same goes for Imm16 and Imm32.
3098 Removing them would probably clean up the code quite a lot.
3100 if (i
.types
[this_operand
] & (Disp16
|Disp32
))
3101 i
.types
[this_operand
] ^= (Disp16
|Disp32
);
3107 as_bad (_("`%s' is not a valid base/index expression"),
3110 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3112 flag_16bit_code
^ (i
.prefix
[ADDR_PREFIX
] != 0) ? "16" : "32");
3118 static int i386_intel_memory_operand
PARAMS ((char *));
3121 i386_intel_memory_operand (operand_string
)
3122 char *operand_string
;
3124 char *op_string
= operand_string
;
3125 char *end_of_operand_string
;
3127 if ((i
.mem_operands
== 1
3128 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3129 || i
.mem_operands
== 2)
3131 as_bad (_("too many memory references for `%s'"),
3132 current_templates
->start
->name
);
3136 /* Look for displacement preceding open bracket */
3137 if (*op_string
!= '[')
3142 end_seg
= strchr (op_string
, ':');
3145 if (!i386_parse_seg (op_string
))
3147 op_string
= end_seg
+ 1;
3150 temp_string
= build_displacement_string (true, op_string
);
3152 if (i
.disp_operands
== 0 &&
3153 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3156 end_of_operand_string
= strchr (op_string
, '[');
3157 if (!end_of_operand_string
)
3158 end_of_operand_string
= op_string
+ strlen (op_string
);
3160 if (is_space_char (*end_of_operand_string
))
3161 --end_of_operand_string
;
3163 op_string
= end_of_operand_string
;
3166 if (*op_string
== '[')
3170 /* Pick off each component and figure out where it belongs */
3172 end_of_operand_string
= op_string
;
3174 while (*op_string
!= ']')
3176 const reg_entry
*temp_reg
;
3180 while (*end_of_operand_string
!= '+'
3181 && *end_of_operand_string
!= '-'
3182 && *end_of_operand_string
!= '*'
3183 && *end_of_operand_string
!= ']')
3184 end_of_operand_string
++;
3186 temp_string
= op_string
;
3187 if (*temp_string
== '+')
3190 if (is_space_char (*temp_string
))
3194 if ((*temp_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3195 && (temp_reg
= parse_register (temp_string
, &end_op
)) != NULL
)
3197 if (i
.base_reg
== NULL
)
3198 i
.base_reg
= temp_reg
;
3200 i
.index_reg
= temp_reg
;
3202 i
.types
[this_operand
] |= BaseIndex
;
3204 else if (*temp_string
== REGISTER_PREFIX
)
3206 as_bad (_("bad register name `%s'"), temp_string
);
3209 else if (is_digit_char (*op_string
)
3210 || *op_string
== '+' || *op_string
== '-')
3212 temp_string
= build_displacement_string (false, op_string
);
3214 if (*temp_string
== '+')
3217 if (i
.disp_operands
== 0 &&
3218 !i386_displacement (temp_string
, temp_string
+ strlen (temp_string
)))
3222 end_of_operand_string
= op_string
;
3223 while (*end_of_operand_string
!= ']'
3224 && *end_of_operand_string
!= '+'
3225 && *end_of_operand_string
!= '-'
3226 && *end_of_operand_string
!= '*')
3227 ++end_of_operand_string
;
3229 else if (*op_string
== '*')
3233 if (i
.base_reg
&& !i
.index_reg
)
3235 i
.index_reg
= i
.base_reg
;
3239 if (!i386_scale (op_string
))
3242 op_string
= end_of_operand_string
;
3243 ++end_of_operand_string
;
3247 if (i386_index_check (operand_string
) == 0)
3255 i386_intel_operand (operand_string
, got_a_float
)
3256 char *operand_string
;
3259 const reg_entry
* r
;
3261 char *op_string
= operand_string
;
3263 int operand_modifier
= i386_operand_modifier (&op_string
, got_a_float
);
3264 if (is_space_char (*op_string
))
3267 switch (operand_modifier
)
3274 if (!i386_intel_memory_operand (op_string
))
3280 if (!i386_immediate (op_string
))
3286 /* Should be register or immediate */
3287 if (is_digit_char (*op_string
)
3288 && strchr (op_string
, '[') == 0)
3290 if (!i386_immediate (op_string
))
3293 else if ((*op_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3294 && (r
= parse_register (op_string
, &end_op
)) != NULL
)
3296 /* Check for a segment override by searching for ':' after a
3297 segment register. */
3299 if (is_space_char (*op_string
))
3301 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3306 i
.seg
[i
.mem_operands
] = &es
;
3309 i
.seg
[i
.mem_operands
] = &cs
;
3312 i
.seg
[i
.mem_operands
] = &ss
;
3315 i
.seg
[i
.mem_operands
] = &ds
;
3318 i
.seg
[i
.mem_operands
] = &fs
;
3321 i
.seg
[i
.mem_operands
] = &gs
;
3326 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3327 i
.regs
[this_operand
] = r
;
3330 else if (*op_string
== REGISTER_PREFIX
)
3332 as_bad (_("bad register name `%s'"), op_string
);
3335 else if (!i386_intel_memory_operand (op_string
))
3344 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3348 i386_operand (operand_string
)
3349 char *operand_string
;
3353 char *op_string
= operand_string
;
3355 if (is_space_char (*op_string
))
3358 /* We check for an absolute prefix (differentiating,
3359 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3360 if (*op_string
== ABSOLUTE_PREFIX
)
3363 if (is_space_char (*op_string
))
3365 i
.types
[this_operand
] |= JumpAbsolute
;
3368 /* Check if operand is a register. */
3369 if ((*op_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3370 && (r
= parse_register (op_string
, &end_op
)) != NULL
)
3372 /* Check for a segment override by searching for ':' after a
3373 segment register. */
3375 if (is_space_char (*op_string
))
3377 if (*op_string
== ':' && (r
->reg_type
& (SReg2
| SReg3
)))
3382 i
.seg
[i
.mem_operands
] = &es
;
3385 i
.seg
[i
.mem_operands
] = &cs
;
3388 i
.seg
[i
.mem_operands
] = &ss
;
3391 i
.seg
[i
.mem_operands
] = &ds
;
3394 i
.seg
[i
.mem_operands
] = &fs
;
3397 i
.seg
[i
.mem_operands
] = &gs
;
3401 /* Skip the ':' and whitespace. */
3403 if (is_space_char (*op_string
))
3406 if (!is_digit_char (*op_string
)
3407 && !is_identifier_char (*op_string
)
3408 && *op_string
!= '('
3409 && *op_string
!= ABSOLUTE_PREFIX
)
3411 as_bad (_("bad memory operand `%s'"), op_string
);
3414 /* Handle case of %es:*foo. */
3415 if (*op_string
== ABSOLUTE_PREFIX
)
3418 if (is_space_char (*op_string
))
3420 i
.types
[this_operand
] |= JumpAbsolute
;
3422 goto do_memory_reference
;
3426 as_bad (_("Junk `%s' after register"), op_string
);
3429 i
.types
[this_operand
] |= r
->reg_type
& ~BaseIndex
;
3430 i
.regs
[this_operand
] = r
;
3433 else if (*op_string
== REGISTER_PREFIX
)
3435 as_bad (_("bad register name `%s'"), op_string
);
3438 else if (*op_string
== IMMEDIATE_PREFIX
)
3439 { /* ... or an immediate */
3441 if (i
.types
[this_operand
] & JumpAbsolute
)
3443 as_bad (_("Immediate operand illegal with absolute jump"));
3446 if (!i386_immediate (op_string
))
3449 else if (is_digit_char (*op_string
)
3450 || is_identifier_char (*op_string
)
3451 || *op_string
== '(' )
3453 /* This is a memory reference of some sort. */
3456 /* Start and end of displacement string expression (if found). */
3457 char *displacement_string_start
;
3458 char *displacement_string_end
;
3460 do_memory_reference
:
3461 if ((i
.mem_operands
== 1
3462 && (current_templates
->start
->opcode_modifier
& IsString
) == 0)
3463 || i
.mem_operands
== 2)
3465 as_bad (_("too many memory references for `%s'"),
3466 current_templates
->start
->name
);
3470 /* Check for base index form. We detect the base index form by
3471 looking for an ')' at the end of the operand, searching
3472 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3474 base_string
= op_string
+ strlen (op_string
);
3477 if (is_space_char (*base_string
))
3480 /* If we only have a displacement, set-up for it to be parsed later. */
3481 displacement_string_start
= op_string
;
3482 displacement_string_end
= base_string
+ 1;
3484 if (*base_string
== ')')
3487 unsigned int parens_balanced
= 1;
3488 /* We've already checked that the number of left & right ()'s are
3489 equal, so this loop will not be infinite. */
3493 if (*base_string
== ')')
3495 if (*base_string
== '(')
3498 while (parens_balanced
);
3500 temp_string
= base_string
;
3502 /* Skip past '(' and whitespace. */
3504 if (is_space_char (*base_string
))
3507 if (*base_string
== ','
3508 || ((*base_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3509 && (i
.base_reg
= parse_register (base_string
, &end_op
)) != NULL
))
3511 displacement_string_end
= temp_string
;
3513 i
.types
[this_operand
] |= BaseIndex
;
3517 base_string
= end_op
;
3518 if (is_space_char (*base_string
))
3522 /* There may be an index reg or scale factor here. */
3523 if (*base_string
== ',')
3526 if (is_space_char (*base_string
))
3529 if ((*base_string
== REGISTER_PREFIX
|| allow_naked_reg
)
3530 && (i
.index_reg
= parse_register (base_string
, &end_op
)) != NULL
)
3532 base_string
= end_op
;
3533 if (is_space_char (*base_string
))
3535 if (*base_string
== ',')
3538 if (is_space_char (*base_string
))
3541 else if (*base_string
!= ')' )
3543 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3548 else if (*base_string
== REGISTER_PREFIX
)
3550 as_bad (_("bad register name `%s'"), base_string
);
3554 /* Check for scale factor. */
3555 if (isdigit ((unsigned char) *base_string
))
3557 if (!i386_scale (base_string
))
3561 if (is_space_char (*base_string
))
3563 if (*base_string
!= ')')
3565 as_bad (_("expecting `)' after scale factor in `%s'"),
3570 else if (!i
.index_reg
)
3572 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3577 else if (*base_string
!= ')')
3579 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3584 else if (*base_string
== REGISTER_PREFIX
)
3586 as_bad (_("bad register name `%s'"), base_string
);
3591 /* If there's an expression beginning the operand, parse it,
3592 assuming displacement_string_start and
3593 displacement_string_end are meaningful. */
3594 if (displacement_string_start
!= displacement_string_end
)
3596 if (!i386_displacement (displacement_string_start
,
3597 displacement_string_end
))
3601 /* Special case for (%dx) while doing input/output op. */
3603 && i
.base_reg
->reg_type
== (Reg16
| InOutPortReg
)
3605 && i
.log2_scale_factor
== 0
3606 && i
.seg
[i
.mem_operands
] == 0
3607 && (i
.types
[this_operand
] & Disp
) == 0)
3609 i
.types
[this_operand
] = InOutPortReg
;
3613 if (i386_index_check (operand_string
) == 0)
3618 { /* it's not a memory operand; argh! */
3619 as_bad (_("invalid char %s beginning operand %d `%s'"),
3620 output_invalid (*op_string
),
3625 return 1; /* normal return */
3629 * md_estimate_size_before_relax()
3631 * Called just before relax().
3632 * Any symbol that is now undefined will not become defined.
3633 * Return the correct fr_subtype in the frag.
3634 * Return the initial "guess for fr_var" to caller.
3635 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3636 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3637 * Although it may not be explicit in the frag, pretend fr_var starts with a
3641 md_estimate_size_before_relax (fragP
, segment
)
3642 register fragS
*fragP
;
3643 register segT segment
;
3645 register unsigned char *opcode
;
3646 register int old_fr_fix
;
3648 old_fr_fix
= fragP
->fr_fix
;
3649 opcode
= (unsigned char *) fragP
->fr_opcode
;
3650 /* We've already got fragP->fr_subtype right; all we have to do is
3651 check for un-relaxable symbols. */
3652 if (S_GET_SEGMENT (fragP
->fr_symbol
) != segment
)
3654 /* symbol is undefined in this segment */
3655 int code16
= fragP
->fr_subtype
& CODE16
;
3656 int size
= code16
? 2 : 4;
3657 int pcrel_reloc
= code16
? BFD_RELOC_16_PCREL
: BFD_RELOC_32_PCREL
;
3661 case JUMP_PC_RELATIVE
: /* make jmp (0xeb) a dword displacement jump */
3662 opcode
[0] = 0xe9; /* dword disp jmp */
3663 fragP
->fr_fix
+= size
;
3664 fix_new (fragP
, old_fr_fix
, size
,
3666 fragP
->fr_offset
, 1,
3667 (GOT_symbol
&& /* Not quite right - we should switch on
3668 presence of @PLT, but I cannot see how
3669 to get to that from here. We should have
3670 done this in md_assemble to really
3671 get it right all of the time, but I
3672 think it does not matter that much, as
3673 this will be right most of the time. ERY*/
3674 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3675 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3679 /* This changes the byte-displacement jump 0x7N
3680 to the dword-displacement jump 0x0f8N. */
3681 opcode
[1] = opcode
[0] + 0x10;
3682 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
; /* two-byte escape */
3683 fragP
->fr_fix
+= 1 + size
; /* we've added an opcode byte */
3684 fix_new (fragP
, old_fr_fix
+ 1, size
,
3686 fragP
->fr_offset
, 1,
3687 (GOT_symbol
&& /* Not quite right - we should switch on
3688 presence of @PLT, but I cannot see how
3689 to get to that from here. ERY */
3690 S_GET_SEGMENT(fragP
->fr_symbol
) == undefined_section
)
3691 ? BFD_RELOC_386_PLT32
: pcrel_reloc
);
3696 return (fragP
->fr_var
+ fragP
->fr_fix
- old_fr_fix
);
3697 } /* md_estimate_size_before_relax() */
3700 * md_convert_frag();
3702 * Called after relax() is finished.
3703 * In: Address of frag.
3704 * fr_type == rs_machine_dependent.
3705 * fr_subtype is what the address relaxed to.
3707 * Out: Any fixSs and constants are set up.
3708 * Caller will turn frag into a ".space 0".
3710 #ifndef BFD_ASSEMBLER
3712 md_convert_frag (headers
, sec
, fragP
)
3713 object_headers
*headers ATTRIBUTE_UNUSED
;
3714 segT sec ATTRIBUTE_UNUSED
;
3715 register fragS
*fragP
;
3718 md_convert_frag (abfd
, sec
, fragP
)
3719 bfd
*abfd ATTRIBUTE_UNUSED
;
3720 segT sec ATTRIBUTE_UNUSED
;
3721 register fragS
*fragP
;
3724 register unsigned char *opcode
;
3725 unsigned char *where_to_put_displacement
= NULL
;
3726 unsigned int target_address
;
3727 unsigned int opcode_address
;
3728 unsigned int extension
= 0;
3729 int displacement_from_opcode_start
;
3731 opcode
= (unsigned char *) fragP
->fr_opcode
;
3733 /* Address we want to reach in file space. */
3734 target_address
= S_GET_VALUE (fragP
->fr_symbol
) + fragP
->fr_offset
;
3735 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3736 target_address
+= symbol_get_frag (fragP
->fr_symbol
)->fr_address
;
3739 /* Address opcode resides at in file space. */
3740 opcode_address
= fragP
->fr_address
+ fragP
->fr_fix
;
3742 /* Displacement from opcode start to fill into instruction. */
3743 displacement_from_opcode_start
= target_address
- opcode_address
;
3745 switch (fragP
->fr_subtype
)
3747 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL
):
3748 case ENCODE_RELAX_STATE (COND_JUMP
, SMALL16
):
3749 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL
):
3750 case ENCODE_RELAX_STATE (UNCOND_JUMP
, SMALL16
):
3751 /* don't have to change opcode */
3752 extension
= 1; /* 1 opcode + 1 displacement */
3753 where_to_put_displacement
= &opcode
[1];
3756 case ENCODE_RELAX_STATE (COND_JUMP
, BIG
):
3757 extension
= 5; /* 2 opcode + 4 displacement */
3758 opcode
[1] = opcode
[0] + 0x10;
3759 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3760 where_to_put_displacement
= &opcode
[2];
3763 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG
):
3764 extension
= 4; /* 1 opcode + 4 displacement */
3766 where_to_put_displacement
= &opcode
[1];
3769 case ENCODE_RELAX_STATE (COND_JUMP
, BIG16
):
3770 extension
= 3; /* 2 opcode + 2 displacement */
3771 opcode
[1] = opcode
[0] + 0x10;
3772 opcode
[0] = TWO_BYTE_OPCODE_ESCAPE
;
3773 where_to_put_displacement
= &opcode
[2];
3776 case ENCODE_RELAX_STATE (UNCOND_JUMP
, BIG16
):
3777 extension
= 2; /* 1 opcode + 2 displacement */
3779 where_to_put_displacement
= &opcode
[1];
3783 BAD_CASE (fragP
->fr_subtype
);
3786 /* now put displacement after opcode */
3787 md_number_to_chars ((char *) where_to_put_displacement
,
3788 (valueT
) (displacement_from_opcode_start
- extension
),
3789 SIZE_FROM_RELAX_STATE (fragP
->fr_subtype
));
3790 fragP
->fr_fix
+= extension
;
3794 int md_short_jump_size
= 2; /* size of byte displacement jmp */
3795 int md_long_jump_size
= 5; /* size of dword displacement jmp */
3796 const int md_reloc_size
= 8; /* Size of relocation record */
3799 md_create_short_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3801 addressT from_addr
, to_addr
;
3802 fragS
*frag ATTRIBUTE_UNUSED
;
3803 symbolS
*to_symbol ATTRIBUTE_UNUSED
;
3807 offset
= to_addr
- (from_addr
+ 2);
3808 md_number_to_chars (ptr
, (valueT
) 0xeb, 1); /* opcode for byte-disp jump */
3809 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 1);
3813 md_create_long_jump (ptr
, from_addr
, to_addr
, frag
, to_symbol
)
3815 addressT from_addr
, to_addr
;
3821 if (flag_do_long_jump
)
3823 offset
= to_addr
- S_GET_VALUE (to_symbol
);
3824 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);/* opcode for long jmp */
3825 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3826 fix_new (frag
, (ptr
+ 1) - frag
->fr_literal
, 4,
3827 to_symbol
, (offsetT
) 0, 0, BFD_RELOC_32
);
3831 offset
= to_addr
- (from_addr
+ 5);
3832 md_number_to_chars (ptr
, (valueT
) 0xe9, 1);
3833 md_number_to_chars (ptr
+ 1, (valueT
) offset
, 4);
3837 /* Apply a fixup (fixS) to segment data, once it has been determined
3838 by our caller that we have all the info we need to fix it up.
3840 On the 386, immediates, displacements, and data pointers are all in
3841 the same (little-endian) format, so we don't need to care about which
3845 md_apply_fix3 (fixP
, valp
, seg
)
3846 fixS
*fixP
; /* The fix we're to put in. */
3847 valueT
*valp
; /* Pointer to the value of the bits. */
3848 segT seg ATTRIBUTE_UNUSED
; /* Segment fix is from. */
3850 register char *p
= fixP
->fx_where
+ fixP
->fx_frag
->fr_literal
;
3851 valueT value
= *valp
;
3853 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3856 switch (fixP
->fx_r_type
)
3862 fixP
->fx_r_type
= BFD_RELOC_32_PCREL
;
3865 fixP
->fx_r_type
= BFD_RELOC_16_PCREL
;
3868 fixP
->fx_r_type
= BFD_RELOC_8_PCREL
;
3873 /* This is a hack. There should be a better way to handle this.
3874 This covers for the fact that bfd_install_relocation will
3875 subtract the current location (for partial_inplace, PC relative
3876 relocations); see more below. */
3877 if ((fixP
->fx_r_type
== BFD_RELOC_32_PCREL
3878 || fixP
->fx_r_type
== BFD_RELOC_16_PCREL
3879 || fixP
->fx_r_type
== BFD_RELOC_8_PCREL
)
3883 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3885 || OUTPUT_FLAVOR
== bfd_target_coff_flavour
3888 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3890 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3891 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3892 && (S_GET_SEGMENT (fixP
->fx_addsy
) == seg
3893 || symbol_section_p (fixP
->fx_addsy
))
3894 && ! S_IS_EXTERNAL (fixP
->fx_addsy
)
3895 && ! S_IS_WEAK (fixP
->fx_addsy
)
3896 && S_IS_DEFINED (fixP
->fx_addsy
)
3897 && ! S_IS_COMMON (fixP
->fx_addsy
))
3899 /* Yes, we add the values in twice. This is because
3900 bfd_perform_relocation subtracts them out again. I think
3901 bfd_perform_relocation is broken, but I don't dare change
3903 value
+= fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
3906 #if defined (OBJ_COFF) && defined (TE_PE)
3907 /* For some reason, the PE format does not store a section
3908 address offset for a PC relative symbol. */
3909 if (S_GET_SEGMENT (fixP
->fx_addsy
) != seg
)
3910 value
+= md_pcrel_from (fixP
);
3911 else if (S_IS_EXTERNAL (fixP
->fx_addsy
)
3912 || S_IS_WEAK (fixP
->fx_addsy
))
3914 /* We are generating an external relocation for this defined
3915 symbol. We add the address, because
3916 bfd_install_relocation will subtract it. VALUE already
3917 holds the symbol value, because fixup_segment added it
3918 in. We subtract it out, and then we subtract it out
3919 again because bfd_install_relocation will add it in
3921 value
+= md_pcrel_from (fixP
);
3922 value
-= 2 * S_GET_VALUE (fixP
->fx_addsy
);
3927 else if (fixP
->fx_addsy
!= NULL
3928 && S_IS_DEFINED (fixP
->fx_addsy
)
3929 && (S_IS_EXTERNAL (fixP
->fx_addsy
)
3930 || S_IS_WEAK (fixP
->fx_addsy
)))
3932 /* We are generating an external relocation for this defined
3933 symbol. VALUE already holds the symbol value, and
3934 bfd_install_relocation will add it in again. We don't want
3936 value
-= 2 * S_GET_VALUE (fixP
->fx_addsy
);
3940 /* Fix a few things - the dynamic linker expects certain values here,
3941 and we must not dissappoint it. */
3942 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3943 if (OUTPUT_FLAVOR
== bfd_target_elf_flavour
3945 switch (fixP
->fx_r_type
) {
3946 case BFD_RELOC_386_PLT32
:
3947 /* Make the jump instruction point to the address of the operand. At
3948 runtime we merely add the offset to the actual PLT entry. */
3951 case BFD_RELOC_386_GOTPC
:
3953 * This is tough to explain. We end up with this one if we have
3954 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3955 * here is to obtain the absolute address of the GOT, and it is strongly
3956 * preferable from a performance point of view to avoid using a runtime
3957 * relocation for this. The actual sequence of instructions often look
3963 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
3965 * The call and pop essentially return the absolute address of
3966 * the label .L66 and store it in %ebx. The linker itself will
3967 * ultimately change the first operand of the addl so that %ebx points to
3968 * the GOT, but to keep things simple, the .o file must have this operand
3969 * set so that it generates not the absolute address of .L66, but the
3970 * absolute address of itself. This allows the linker itself simply
3971 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
3972 * added in, and the addend of the relocation is stored in the operand
3973 * field for the instruction itself.
3975 * Our job here is to fix the operand so that it would add the correct
3976 * offset so that %ebx would point to itself. The thing that is tricky is
3977 * that .-.L66 will point to the beginning of the instruction, so we need
3978 * to further modify the operand so that it will point to itself.
3979 * There are other cases where you have something like:
3981 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
3983 * and here no correction would be required. Internally in the assembler
3984 * we treat operands of this form as not being pcrel since the '.' is
3985 * explicitly mentioned, and I wonder whether it would simplify matters
3986 * to do it this way. Who knows. In earlier versions of the PIC patches,
3987 * the pcrel_adjust field was used to store the correction, but since the
3988 * expression is not pcrel, I felt it would be confusing to do it this way.
3992 case BFD_RELOC_386_GOT32
:
3993 value
= 0; /* Fully resolved at runtime. No addend. */
3995 case BFD_RELOC_386_GOTOFF
:
3998 case BFD_RELOC_VTABLE_INHERIT
:
3999 case BFD_RELOC_VTABLE_ENTRY
:
4006 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
4008 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
4009 md_number_to_chars (p
, value
, fixP
->fx_size
);
4015 /* This is never used. */
4016 long /* Knows about the byte order in a word. */
4017 md_chars_to_number (con
, nbytes
)
4018 unsigned char con
[]; /* Low order byte 1st. */
4019 int nbytes
; /* Number of bytes in the input. */
4022 for (retval
= 0, con
+= nbytes
- 1; nbytes
--; con
--)
4024 retval
<<= BITS_PER_CHAR
;
4032 #define MAX_LITTLENUMS 6
4034 /* Turn the string pointed to by litP into a floating point constant of type
4035 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4036 is stored in *sizeP . An error message is returned, or NULL on OK. */
4038 md_atof (type
, litP
, sizeP
)
4044 LITTLENUM_TYPE words
[MAX_LITTLENUMS
];
4045 LITTLENUM_TYPE
*wordP
;
4067 return _("Bad call to md_atof ()");
4069 t
= atof_ieee (input_line_pointer
, type
, words
);
4071 input_line_pointer
= t
;
4073 *sizeP
= prec
* sizeof (LITTLENUM_TYPE
);
4074 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4075 the bigendian 386. */
4076 for (wordP
= words
+ prec
- 1; prec
--;)
4078 md_number_to_chars (litP
, (valueT
) (*wordP
--), sizeof (LITTLENUM_TYPE
));
4079 litP
+= sizeof (LITTLENUM_TYPE
);
4084 char output_invalid_buf
[8];
4086 static char * output_invalid
PARAMS ((int));
4093 sprintf (output_invalid_buf
, "'%c'", c
);
4095 sprintf (output_invalid_buf
, "(0x%x)", (unsigned) c
);
4096 return output_invalid_buf
;
4100 /* REG_STRING starts *before* REGISTER_PREFIX. */
4102 static const reg_entry
*
4103 parse_register (reg_string
, end_op
)
4107 char *s
= reg_string
;
4109 char reg_name_given
[MAX_REG_NAME_SIZE
+ 1];
4112 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4113 if (*s
== REGISTER_PREFIX
)
4116 if (is_space_char (*s
))
4120 while ((*p
++ = register_chars
[(unsigned char) *s
]) != '\0')
4122 if (p
>= reg_name_given
+ MAX_REG_NAME_SIZE
)
4123 return (const reg_entry
*) NULL
;
4129 r
= (const reg_entry
*) hash_find (reg_hash
, reg_name_given
);
4131 /* Handle floating point regs, allowing spaces in the (i) part. */
4132 if (r
== i386_regtab
/* %st is first entry of table */)
4134 if (is_space_char (*s
))
4139 if (is_space_char (*s
))
4141 if (*s
>= '0' && *s
<= '7')
4143 r
= &i386_float_regtab
[*s
- '0'];
4145 if (is_space_char (*s
))
4153 /* We have "%st(" then garbage */
4154 return (const reg_entry
*) NULL
;
4162 CONST
char *md_shortopts
= "kmVQ:";
4164 CONST
char *md_shortopts
= "m";
4166 struct option md_longopts
[] = {
4167 {NULL
, no_argument
, NULL
, 0}
4169 size_t md_longopts_size
= sizeof (md_longopts
);
4172 md_parse_option (c
, arg
)
4174 char *arg ATTRIBUTE_UNUSED
;
4179 flag_do_long_jump
= 1;
4182 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4183 /* -k: Ignore for FreeBSD compatibility. */
4187 /* -V: SVR4 argument to print version ID. */
4189 print_version_id ();
4192 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4193 should be emitted or not. FIXME: Not implemented. */
4205 md_show_usage (stream
)
4208 fprintf (stream
, _("\
4209 -m do long jump\n"));
4212 #ifdef BFD_ASSEMBLER
4213 #ifdef OBJ_MAYBE_ELF
4214 #ifdef OBJ_MAYBE_COFF
4216 /* Pick the target format to use. */
4219 i386_target_format ()
4221 switch (OUTPUT_FLAVOR
)
4223 case bfd_target_coff_flavour
:
4225 case bfd_target_elf_flavour
:
4226 return "elf32-i386";
4233 #endif /* OBJ_MAYBE_COFF */
4234 #endif /* OBJ_MAYBE_ELF */
4235 #endif /* BFD_ASSEMBLER */
4239 md_undefined_symbol (name
)
4242 if (name
[0] == GLOBAL_OFFSET_TABLE_NAME
[0]
4243 && name
[1] == GLOBAL_OFFSET_TABLE_NAME
[1]
4244 && name
[2] == GLOBAL_OFFSET_TABLE_NAME
[2]
4245 && strcmp (name
, GLOBAL_OFFSET_TABLE_NAME
) == 0)
4249 if (symbol_find (name
))
4250 as_bad (_("GOT already in symbol table"));
4251 GOT_symbol
= symbol_new (name
, undefined_section
,
4252 (valueT
) 0, &zero_address_frag
);
4259 /* Round up a section size to the appropriate boundary. */
4261 md_section_align (segment
, size
)
4262 segT segment ATTRIBUTE_UNUSED
;
4266 #ifdef BFD_ASSEMBLER
4267 /* For a.out, force the section size to be aligned. If we don't do
4268 this, BFD will align it for us, but it will not write out the
4269 final bytes of the section. This may be a bug in BFD, but it is
4270 easier to fix it here since that is how the other a.out targets
4274 align
= bfd_get_section_alignment (stdoutput
, segment
);
4275 size
= ((size
+ (1 << align
) - 1) & ((valueT
) -1 << align
));
4282 /* On the i386, PC-relative offsets are relative to the start of the
4283 next instruction. That is, the address of the offset, plus its
4284 size, since the offset is always the last part of the insn. */
4287 md_pcrel_from (fixP
)
4290 return fixP
->fx_size
+ fixP
->fx_where
+ fixP
->fx_frag
->fr_address
;
4297 int ignore ATTRIBUTE_UNUSED
;
4301 temp
= get_absolute_expression ();
4302 subseg_set (bss_section
, (subsegT
) temp
);
4303 demand_empty_rest_of_line ();
4309 #ifdef BFD_ASSEMBLER
4312 i386_validate_fix (fixp
)
4315 if (fixp
->fx_subsy
&& fixp
->fx_subsy
== GOT_symbol
)
4317 fixp
->fx_r_type
= BFD_RELOC_386_GOTOFF
;
4323 tc_gen_reloc (section
, fixp
)
4324 asection
*section ATTRIBUTE_UNUSED
;
4328 bfd_reloc_code_real_type code
;
4330 switch (fixp
->fx_r_type
)
4332 case BFD_RELOC_386_PLT32
:
4333 case BFD_RELOC_386_GOT32
:
4334 case BFD_RELOC_386_GOTOFF
:
4335 case BFD_RELOC_386_GOTPC
:
4337 case BFD_RELOC_VTABLE_ENTRY
:
4338 case BFD_RELOC_VTABLE_INHERIT
:
4339 code
= fixp
->fx_r_type
;
4344 switch (fixp
->fx_size
)
4347 as_bad (_("Can not do %d byte pc-relative relocation"),
4349 code
= BFD_RELOC_32_PCREL
;
4351 case 1: code
= BFD_RELOC_8_PCREL
; break;
4352 case 2: code
= BFD_RELOC_16_PCREL
; break;
4353 case 4: code
= BFD_RELOC_32_PCREL
; break;
4358 switch (fixp
->fx_size
)
4361 as_bad (_("Can not do %d byte relocation"), fixp
->fx_size
);
4362 code
= BFD_RELOC_32
;
4364 case 1: code
= BFD_RELOC_8
; break;
4365 case 2: code
= BFD_RELOC_16
; break;
4366 case 4: code
= BFD_RELOC_32
; break;
4372 if (code
== BFD_RELOC_32
4374 && fixp
->fx_addsy
== GOT_symbol
)
4375 code
= BFD_RELOC_386_GOTPC
;
4377 rel
= (arelent
*) xmalloc (sizeof (arelent
));
4378 rel
->sym_ptr_ptr
= (asymbol
**) xmalloc (sizeof (asymbol
*));
4379 *rel
->sym_ptr_ptr
= symbol_get_bfdsym (fixp
->fx_addsy
);
4381 rel
->address
= fixp
->fx_frag
->fr_address
+ fixp
->fx_where
;
4382 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4383 vtable entry to be used in the relocation's section offset. */
4384 if (fixp
->fx_r_type
== BFD_RELOC_VTABLE_ENTRY
)
4385 rel
->address
= fixp
->fx_offset
;
4388 rel
->addend
= fixp
->fx_addnumber
;
4392 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, code
);
4393 if (rel
->howto
== NULL
)
4395 as_bad_where (fixp
->fx_file
, fixp
->fx_line
,
4396 _("Cannot represent relocation type %s"),
4397 bfd_get_reloc_code_name (code
));
4398 /* Set howto to a garbage value so that we can keep going. */
4399 rel
->howto
= bfd_reloc_type_lookup (stdoutput
, BFD_RELOC_32
);
4400 assert (rel
->howto
!= NULL
);
4406 #else /* ! BFD_ASSEMBLER */
4408 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4410 tc_aout_fix_to_chars (where
, fixP
, segment_address_in_file
)
4413 relax_addressT segment_address_in_file
;
4416 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4417 * Out: GNU LD relocation length code: 0, 1, or 2.
4420 static const unsigned char nbytes_r_length
[] = {42, 0, 1, 42, 2};
4423 know (fixP
->fx_addsy
!= NULL
);
4425 md_number_to_chars (where
,
4426 (valueT
) (fixP
->fx_frag
->fr_address
4427 + fixP
->fx_where
- segment_address_in_file
),
4430 r_symbolnum
= (S_IS_DEFINED (fixP
->fx_addsy
)
4431 ? S_GET_TYPE (fixP
->fx_addsy
)
4432 : fixP
->fx_addsy
->sy_number
);
4434 where
[6] = (r_symbolnum
>> 16) & 0x0ff;
4435 where
[5] = (r_symbolnum
>> 8) & 0x0ff;
4436 where
[4] = r_symbolnum
& 0x0ff;
4437 where
[7] = ((((!S_IS_DEFINED (fixP
->fx_addsy
)) << 3) & 0x08)
4438 | ((nbytes_r_length
[fixP
->fx_size
] << 1) & 0x06)
4439 | (((fixP
->fx_pcrel
<< 0) & 0x01) & 0x0f));
4442 #endif /* OBJ_AOUT or OBJ_BOUT */
4444 #if defined (I386COFF)
4447 tc_coff_fix2rtype (fixP
)
4450 if (fixP
->fx_r_type
== R_IMAGEBASE
)
4453 return (fixP
->fx_pcrel
?
4454 (fixP
->fx_size
== 1 ? R_PCRBYTE
:
4455 fixP
->fx_size
== 2 ? R_PCRWORD
:
4457 (fixP
->fx_size
== 1 ? R_RELBYTE
:
4458 fixP
->fx_size
== 2 ? R_RELWORD
:
4463 tc_coff_sizemachdep (frag
)
4467 return (frag
->fr_next
->fr_address
- frag
->fr_address
);
4472 #endif /* I386COFF */
4474 #endif /* ! BFD_ASSEMBLER */
4476 /* end of tc-i386.c */