1 /* Disassembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-dis.in isn't
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002
8 Free Software Foundation, Inc.
10 This file is part of the GNU Binutils and GDB, the GNU debugger.
12 This program is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
17 This program is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, write to the Free Software Foundation, Inc.,
24 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
26 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
35 #include "libiberty.h"
40 /* Default text to print if an instruction isn't recognized. */
41 #define UNKNOWN_INSN_MSG _("*unknown*")
43 static void print_normal
44 (CGEN_CPU_DESC
, void *, long, unsigned int, bfd_vma
, int);
45 static void print_address
46 (CGEN_CPU_DESC
, void *, bfd_vma
, unsigned int, bfd_vma
, int);
47 static void print_keyword
48 (CGEN_CPU_DESC
, void *, CGEN_KEYWORD
*, long, unsigned int);
49 static void print_insn_normal
50 (CGEN_CPU_DESC
, void *, const CGEN_INSN
*, CGEN_FIELDS
*, bfd_vma
, int);
52 (CGEN_CPU_DESC
, bfd_vma
, disassemble_info
*, char *, unsigned);
53 static int default_print_insn
54 (CGEN_CPU_DESC
, bfd_vma
, disassemble_info
*);
56 (CGEN_CPU_DESC
, bfd_vma
, disassemble_info
*, char *, int, CGEN_EXTRACT_INFO
*,
59 /* -- disassembler routines inserted here */
63 PARAMS ((CGEN_CPU_DESC
, PTR
, CGEN_KEYWORD
*, long, unsigned));
65 PARAMS ((CGEN_CPU_DESC
, PTR
, long, unsigned, bfd_vma
, int));
67 PARAMS ((CGEN_CPU_DESC
, PTR
, long, unsigned, bfd_vma
, int));
70 print_spr (cd
, dis_info
, names
, regno
, attrs
)
77 /* Use the register index format for any unnamed registers. */
78 if (cgen_keyword_lookup_value (names
, regno
) == NULL
)
80 disassemble_info
*info
= (disassemble_info
*) dis_info
;
81 (*info
->fprintf_func
) (info
->stream
, "spr[%ld]", regno
);
84 print_keyword (cd
, dis_info
, names
, regno
, attrs
);
88 print_hi (cd
, dis_info
, value
, attrs
, pc
, length
)
89 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
;
92 unsigned int attrs ATTRIBUTE_UNUSED
;
93 bfd_vma pc ATTRIBUTE_UNUSED
;
94 int length ATTRIBUTE_UNUSED
;
96 disassemble_info
*info
= (disassemble_info
*) dis_info
;
98 (*info
->fprintf_func
) (info
->stream
, "0x%lx", value
);
100 (*info
->fprintf_func
) (info
->stream
, "hi(0x%lx)", value
);
104 print_lo (cd
, dis_info
, value
, attrs
, pc
, length
)
105 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
;
108 unsigned int attrs ATTRIBUTE_UNUSED
;
109 bfd_vma pc ATTRIBUTE_UNUSED
;
110 int length ATTRIBUTE_UNUSED
;
112 disassemble_info
*info
= (disassemble_info
*) dis_info
;
114 (*info
->fprintf_func
) (info
->stream
, "0x%lx", value
);
116 (*info
->fprintf_func
) (info
->stream
, "lo(0x%lx)", value
);
121 void frv_cgen_print_operand
122 PARAMS ((CGEN_CPU_DESC
, int, PTR
, CGEN_FIELDS
*,
123 void const *, bfd_vma
, int));
125 /* Main entry point for printing operands.
126 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
127 of dis-asm.h on cgen.h.
129 This function is basically just a big switch statement. Earlier versions
130 used tables to look up the function to use, but
131 - if the table contains both assembler and disassembler functions then
132 the disassembler contains much of the assembler and vice-versa,
133 - there's a lot of inlining possibilities as things grow,
134 - using a switch statement avoids the function call overhead.
136 This function could be moved into `print_insn_normal', but keeping it
137 separate makes clear the interface between `print_insn_normal' and each of
141 frv_cgen_print_operand (cd
, opindex
, xinfo
, fields
, attrs
, pc
, length
)
146 void const *attrs ATTRIBUTE_UNUSED
;
150 disassemble_info
*info
= (disassemble_info
*) xinfo
;
155 print_normal (cd
, info
, fields
->f_A
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
157 case FRV_OPERAND_ACC40SI
:
158 print_keyword (cd
, info
, & frv_cgen_opval_acc_names
, fields
->f_ACC40Si
, 0);
160 case FRV_OPERAND_ACC40SK
:
161 print_keyword (cd
, info
, & frv_cgen_opval_acc_names
, fields
->f_ACC40Sk
, 0);
163 case FRV_OPERAND_ACC40UI
:
164 print_keyword (cd
, info
, & frv_cgen_opval_acc_names
, fields
->f_ACC40Ui
, 0);
166 case FRV_OPERAND_ACC40UK
:
167 print_keyword (cd
, info
, & frv_cgen_opval_acc_names
, fields
->f_ACC40Uk
, 0);
169 case FRV_OPERAND_ACCGI
:
170 print_keyword (cd
, info
, & frv_cgen_opval_accg_names
, fields
->f_ACCGi
, 0);
172 case FRV_OPERAND_ACCGK
:
173 print_keyword (cd
, info
, & frv_cgen_opval_accg_names
, fields
->f_ACCGk
, 0);
175 case FRV_OPERAND_CCI
:
176 print_keyword (cd
, info
, & frv_cgen_opval_cccr_names
, fields
->f_CCi
, 0);
178 case FRV_OPERAND_CPRDOUBLEK
:
179 print_keyword (cd
, info
, & frv_cgen_opval_cpr_names
, fields
->f_CPRk
, 0);
181 case FRV_OPERAND_CPRI
:
182 print_keyword (cd
, info
, & frv_cgen_opval_cpr_names
, fields
->f_CPRi
, 0);
184 case FRV_OPERAND_CPRJ
:
185 print_keyword (cd
, info
, & frv_cgen_opval_cpr_names
, fields
->f_CPRj
, 0);
187 case FRV_OPERAND_CPRK
:
188 print_keyword (cd
, info
, & frv_cgen_opval_cpr_names
, fields
->f_CPRk
, 0);
190 case FRV_OPERAND_CRI
:
191 print_keyword (cd
, info
, & frv_cgen_opval_cccr_names
, fields
->f_CRi
, 0);
193 case FRV_OPERAND_CRJ
:
194 print_keyword (cd
, info
, & frv_cgen_opval_cccr_names
, fields
->f_CRj
, 0);
196 case FRV_OPERAND_CRJ_FLOAT
:
197 print_keyword (cd
, info
, & frv_cgen_opval_cccr_names
, fields
->f_CRj_float
, 0);
199 case FRV_OPERAND_CRJ_INT
:
200 print_keyword (cd
, info
, & frv_cgen_opval_cccr_names
, fields
->f_CRj_int
, 0);
202 case FRV_OPERAND_CRK
:
203 print_keyword (cd
, info
, & frv_cgen_opval_cccr_names
, fields
->f_CRk
, 0);
205 case FRV_OPERAND_FCCI_1
:
206 print_keyword (cd
, info
, & frv_cgen_opval_fccr_names
, fields
->f_FCCi_1
, 0);
208 case FRV_OPERAND_FCCI_2
:
209 print_keyword (cd
, info
, & frv_cgen_opval_fccr_names
, fields
->f_FCCi_2
, 0);
211 case FRV_OPERAND_FCCI_3
:
212 print_keyword (cd
, info
, & frv_cgen_opval_fccr_names
, fields
->f_FCCi_3
, 0);
214 case FRV_OPERAND_FCCK
:
215 print_keyword (cd
, info
, & frv_cgen_opval_fccr_names
, fields
->f_FCCk
, 0);
217 case FRV_OPERAND_FRDOUBLEI
:
218 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRi
, 0);
220 case FRV_OPERAND_FRDOUBLEJ
:
221 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRj
, 0);
223 case FRV_OPERAND_FRDOUBLEK
:
224 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRk
, 0);
226 case FRV_OPERAND_FRI
:
227 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRi
, 0);
229 case FRV_OPERAND_FRINTI
:
230 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRi
, 0);
232 case FRV_OPERAND_FRINTIEVEN
:
233 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRi
, 0);
235 case FRV_OPERAND_FRINTJ
:
236 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRj
, 0);
238 case FRV_OPERAND_FRINTJEVEN
:
239 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRj
, 0);
241 case FRV_OPERAND_FRINTK
:
242 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRk
, 0);
244 case FRV_OPERAND_FRINTKEVEN
:
245 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRk
, 0);
247 case FRV_OPERAND_FRJ
:
248 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRj
, 0);
250 case FRV_OPERAND_FRK
:
251 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRk
, 0);
253 case FRV_OPERAND_FRKHI
:
254 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRk
, 0);
256 case FRV_OPERAND_FRKLO
:
257 print_keyword (cd
, info
, & frv_cgen_opval_fr_names
, fields
->f_FRk
, 0);
259 case FRV_OPERAND_GRDOUBLEK
:
260 print_keyword (cd
, info
, & frv_cgen_opval_gr_names
, fields
->f_GRk
, 0);
262 case FRV_OPERAND_GRI
:
263 print_keyword (cd
, info
, & frv_cgen_opval_gr_names
, fields
->f_GRi
, 0);
265 case FRV_OPERAND_GRJ
:
266 print_keyword (cd
, info
, & frv_cgen_opval_gr_names
, fields
->f_GRj
, 0);
268 case FRV_OPERAND_GRK
:
269 print_keyword (cd
, info
, & frv_cgen_opval_gr_names
, fields
->f_GRk
, 0);
271 case FRV_OPERAND_GRKHI
:
272 print_keyword (cd
, info
, & frv_cgen_opval_gr_names
, fields
->f_GRk
, 0);
274 case FRV_OPERAND_GRKLO
:
275 print_keyword (cd
, info
, & frv_cgen_opval_gr_names
, fields
->f_GRk
, 0);
277 case FRV_OPERAND_ICCI_1
:
278 print_keyword (cd
, info
, & frv_cgen_opval_iccr_names
, fields
->f_ICCi_1
, 0);
280 case FRV_OPERAND_ICCI_2
:
281 print_keyword (cd
, info
, & frv_cgen_opval_iccr_names
, fields
->f_ICCi_2
, 0);
283 case FRV_OPERAND_ICCI_3
:
284 print_keyword (cd
, info
, & frv_cgen_opval_iccr_names
, fields
->f_ICCi_3
, 0);
286 case FRV_OPERAND_LI
:
287 print_normal (cd
, info
, fields
->f_LI
, 0, pc
, length
);
289 case FRV_OPERAND_AE
:
290 print_normal (cd
, info
, fields
->f_ae
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
292 case FRV_OPERAND_CCOND
:
293 print_normal (cd
, info
, fields
->f_ccond
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
295 case FRV_OPERAND_COND
:
296 print_normal (cd
, info
, fields
->f_cond
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
298 case FRV_OPERAND_D12
:
299 print_normal (cd
, info
, fields
->f_d12
, 0|(1<<CGEN_OPERAND_SIGNED
), pc
, length
);
301 case FRV_OPERAND_DEBUG
:
302 print_normal (cd
, info
, fields
->f_debug
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
304 case FRV_OPERAND_EIR
:
305 print_normal (cd
, info
, fields
->f_eir
, 0, pc
, length
);
307 case FRV_OPERAND_HINT
:
308 print_normal (cd
, info
, fields
->f_hint
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
310 case FRV_OPERAND_HINT_NOT_TAKEN
:
311 print_keyword (cd
, info
, & frv_cgen_opval_h_hint_not_taken
, fields
->f_hint
, 0);
313 case FRV_OPERAND_HINT_TAKEN
:
314 print_keyword (cd
, info
, & frv_cgen_opval_h_hint_taken
, fields
->f_hint
, 0);
316 case FRV_OPERAND_LABEL16
:
317 print_address (cd
, info
, fields
->f_label16
, 0|(1<<CGEN_OPERAND_PCREL_ADDR
), pc
, length
);
319 case FRV_OPERAND_LABEL24
:
320 print_address (cd
, info
, fields
->f_label24
, 0|(1<<CGEN_OPERAND_PCREL_ADDR
)|(1<<CGEN_OPERAND_VIRTUAL
), pc
, length
);
322 case FRV_OPERAND_LOCK
:
323 print_normal (cd
, info
, fields
->f_lock
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
325 case FRV_OPERAND_PACK
:
326 print_keyword (cd
, info
, & frv_cgen_opval_h_pack
, fields
->f_pack
, 0);
328 case FRV_OPERAND_S10
:
329 print_normal (cd
, info
, fields
->f_s10
, 0|(1<<CGEN_OPERAND_SIGNED
)|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
331 case FRV_OPERAND_S12
:
332 print_normal (cd
, info
, fields
->f_d12
, 0|(1<<CGEN_OPERAND_SIGNED
)|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
334 case FRV_OPERAND_S16
:
335 print_normal (cd
, info
, fields
->f_s16
, 0|(1<<CGEN_OPERAND_SIGNED
)|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
337 case FRV_OPERAND_S5
:
338 print_normal (cd
, info
, fields
->f_s5
, 0|(1<<CGEN_OPERAND_SIGNED
)|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
340 case FRV_OPERAND_S6
:
341 print_normal (cd
, info
, fields
->f_s6
, 0|(1<<CGEN_OPERAND_SIGNED
)|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
343 case FRV_OPERAND_S6_1
:
344 print_normal (cd
, info
, fields
->f_s6_1
, 0|(1<<CGEN_OPERAND_SIGNED
)|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
346 case FRV_OPERAND_SLO16
:
347 print_lo (cd
, info
, fields
->f_s16
, 0|(1<<CGEN_OPERAND_SIGNED
), pc
, length
);
349 case FRV_OPERAND_SPR
:
350 print_spr (cd
, info
, & frv_cgen_opval_spr_names
, fields
->f_spr
, 0|(1<<CGEN_OPERAND_VIRTUAL
));
352 case FRV_OPERAND_U12
:
353 print_normal (cd
, info
, fields
->f_u12
, 0|(1<<CGEN_OPERAND_SIGNED
)|(1<<CGEN_OPERAND_HASH_PREFIX
)|(1<<CGEN_OPERAND_VIRTUAL
), pc
, length
);
355 case FRV_OPERAND_U16
:
356 print_normal (cd
, info
, fields
->f_u16
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
358 case FRV_OPERAND_U6
:
359 print_normal (cd
, info
, fields
->f_u6
, 0|(1<<CGEN_OPERAND_HASH_PREFIX
), pc
, length
);
361 case FRV_OPERAND_UHI16
:
362 print_hi (cd
, info
, fields
->f_u16
, 0, pc
, length
);
364 case FRV_OPERAND_ULO16
:
365 print_lo (cd
, info
, fields
->f_u16
, 0, pc
, length
);
369 /* xgettext:c-format */
370 fprintf (stderr
, _("Unrecognized field %d while printing insn.\n"),
376 cgen_print_fn
* const frv_cgen_print_handlers
[] =
383 frv_cgen_init_dis (cd
)
386 frv_cgen_init_opcode_table (cd
);
387 frv_cgen_init_ibld_table (cd
);
388 cd
->print_handlers
= & frv_cgen_print_handlers
[0];
389 cd
->print_operand
= frv_cgen_print_operand
;
393 /* Default print handler. */
396 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
400 bfd_vma pc ATTRIBUTE_UNUSED
,
401 int length ATTRIBUTE_UNUSED
)
403 disassemble_info
*info
= (disassemble_info
*) dis_info
;
405 #ifdef CGEN_PRINT_NORMAL
406 CGEN_PRINT_NORMAL (cd
, info
, value
, attrs
, pc
, length
);
409 /* Print the operand as directed by the attributes. */
410 if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_SEM_ONLY
))
411 ; /* nothing to do */
412 else if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_SIGNED
))
413 (*info
->fprintf_func
) (info
->stream
, "%ld", value
);
415 (*info
->fprintf_func
) (info
->stream
, "0x%lx", value
);
418 /* Default address handler. */
421 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
425 bfd_vma pc ATTRIBUTE_UNUSED
,
426 int length ATTRIBUTE_UNUSED
)
428 disassemble_info
*info
= (disassemble_info
*) dis_info
;
430 #ifdef CGEN_PRINT_ADDRESS
431 CGEN_PRINT_ADDRESS (cd
, info
, value
, attrs
, pc
, length
);
434 /* Print the operand as directed by the attributes. */
435 if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_SEM_ONLY
))
436 ; /* nothing to do */
437 else if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_PCREL_ADDR
))
438 (*info
->print_address_func
) (value
, info
);
439 else if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_ABS_ADDR
))
440 (*info
->print_address_func
) (value
, info
);
441 else if (CGEN_BOOL_ATTR (attrs
, CGEN_OPERAND_SIGNED
))
442 (*info
->fprintf_func
) (info
->stream
, "%ld", (long) value
);
444 (*info
->fprintf_func
) (info
->stream
, "0x%lx", (long) value
);
447 /* Keyword print handler. */
450 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
452 CGEN_KEYWORD
*keyword_table
,
454 unsigned int attrs ATTRIBUTE_UNUSED
)
456 disassemble_info
*info
= (disassemble_info
*) dis_info
;
457 const CGEN_KEYWORD_ENTRY
*ke
;
459 ke
= cgen_keyword_lookup_value (keyword_table
, value
);
461 (*info
->fprintf_func
) (info
->stream
, "%s", ke
->name
);
463 (*info
->fprintf_func
) (info
->stream
, "???");
466 /* Default insn printer.
468 DIS_INFO is defined as `void *' so the disassembler needn't know anything
469 about disassemble_info. */
472 print_insn_normal (CGEN_CPU_DESC cd
,
474 const CGEN_INSN
*insn
,
479 const CGEN_SYNTAX
*syntax
= CGEN_INSN_SYNTAX (insn
);
480 disassemble_info
*info
= (disassemble_info
*) dis_info
;
481 const CGEN_SYNTAX_CHAR_TYPE
*syn
;
483 CGEN_INIT_PRINT (cd
);
485 for (syn
= CGEN_SYNTAX_STRING (syntax
); *syn
; ++syn
)
487 if (CGEN_SYNTAX_MNEMONIC_P (*syn
))
489 (*info
->fprintf_func
) (info
->stream
, "%s", CGEN_INSN_MNEMONIC (insn
));
492 if (CGEN_SYNTAX_CHAR_P (*syn
))
494 (*info
->fprintf_func
) (info
->stream
, "%c", CGEN_SYNTAX_CHAR (*syn
));
498 /* We have an operand. */
499 frv_cgen_print_operand (cd
, CGEN_SYNTAX_FIELD (*syn
), info
,
500 fields
, CGEN_INSN_ATTRS (insn
), pc
, length
);
504 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
506 Returns 0 if all is well, non-zero otherwise. */
509 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED
,
511 disassemble_info
*info
,
514 CGEN_EXTRACT_INFO
*ex_info
,
515 unsigned long *insn_value
)
517 int status
= (*info
->read_memory_func
) (pc
, buf
, buflen
, info
);
520 (*info
->memory_error_func
) (status
, pc
, info
);
524 ex_info
->dis_info
= info
;
525 ex_info
->valid
= (1 << buflen
) - 1;
526 ex_info
->insn_bytes
= buf
;
528 *insn_value
= bfd_get_bits (buf
, buflen
* 8, info
->endian
== BFD_ENDIAN_BIG
);
532 /* Utility to print an insn.
533 BUF is the base part of the insn, target byte order, BUFLEN bytes long.
534 The result is the size of the insn in bytes or zero for an unknown insn
535 or -1 if an error occurs fetching data (memory_error_func will have
539 print_insn (CGEN_CPU_DESC cd
,
541 disassemble_info
*info
,
545 CGEN_INSN_INT insn_value
;
546 const CGEN_INSN_LIST
*insn_list
;
547 CGEN_EXTRACT_INFO ex_info
;
550 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
551 basesize
= cd
->base_insn_bitsize
< buflen
* 8 ?
552 cd
->base_insn_bitsize
: buflen
* 8;
553 insn_value
= cgen_get_insn_value (cd
, buf
, basesize
);
556 /* Fill in ex_info fields like read_insn would. Don't actually call
557 read_insn, since the incoming buffer is already read (and possibly
558 modified a la m32r). */
559 ex_info
.valid
= (1 << buflen
) - 1;
560 ex_info
.dis_info
= info
;
561 ex_info
.insn_bytes
= buf
;
563 /* The instructions are stored in hash lists.
564 Pick the first one and keep trying until we find the right one. */
566 insn_list
= CGEN_DIS_LOOKUP_INSN (cd
, buf
, insn_value
);
567 while (insn_list
!= NULL
)
569 const CGEN_INSN
*insn
= insn_list
->insn
;
572 unsigned long insn_value_cropped
;
574 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
575 /* Not needed as insn shouldn't be in hash lists if not supported. */
576 /* Supported by this cpu? */
577 if (! frv_cgen_insn_supported (cd
, insn
))
579 insn_list
= CGEN_DIS_NEXT_INSN (insn_list
);
584 /* Basic bit mask must be correct. */
585 /* ??? May wish to allow target to defer this check until the extract
588 /* Base size may exceed this instruction's size. Extract the
589 relevant part from the buffer. */
590 if ((unsigned) (CGEN_INSN_BITSIZE (insn
) / 8) < buflen
&&
591 (unsigned) (CGEN_INSN_BITSIZE (insn
) / 8) <= sizeof (unsigned long))
592 insn_value_cropped
= bfd_get_bits (buf
, CGEN_INSN_BITSIZE (insn
),
593 info
->endian
== BFD_ENDIAN_BIG
);
595 insn_value_cropped
= insn_value
;
597 if ((insn_value_cropped
& CGEN_INSN_BASE_MASK (insn
))
598 == CGEN_INSN_BASE_VALUE (insn
))
600 /* Printing is handled in two passes. The first pass parses the
601 machine insn and extracts the fields. The second pass prints
604 /* Make sure the entire insn is loaded into insn_value, if it
606 if (((unsigned) CGEN_INSN_BITSIZE (insn
) > cd
->base_insn_bitsize
) &&
607 (unsigned) (CGEN_INSN_BITSIZE (insn
) / 8) <= sizeof (unsigned long))
609 unsigned long full_insn_value
;
610 int rc
= read_insn (cd
, pc
, info
, buf
,
611 CGEN_INSN_BITSIZE (insn
) / 8,
612 & ex_info
, & full_insn_value
);
615 length
= CGEN_EXTRACT_FN (cd
, insn
)
616 (cd
, insn
, &ex_info
, full_insn_value
, &fields
, pc
);
619 length
= CGEN_EXTRACT_FN (cd
, insn
)
620 (cd
, insn
, &ex_info
, insn_value_cropped
, &fields
, pc
);
622 /* length < 0 -> error */
627 CGEN_PRINT_FN (cd
, insn
) (cd
, info
, insn
, &fields
, pc
, length
);
628 /* length is in bits, result is in bytes */
633 insn_list
= CGEN_DIS_NEXT_INSN (insn_list
);
639 /* Default value for CGEN_PRINT_INSN.
640 The result is the size of the insn in bytes or zero for an unknown insn
641 or -1 if an error occured fetching bytes. */
643 #ifndef CGEN_PRINT_INSN
644 #define CGEN_PRINT_INSN default_print_insn
648 default_print_insn (CGEN_CPU_DESC cd
, bfd_vma pc
, disassemble_info
*info
)
650 char buf
[CGEN_MAX_INSN_SIZE
];
654 /* Attempt to read the base part of the insn. */
655 buflen
= cd
->base_insn_bitsize
/ 8;
656 status
= (*info
->read_memory_func
) (pc
, buf
, buflen
, info
);
658 /* Try again with the minimum part, if min < base. */
659 if (status
!= 0 && (cd
->min_insn_bitsize
< cd
->base_insn_bitsize
))
661 buflen
= cd
->min_insn_bitsize
/ 8;
662 status
= (*info
->read_memory_func
) (pc
, buf
, buflen
, info
);
667 (*info
->memory_error_func
) (status
, pc
, info
);
671 return print_insn (cd
, pc
, info
, buf
, buflen
);
675 Print one instruction from PC on INFO->STREAM.
676 Return the size of the instruction (in bytes). */
678 typedef struct cpu_desc_list
{
679 struct cpu_desc_list
*next
;
687 print_insn_frv (bfd_vma pc
, disassemble_info
*info
)
689 static cpu_desc_list
*cd_list
= 0;
690 cpu_desc_list
*cl
= 0;
691 static CGEN_CPU_DESC cd
= 0;
693 static int prev_mach
;
694 static int prev_endian
;
697 int endian
= (info
->endian
== BFD_ENDIAN_BIG
699 : CGEN_ENDIAN_LITTLE
);
700 enum bfd_architecture arch
;
702 /* ??? gdb will set mach but leave the architecture as "unknown" */
703 #ifndef CGEN_BFD_ARCH
704 #define CGEN_BFD_ARCH bfd_arch_frv
707 if (arch
== bfd_arch_unknown
)
708 arch
= CGEN_BFD_ARCH
;
710 /* There's no standard way to compute the machine or isa number
711 so we leave it to the target. */
712 #ifdef CGEN_COMPUTE_MACH
713 mach
= CGEN_COMPUTE_MACH (info
);
718 #ifdef CGEN_COMPUTE_ISA
719 isa
= CGEN_COMPUTE_ISA (info
);
721 isa
= info
->insn_sets
;
724 /* If we've switched cpu's, try to find a handle we've used before */
728 || endian
!= prev_endian
))
731 for (cl
= cd_list
; cl
; cl
= cl
->next
)
733 if (cl
->isa
== isa
&&
735 cl
->endian
== endian
)
743 /* If we haven't initialized yet, initialize the opcode table. */
746 const bfd_arch_info_type
*arch_type
= bfd_lookup_arch (arch
, mach
);
747 const char *mach_name
;
751 mach_name
= arch_type
->printable_name
;
755 prev_endian
= endian
;
756 cd
= frv_cgen_cpu_open (CGEN_CPU_OPEN_ISAS
, prev_isa
,
757 CGEN_CPU_OPEN_BFDMACH
, mach_name
,
758 CGEN_CPU_OPEN_ENDIAN
, prev_endian
,
763 /* save this away for future reference */
764 cl
= xmalloc (sizeof (struct cpu_desc_list
));
772 frv_cgen_init_dis (cd
);
775 /* We try to have as much common code as possible.
776 But at this point some targets need to take over. */
777 /* ??? Some targets may need a hook elsewhere. Try to avoid this,
778 but if not possible try to move this hook elsewhere rather than
780 length
= CGEN_PRINT_INSN (cd
, pc
, info
);
786 (*info
->fprintf_func
) (info
->stream
, UNKNOWN_INSN_MSG
);
787 return cd
->default_insn_bitsize
/ 8;