1 # SOME DESCRIPTIVE TITLE.
2 # Copyright (C) YEAR THE PACKAGE'S COPYRIGHT HOLDER
3 # This file is distributed under the same license as the PACKAGE package.
4 # FIRST AUTHOR <EMAIL@ADDRESS>, YEAR.
9 "Project-Id-Version: PACKAGE VERSION\n"
10 "Report-Msgid-Bugs-To: https://sourceware.org/bugzilla/\n"
11 "POT-Creation-Date: 2024-01-04 22:43+1030\n"
12 "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
13 "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
14 "Language-Team: LANGUAGE <LL@li.org>\n"
17 "Content-Type: text/plain; charset=CHARSET\n"
18 "Content-Transfer-Encoding: 8bit\n"
21 msgid "specified register cannot be read from"
25 msgid "specified register cannot be written to"
29 #: aarch64-dis.c:103 arc-dis.c:807 arm-dis.c:12303 kvx-dis.c:154
31 msgid "unrecognised disassembler option: %s"
36 msgid "this `%s' should have an immediately preceding `%s'"
41 msgid "expected `%s' after previous `%s'"
48 "The following AARCH64 specific disassembler options are supported for use\n"
49 "with the -M switch (multiple options should be separated by commas):\n"
56 " no-aliases Don't print instruction aliases.\n"
63 " aliases Do print instruction aliases.\n"
70 " no-notes Don't print instruction notes.\n"
77 " notes Do print instruction notes.\n"
84 " debug_dump Temp switch for debug trace.\n"
87 #: aarch64-dis.c:4184 arc-dis.c:1607 arc-dis.c:1630 arc-dis.c:1633
88 #: kvx-dis.c:1586 loongarch-dis.c:332 mips-dis.c:2903 mips-dis.c:2915
89 #: mips-dis.c:2918 nfp-dis.c:2995 riscv-dis.c:1467 riscv-dis.c:1470
95 msgid "immediate value"
99 msgid "immediate offset"
102 #: aarch64-opc.c:1454
103 msgid "register number"
106 #: aarch64-opc.c:1464
107 msgid "register element index"
110 #: aarch64-opc.c:1474
114 #: aarch64-opc.c:1486
118 #: aarch64-opc.c:1605
119 msgid "expected a selection register in the range w12-w15"
122 #: aarch64-opc.c:1609
123 msgid "expected a selection register in the range w8-w11"
126 #: aarch64-opc.c:1628
127 msgid "starting offset is not a multiple of 2"
130 #: aarch64-opc.c:1629
131 msgid "starting offset is not a multiple of 4"
134 #: aarch64-opc.c:1637
135 msgid "expected a single offset rather than a range"
138 #: aarch64-opc.c:1641
139 msgid "expected a range of two offsets"
142 #: aarch64-opc.c:1644
143 msgid "expected a range of four offsets"
146 #: aarch64-opc.c:1703
147 msgid "reg pair must start from even reg"
150 #: aarch64-opc.c:1709
151 msgid "reg pair must be contiguous"
154 #: aarch64-opc.c:1723
155 msgid "extraneous register"
158 #: aarch64-opc.c:1729
159 msgid "missing register"
162 #: aarch64-opc.c:1740
163 msgid "stack pointer register expected"
166 #: aarch64-opc.c:1843 aarch64-opc.c:1859
167 msgid "start register out of range"
170 #: aarch64-opc.c:1988 aarch64-opc.c:1996
171 msgid "unexpected address writeback"
174 #: aarch64-opc.c:2007
175 msgid "address writeback expected"
178 #: aarch64-opc.c:2054
179 msgid "negative or unaligned offset expected"
182 #: aarch64-opc.c:2111
183 msgid "invalid register offset"
186 #: aarch64-opc.c:2133
187 msgid "invalid post-increment amount"
190 #: aarch64-opc.c:2149 aarch64-opc.c:2668
191 msgid "invalid shift amount"
194 #: aarch64-opc.c:2162
195 msgid "invalid extend/shift operator"
198 #: aarch64-opc.c:2208 aarch64-opc.c:2468 aarch64-opc.c:2503 aarch64-opc.c:2522
199 #: aarch64-opc.c:2530 aarch64-opc.c:2621 aarch64-opc.c:2798 aarch64-opc.c:2898
200 #: aarch64-opc.c:2911
201 msgid "immediate out of range"
204 #: aarch64-opc.c:2238 aarch64-opc.c:2280 aarch64-opc.c:2343 aarch64-opc.c:2377
205 msgid "invalid addressing mode"
208 #: aarch64-opc.c:2335
209 msgid "index register xzr is not allowed"
212 #: aarch64-opc.c:2456 aarch64-opc.c:2478 aarch64-opc.c:2701 aarch64-opc.c:2709
213 #: aarch64-opc.c:2775 aarch64-opc.c:2804
214 msgid "invalid shift operator"
217 #: aarch64-opc.c:2462
218 msgid "shift amount must be 0 or 12"
221 #: aarch64-opc.c:2485
222 msgid "shift amount must be a multiple of 16"
225 #: aarch64-opc.c:2497
226 msgid "negative immediate value not allowed"
229 #: aarch64-opc.c:2632
230 msgid "immediate zero expected"
233 #: aarch64-opc.c:2646
234 msgid "rotate expected to be 0, 90, 180 or 270"
237 #: aarch64-opc.c:2657
238 msgid "rotate expected to be 90 or 270"
241 #: aarch64-opc.c:2717
242 msgid "shift is not permitted"
245 #: aarch64-opc.c:2742
246 msgid "invalid value for immediate"
249 #: aarch64-opc.c:2767
250 msgid "shift amount must be 0 or 16"
253 #: aarch64-opc.c:2788
254 msgid "floating-point immediate expected"
257 #: aarch64-opc.c:2822
258 msgid "no shift amount allowed for 8-bit constants"
261 #: aarch64-opc.c:2832
262 msgid "shift amount must be 0 or 8"
265 #: aarch64-opc.c:2845
266 msgid "immediate too big for element size"
269 #: aarch64-opc.c:2852
270 msgid "invalid arithmetic immediate"
273 #: aarch64-opc.c:2866
274 msgid "floating-point value must be 0.5 or 1.0"
277 #: aarch64-opc.c:2876
278 msgid "floating-point value must be 0.5 or 2.0"
281 #: aarch64-opc.c:2886
282 msgid "floating-point value must be 0.0 or 1.0"
285 #: aarch64-opc.c:2917
286 msgid "invalid replicated MOV immediate"
289 #: aarch64-opc.c:2975
290 msgid "byte index must be a multiple of 8"
293 #: aarch64-opc.c:3005
295 "the register-index form of PRFM does not accept opcodes in the range 24-31"
298 #: aarch64-opc.c:3058
299 msgid "extend operator expected"
302 #: aarch64-opc.c:3071
303 msgid "missing extend operator"
306 #: aarch64-opc.c:3077
307 msgid "'LSL' operator not allowed"
310 #: aarch64-opc.c:3098
311 msgid "W register expected"
314 #: aarch64-opc.c:3109
315 msgid "shift operator expected"
318 #: aarch64-opc.c:3116
319 msgid "'ROR' operator not allowed"
322 #: aarch64-opc.c:4531
323 msgid "reading from a write-only register"
326 #: aarch64-opc.c:4533
327 msgid "writing to a read-only register"
330 #: aarch64-opc.c:5149
331 msgid "the three register operands must be distinct from one another"
334 #: aarch64-opc.c:5260
335 msgid "destination register differs from preceding instruction"
338 #: aarch64-opc.c:5263
339 msgid "source register differs from preceding instruction"
342 #: aarch64-opc.c:5266
343 msgid "size register differs from preceding instruction"
346 #: aarch64-opc.c:5314
347 msgid "instruction opens new dependency sequence without ending previous one"
350 #: aarch64-opc.c:5343
351 msgid "previous `movprfx' sequence not closed"
354 #: aarch64-opc.c:5362
355 msgid "SVE instruction expected after `movprfx'"
358 #: aarch64-opc.c:5375
359 msgid "SVE `movprfx' compatible instruction expected"
362 #: aarch64-opc.c:5463
363 msgid "predicated instruction expected after `movprfx'"
366 #: aarch64-opc.c:5475
367 msgid "merging predicate expected due to preceding `movprfx'"
370 #: aarch64-opc.c:5487
371 msgid "predicate register differs from that in preceding `movprfx'"
374 #: aarch64-opc.c:5506
375 msgid "output register of preceding `movprfx' not used in current instruction"
378 #: aarch64-opc.c:5519
379 msgid "output register of preceding `movprfx' expected as output"
382 #: aarch64-opc.c:5531
383 msgid "output register of preceding `movprfx' used as input"
386 #: aarch64-opc.c:5547
387 msgid "register size not compatible with previous `movprfx'"
391 msgid "branch operand unaligned"
394 #: alpha-opc.c:170 alpha-opc.c:186
395 msgid "jump hint unaligned"
401 "Warning: disassembly may be wrong due to guessed opcode class choice.\n"
402 "Use -M<class[,class]> to select the correct opcode class(es).\n"
407 msgid "An error occurred while generating the extension instruction operations"
412 msgid "unrecognised disassembler CPU option: %s"
418 "Warning: illegal use of double register pair.\n"
422 msgid "Enforce the designated architecture while decoding."
426 msgid "Recognize DSP instructions."
430 msgid "Recognize FPX SP instructions."
434 msgid "Recognize FPX DP instructions."
438 msgid "Recognize FPU QuarkSE-EM instructions."
442 msgid "Recognize double assist FPU instructions."
446 msgid "Recognize single precision FPU instructions."
450 msgid "Recognize double precision FPU instructions."
454 msgid "Recognize NPS400 instructions."
458 msgid "Use only hexadecimal number to print immediates."
465 "The following ARC specific disassembler options are supported for use \n"
466 "with the -M switch (multiple options should be separated by commas):\n"
469 #: arc-dis.c:1616 mips-dis.c:2910 riscv-dis.c:1462
473 " For the options above, the following values are supported for \"%s\":\n"
484 #: arc-opc.c:41 arc-opc.c:64 arc-opc.c:90 arc-opc.c:114
485 msgid "LP_COUNT register cannot be used as destination register"
489 msgid "cannot use odd number destination register"
492 #: arc-opc.c:101 arc-opc.c:112
493 msgid "cannot use odd number source register"
497 msgid "operand is not zero"
501 msgid "register R30 is a limm indicator"
505 msgid "register out of range"
509 msgid "register must be R0"
513 msgid "register must be R1"
517 msgid "register must be R2"
521 msgid "register must be R3"
525 msgid "register must be SP"
529 msgid "register must be GP"
533 msgid "register must be PCL"
537 msgid "register must be BLINK"
541 msgid "register must be ILINK1"
545 msgid "register must be ILINK2"
548 #. ARC NPS400 Support: See comment near head of file.
549 #: arc-opc.c:392 arc-opc.c:430 arc-opc.c:468 arc-opc.c:737
550 msgid "register must be either r0-r3 or r12-r15"
554 msgid "accepted values are from -1 to 6"
558 msgid "first register of the range should be r13"
562 msgid "last register of the range doesn't fit"
565 #: arc-opc.c:570 arc-opc.c:585
566 msgid "invalid register number, should be fp"
570 msgid "invalid register number, should be blink"
574 msgid "invalid register number, should be pcl"
578 msgid "invalid size, should be 1, 2, 4, or 8"
582 msgid "invalid immediate, must be 1, 2, or 4"
586 msgid "invalid value for CMEM ld/st immediate"
590 msgid "invalid position, should be 0, 16, 32, 48 or 64."
594 msgid "invalid position, should be 16, 32, 64 or 128."
598 msgid "invalid size value must be on range 1-64."
602 msgid "invalid position, should be 0, 8, 16, or 24"
606 msgid "invalid size, value must be "
610 msgid "value out of range 1 - 256"
614 msgid "value must be power of 2"
618 msgid "value must be in the range 0 to 28"
622 msgid "value must be in the range 1 to "
626 msgid "value must be in the range 0 to 240"
630 msgid "value must be a multiple of 16"
634 msgid "invalid address type for operand"
638 msgid "value must be in the range 0 to 31"
642 msgid "invalid position, should be one of: 0,4,8,...124."
646 msgid "Select raw register names"
650 msgid "Select register names used by GCC"
654 msgid "Select register names used in ARM's ISA documentation"
658 msgid "Assume all insns are Thumb insns"
662 msgid "Examine preceding label to determine an insn's type"
666 msgid "Select register names used in the APCS"
670 msgid "Select register names used in the ATPCS"
674 msgid "Select special register names used in the ATPCS"
678 msgid "Enable CDE extensions for coprocessor N space"
682 msgid "<illegal precision>"
687 msgid "unrecognised register name set: %s"
692 msgid "cde coprocessor not between 0-7: %s"
697 msgid "coproc must have an argument: %s"
702 msgid "coprocN argument takes options \"generic\", \"cde\", or \"CDE\": %s"
709 "The following ARM specific disassembler options are supported for use with\n"
713 #: avr-dis.c:130 avr-dis.c:152
720 msgid "internal disassembler error"
725 msgid "unknown constraint `%c'"
732 "The following BPF specific disassembler options are supported for use\n"
733 "with the -M switch (multiple options should be separated by commas):\n"
739 " pseudoc Use pseudo-c syntax.\n"
740 " v1,v2,v3,v4,xbpf Version of the BPF ISA to use.\n"
741 " hex,oct,dec Output numerical base for immediates.\n"
744 #. The option without '=' should be defined above.
745 #: bpf-dis.c:90 riscv-dis.c:120 riscv-dis.c:157
747 msgid "unrecognized disassembler option: %s"
752 msgid "unknown BPF CPU version %u\n"
757 msgid "# internal error, unknown tag in opcode template (%s)"
760 #: cgen-asm.c:351 epiphany-ibld.c:203 fr30-ibld.c:203 frv-ibld.c:203
761 #: ip2k-ibld.c:203 iq2000-ibld.c:203 lm32-ibld.c:203 m32c-ibld.c:203
762 #: m32r-ibld.c:203 mep-ibld.c:203 mt-ibld.c:203 or1k-ibld.c:203
763 #: xstormy16-ibld.c:203
765 msgid "operand out of range (%ld not between %ld and %ld)"
770 msgid "operand out of range (%lu not between %lu and %lu)"
776 "internal error: cris_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
777 "values: `%d' vs. `%d'"
782 msgid "internal error: cris_cgen_cpu_open: unsupported argument `%d'"
787 msgid "internal error: cris_cgen_cpu_open: no endianness specified"
792 msgid "illegal id (%d)"
797 msgid "<unknown register %d>"
803 msgid "Unknown error %d\n"
808 msgid "Address 0x%<PRIx64> is out of bounds.\n"
813 msgid "assertion fail %s:%d"
817 msgid "Please report this bug"
821 msgid "register unavailable for short instructions"
824 #: epiphany-asm.c:115
825 msgid "register name used as immediate value"
828 #. Don't treat "mov ip,ip" as a move-immediate.
829 #: epiphany-asm.c:178 epiphany-asm.c:234
830 msgid "register source in immediate move"
833 #: epiphany-asm.c:187
834 msgid "byte relocation unsupported"
837 #. -- assembler routines inserted here.
839 #: epiphany-asm.c:193 frv-asm.c:972 iq2000-asm.c:56 lm32-asm.c:95
840 #: lm32-asm.c:127 lm32-asm.c:157 lm32-asm.c:187 lm32-asm.c:217 lm32-asm.c:247
841 #: m32c-asm.c:140 m32c-asm.c:235 m32c-asm.c:276 m32c-asm.c:334 m32c-asm.c:355
842 #: m32r-asm.c:53 mep-asm.c:241 mep-asm.c:259 mep-asm.c:274 mep-asm.c:289
843 #: mep-asm.c:301 or1k-asm.c:54
847 #: epiphany-asm.c:270
848 msgid "ABORT: unknown operand"
851 #: epiphany-asm.c:296
852 msgid "Not a pc-relative address."
855 #: epiphany-asm.c:456 fr30-asm.c:311 frv-asm.c:1264 ip2k-asm.c:512
856 #: iq2000-asm.c:460 lm32-asm.c:350 m32c-asm.c:1585 m32r-asm.c:329
857 #: mep-asm.c:1286 mt-asm.c:596 or1k-asm.c:576 xstormy16-asm.c:277
859 msgid "internal error: unrecognized field %d while parsing"
862 #: epiphany-asm.c:508 fr30-asm.c:363 frv-asm.c:1316 ip2k-asm.c:564
863 #: iq2000-asm.c:512 lm32-asm.c:402 m32c-asm.c:1637 m32r-asm.c:381
864 #: mep-asm.c:1338 mt-asm.c:648 or1k-asm.c:628 xstormy16-asm.c:329
865 msgid "missing mnemonic in syntax string"
868 #. We couldn't parse it.
869 #: epiphany-asm.c:643 epiphany-asm.c:647 epiphany-asm.c:736 epiphany-asm.c:843
870 #: fr30-asm.c:498 fr30-asm.c:502 fr30-asm.c:591 fr30-asm.c:698 frv-asm.c:1451
871 #: frv-asm.c:1455 frv-asm.c:1544 frv-asm.c:1651 ip2k-asm.c:699 ip2k-asm.c:703
872 #: ip2k-asm.c:792 ip2k-asm.c:899 iq2000-asm.c:647 iq2000-asm.c:651
873 #: iq2000-asm.c:740 iq2000-asm.c:847 lm32-asm.c:537 lm32-asm.c:541
874 #: lm32-asm.c:630 lm32-asm.c:737 m32c-asm.c:1772 m32c-asm.c:1776
875 #: m32c-asm.c:1865 m32c-asm.c:1972 m32r-asm.c:516 m32r-asm.c:520 m32r-asm.c:609
876 #: m32r-asm.c:716 mep-asm.c:1473 mep-asm.c:1477 mep-asm.c:1566 mep-asm.c:1673
877 #: mt-asm.c:783 mt-asm.c:787 mt-asm.c:876 mt-asm.c:983 or1k-asm.c:763
878 #: or1k-asm.c:767 or1k-asm.c:856 or1k-asm.c:963 xstormy16-asm.c:464
879 #: xstormy16-asm.c:468 xstormy16-asm.c:557 xstormy16-asm.c:664
880 msgid "unrecognized instruction"
883 #: epiphany-asm.c:690 fr30-asm.c:545 frv-asm.c:1498 ip2k-asm.c:746
884 #: iq2000-asm.c:694 lm32-asm.c:584 m32c-asm.c:1819 m32r-asm.c:563
885 #: mep-asm.c:1520 mt-asm.c:830 or1k-asm.c:810 xstormy16-asm.c:511
887 msgid "syntax error (expected char `%c', found `%c')"
890 #: epiphany-asm.c:700 fr30-asm.c:555 frv-asm.c:1508 ip2k-asm.c:756
891 #: iq2000-asm.c:704 lm32-asm.c:594 m32c-asm.c:1829 m32r-asm.c:573
892 #: mep-asm.c:1530 mt-asm.c:840 or1k-asm.c:820 xstormy16-asm.c:521
894 msgid "syntax error (expected char `%c', found end of instruction)"
897 #: epiphany-asm.c:730 fr30-asm.c:585 frv-asm.c:1538 ip2k-asm.c:786
898 #: iq2000-asm.c:734 lm32-asm.c:624 m32c-asm.c:1859 m32r-asm.c:603
899 #: mep-asm.c:1560 mt-asm.c:870 or1k-asm.c:850 xstormy16-asm.c:551
900 msgid "junk at end of line"
903 #: epiphany-asm.c:842 fr30-asm.c:697 frv-asm.c:1650 ip2k-asm.c:898
904 #: iq2000-asm.c:846 lm32-asm.c:736 m32c-asm.c:1971 m32r-asm.c:715
905 #: mep-asm.c:1672 mt-asm.c:982 or1k-asm.c:962 xstormy16-asm.c:663
906 msgid "unrecognized form of instruction"
909 #: epiphany-asm.c:856 fr30-asm.c:711 frv-asm.c:1664 ip2k-asm.c:912
910 #: iq2000-asm.c:860 lm32-asm.c:750 m32c-asm.c:1985 m32r-asm.c:729
911 #: mep-asm.c:1686 mt-asm.c:996 or1k-asm.c:976 xstormy16-asm.c:677
913 msgid "bad instruction `%.50s...'"
916 #: epiphany-asm.c:859 fr30-asm.c:714 frv-asm.c:1667 ip2k-asm.c:915
917 #: iq2000-asm.c:863 lm32-asm.c:753 m32c-asm.c:1988 m32r-asm.c:732
918 #: mep-asm.c:1689 mt-asm.c:999 or1k-asm.c:979 xstormy16-asm.c:680
920 msgid "bad instruction `%.50s'"
923 #: epiphany-desc.c:2110
926 "internal error: epiphany_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
927 "values: `%d' vs. `%d'"
930 #: epiphany-desc.c:2198
932 msgid "internal error: epiphany_cgen_cpu_open: unsupported argument `%d'"
935 #: epiphany-desc.c:2217
937 msgid "internal error: epiphany_cgen_cpu_open: no endianness specified"
940 #. Default text to print if an instruction isn't recognized.
941 #: epiphany-dis.c:41 fr30-dis.c:41 frv-dis.c:41 ip2k-dis.c:41 iq2000-dis.c:41
942 #: lm32-dis.c:41 m32c-dis.c:41 m32r-dis.c:41 mep-dis.c:41 mmix-dis.c:293
943 #: mt-dis.c:41 nds32-dis.c:64 or1k-dis.c:41 xstormy16-dis.c:41
947 #: epiphany-dis.c:279 fr30-dis.c:300 frv-dis.c:397 ip2k-dis.c:289
948 #: iq2000-dis.c:190 lm32-dis.c:148 m32c-dis.c:892 m32r-dis.c:280 mep-dis.c:1202
949 #: mt-dis.c:288 or1k-dis.c:175 xstormy16-dis.c:169
951 msgid "internal error: unrecognized field %d while printing insn"
954 #: epiphany-ibld.c:166 fr30-ibld.c:166 frv-ibld.c:166 ip2k-ibld.c:166
955 #: iq2000-ibld.c:166 lm32-ibld.c:166 m32c-ibld.c:166 m32r-ibld.c:166
956 #: mep-ibld.c:166 mt-ibld.c:166 or1k-ibld.c:166 xstormy16-ibld.c:166
958 msgid "operand out of range (%ld not between %ld and %lu)"
961 #: epiphany-ibld.c:187 fr30-ibld.c:187 frv-ibld.c:187 ip2k-ibld.c:187
962 #: iq2000-ibld.c:187 lm32-ibld.c:187 m32c-ibld.c:187 m32r-ibld.c:187
963 #: mep-ibld.c:187 mt-ibld.c:187 or1k-ibld.c:187 xstormy16-ibld.c:187
965 msgid "operand out of range (0x%lx not between 0 and 0x%lx)"
968 #: epiphany-ibld.c:885 fr30-ibld.c:740 frv-ibld.c:866 ip2k-ibld.c:617
969 #: iq2000-ibld.c:723 lm32-ibld.c:644 m32c-ibld.c:1741 m32r-ibld.c:675
970 #: mep-ibld.c:1218 mt-ibld.c:759 or1k-ibld.c:738 xstormy16-ibld.c:688
972 msgid "internal error: unrecognized field %d while building insn"
975 #: epiphany-ibld.c:1180 fr30-ibld.c:946 frv-ibld.c:1184 ip2k-ibld.c:693
976 #: iq2000-ibld.c:899 lm32-ibld.c:749 m32c-ibld.c:2903 m32r-ibld.c:813
977 #: mep-ibld.c:1818 mt-ibld.c:980 or1k-ibld.c:897 xstormy16-ibld.c:835
979 msgid "internal error: unrecognized field %d while decoding insn"
982 #: epiphany-ibld.c:1324 fr30-ibld.c:1093 frv-ibld.c:1463 ip2k-ibld.c:768
983 #: iq2000-ibld.c:1031 lm32-ibld.c:839 m32c-ibld.c:3521 m32r-ibld.c:927
984 #: mep-ibld.c:2289 mt-ibld.c:1181 or1k-ibld.c:993 xstormy16-ibld.c:946
986 msgid "internal error: unrecognized field %d while getting int operand"
989 #: epiphany-ibld.c:1450 fr30-ibld.c:1222 frv-ibld.c:1724 ip2k-ibld.c:825
990 #: iq2000-ibld.c:1145 lm32-ibld.c:911 m32c-ibld.c:4121 m32r-ibld.c:1023
991 #: mep-ibld.c:2742 mt-ibld.c:1364 or1k-ibld.c:1071 xstormy16-ibld.c:1039
993 msgid "internal error: unrecognized field %d while getting vma operand"
996 #: epiphany-ibld.c:1583 fr30-ibld.c:1354 frv-ibld.c:1992 ip2k-ibld.c:885
997 #: iq2000-ibld.c:1266 lm32-ibld.c:990 m32c-ibld.c:4709 m32r-ibld.c:1125
998 #: mep-ibld.c:3156 mt-ibld.c:1554 or1k-ibld.c:1156 xstormy16-ibld.c:1139
1000 msgid "internal error: unrecognized field %d while setting int operand"
1003 #: epiphany-ibld.c:1706 fr30-ibld.c:1476 frv-ibld.c:2250 ip2k-ibld.c:935
1004 #: iq2000-ibld.c:1377 lm32-ibld.c:1059 m32c-ibld.c:5287 m32r-ibld.c:1217
1005 #: mep-ibld.c:3560 mt-ibld.c:1734 or1k-ibld.c:1231 xstormy16-ibld.c:1229
1007 msgid "internal error: unrecognized field %d while setting vma operand"
1010 #: fr30-asm.c:93 m32c-asm.c:872 m32c-asm.c:879
1011 msgid "Register number is not valid"
1015 msgid "Register must be between r0 and r7"
1019 msgid "Register must be between r8 and r15"
1022 #: fr30-asm.c:116 m32c-asm.c:910
1023 msgid "Register list is not valid"
1029 "internal error: fr30_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1030 "values: `%d' vs. `%d'"
1035 msgid "internal error: fr30_cgen_cpu_open: unsupported argument `%d'"
1040 msgid "internal error: fr30_cgen_cpu_open: no endianness specified"
1047 #: frv-asm.c:611 frv-asm.c:621
1048 msgid "Special purpose register number is out of range"
1052 msgid "Value of A operand must be 0 or 1"
1056 msgid "register number must be even"
1062 "internal error: frv_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1063 "values: `%d' vs. `%d'"
1068 msgid "internal error: frv_cgen_cpu_open: unsupported argument `%d'"
1073 msgid "internal error: frv_cgen_cpu_open: no endianness specified"
1078 msgid "internal error: bad vliw->next_slot value"
1083 msgid "internal error: bad major code"
1088 msgid "internal error: bad insn unit"
1098 msgid "Don't understand 0x%x \n"
1102 msgid "<internal disassembler error>"
1109 "The following i386/x86-64 specific disassembler options are supported for "
1111 "with the -M switch (multiple options should be separated by commas):\n"
1116 msgid " x86-64 Disassemble in 64bit mode\n"
1121 msgid " i386 Disassemble in 32bit mode\n"
1126 msgid " i8086 Disassemble in 16bit mode\n"
1131 msgid " att Display instruction in AT&T syntax\n"
1136 msgid " intel Display instruction in Intel syntax\n"
1142 " att-mnemonic (AT&T syntax only)\n"
1143 " Display instruction with AT&T mnemonic\n"
1149 " intel-mnemonic (AT&T syntax only)\n"
1150 " Display instruction with Intel mnemonic\n"
1155 msgid " addr64 Assume 64bit address size\n"
1160 msgid " addr32 Assume 32bit address size\n"
1165 msgid " addr16 Assume 16bit address size\n"
1170 msgid " data32 Assume 32bit data size\n"
1175 msgid " data16 Assume 16bit data size\n"
1180 msgid " suffix Always display instruction suffix in AT&T syntax\n"
1185 msgid " amd64 Display instruction in AMD64 ISA\n"
1190 msgid " intel64 Display instruction in Intel64 ISA\n"
1194 msgid "64-bit address is disabled"
1197 #. We've been passed a w. Return with an error message so that
1198 #. cgen will try the next parsing option.
1200 msgid "W keyword invalid in FR operand slot."
1203 #. Invalid offset present.
1205 msgid "offset(IP) is not a valid form"
1208 #. Found something there in front of (DP) but it's out
1211 msgid "(DP) offset out of range."
1214 #. Found something there in front of (SP) but it's out
1217 msgid "(SP) offset out of range."
1221 msgid "illegal use of parentheses"
1225 msgid "operand out of range (not between 1 and 255)"
1228 #. Something is very wrong. opindex has to be one of the above.
1230 msgid "parse_addr16: invalid opindex."
1234 msgid "Byte address required. - must be even."
1238 msgid "cgen_parse_address returned a symbol. Literal required."
1242 msgid "percent-operator operand is not a symbol"
1246 msgid "Attempt to find bit index of 0"
1252 "internal error: ip2k_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1253 "values: `%d' vs. `%d'"
1258 msgid "internal error: ip2k_cgen_cpu_open: unsupported argument `%d'"
1263 msgid "internal error: ip2k_cgen_cpu_open: no endianness specified"
1266 #: iq2000-asm.c:112 iq2000-asm.c:142
1267 msgid "immediate value cannot be register"
1270 #: iq2000-asm.c:123 iq2000-asm.c:153 lm32-asm.c:70
1271 msgid "immediate value out of range"
1275 msgid "21-bit offset out of range"
1278 #: iq2000-desc.c:2021
1281 "internal error: iq2000_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1282 "values: `%d' vs. `%d'"
1285 #: iq2000-desc.c:2109
1287 msgid "internal error: iq2000_cgen_cpu_open: unsupported argument `%d'"
1290 #: iq2000-desc.c:2128
1292 msgid "internal error: iq2000_cgen_cpu_open: no endianness specified"
1299 "The following KVX specific disassembler options are supported for use\n"
1300 "with the -M switch (multiple options should be separated by commas):\n"
1307 " pretty Print 32-bit words in natural order corresponding to "
1308 "re-ordered instruction.\n"
1315 " compact-assembly Do not emit a new line between bundles of "
1323 " no-compact-assembly Emit a new line between bundles of instructions.\n"
1327 msgid "expecting gp relative address: gp(symbol)"
1331 msgid "expecting got relative address: got(symbol)"
1335 msgid "expecting got relative address: gotoffhi16(symbol)"
1339 msgid "expecting got relative address: gotofflo16(symbol)"
1345 "internal error: lm32_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1346 "values: `%d' vs. `%d'"
1351 msgid "internal error: lm32_cgen_cpu_open: unsupported argument `%d'"
1356 msgid "internal error: lm32_cgen_cpu_open: no endianness specified"
1359 #: loongarch-dis.c:324
1363 "The following LoongArch disassembler options are supported for use\n"
1364 "with the -M switch (multiple options should be separated by commas):\n"
1367 #: loongarch-dis.c:328
1371 " no-aliases Use canonical instruction forms.\n"
1374 #: loongarch-dis.c:330
1378 " numeric Print numeric register names, rather than ABI names.\n"
1381 #: m10200-dis.c:151 m10300-dis.c:574
1383 msgid "unknown\t0x%04lx"
1388 msgid "unknown\t0x%02lx"
1392 msgid "imm:6 immediate is out of range"
1397 msgid "%dsp8() takes a symbolic address, not a number"
1400 #: m32c-asm.c:159 m32c-asm.c:163 m32c-asm.c:253
1401 msgid "dsp:8 immediate is out of range"
1404 #: m32c-asm.c:184 m32c-asm.c:188
1405 msgid "Immediate is out of range -8 to 7"
1408 #: m32c-asm.c:209 m32c-asm.c:213
1409 msgid "Immediate is out of range -7 to 8"
1414 msgid "%dsp16() takes a symbolic address, not a number"
1417 #: m32c-asm.c:305 m32c-asm.c:312 m32c-asm.c:373
1418 msgid "dsp:16 immediate is out of range"
1422 msgid "dsp:20 immediate is out of range"
1425 #: m32c-asm.c:425 m32c-asm.c:445
1426 msgid "dsp:24 immediate is out of range"
1430 msgid "immediate is out of range 1-2"
1434 msgid "immediate is out of range 1-8"
1438 msgid "immediate is out of range 0-7"
1442 msgid "immediate is out of range 2-9"
1446 msgid "Bit number for indexing general register is out of range 0-15"
1449 #: m32c-asm.c:606 m32c-asm.c:662
1450 msgid "bit,base is out of range"
1453 #: m32c-asm.c:613 m32c-asm.c:618 m32c-asm.c:666
1454 msgid "bit,base out of range for symbol"
1458 msgid "not a valid r0l/r0h pair"
1462 msgid "Invalid size specifier"
1465 #: m32c-desc.c:63034
1468 "internal error: m32c_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1469 "values: `%d' vs. `%d'"
1472 #: m32c-desc.c:63122
1474 msgid "internal error: m32c_cgen_cpu_open: unsupported argument `%d'"
1477 #: m32c-desc.c:63141
1479 msgid "internal error: m32c_cgen_cpu_open: no endianness specified"
1485 "internal error: m32r_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1486 "values: `%d' vs. `%d'"
1491 msgid "internal error: m32r_cgen_cpu_open: unsupported argument `%d'"
1496 msgid "internal error: m32r_cgen_cpu_open: no endianness specified"
1501 msgid "<function code %d>"
1506 msgid "<internal error in opcode table: %s %s>\n"
1510 msgid "Only $tp or $13 allowed for this opcode"
1514 msgid "Only $sp or $15 allowed for this opcode"
1517 #: mep-asm.c:308 mep-asm.c:504
1519 msgid "invalid %function() here"
1523 msgid "Immediate is out of range -32768 to 32767"
1527 msgid "Immediate is out of range 0 to 65535"
1530 #: mep-asm.c:549 mep-asm.c:562
1531 msgid "Immediate is out of range -512 to 511"
1534 #: mep-asm.c:554 mep-asm.c:563
1535 msgid "Immediate is out of range -128 to 127"
1539 msgid "Value is not aligned enough"
1545 "internal error: mep_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1546 "values: `%d' vs. `%d'"
1551 msgid "internal error: mep_cgen_cpu_open: unsupported argument `%d'"
1556 msgid "internal error: mep_cgen_cpu_open: no endianness specified"
1561 msgid "illegal MEP INDEX setting '%x' in ELF header e_flags field"
1564 #: mips-dis.c:1907 mips-dis.c:2140
1566 msgid "# internal error, undefined operand in `%s %s'"
1570 msgid "Use canonical instruction forms.\n"
1574 msgid "Recognize MSA instructions.\n"
1578 msgid "Recognize the virtualization ASE instructions.\n"
1583 "Recognize the eXtended Physical Address (XPA) ASE\n"
1588 msgid "Recognize the Global INValidate (GINV) ASE instructions.\n"
1593 "Recognize the Loongson MultiMedia extensions Instructions (MMI) ASE "
1598 msgid "Recognize the Loongson Content Address Memory (CAM) instructions.\n"
1602 msgid "Recognize the Loongson EXTensions (EXT) instructions.\n"
1606 msgid "Recognize the Loongson EXTensions R2 (EXT2) instructions.\n"
1611 "Print GPR names according to specified ABI.\n"
1612 " Default: based on binary being disassembled.\n"
1617 "Print FPR names according to specified ABI.\n"
1618 " Default: numeric.\n"
1623 "Print CP0 register names according to specified architecture.\n"
1624 " Default: based on binary being disassembled.\n"
1629 "Print HWR names according to specified architecture.\n"
1630 " Default: based on binary being disassembled.\n"
1634 msgid "Print GPR and FPR names according to specified ABI.\n"
1639 "Print CP0 register and HWR names according to specified\n"
1647 "The following MIPS specific disassembler options are supported for use\n"
1648 "with the -M switch (multiple options should be separated by commas):\n"
1654 msgid "bad case %d (%s) in %s:%d"
1659 msgid "internal: non-debugged code (test-case missing): %s:%d"
1666 #: mmix-dis.c:247 mmix-dis.c:255
1672 msgid "*unknown operands type: %d*"
1675 #: msp430-decode.opc:145 rl78-decode.opc:106
1677 msgid "internal error: immediate() called with invalid byte count %d"
1682 msgid "Warning: disassembly unreliable - not enough bytes available"
1687 msgid "Error: read from memory failed"
1691 msgid "Warning: illegal as emulation instr"
1694 #. R2/R3 are illegal as dest: may be data section.
1696 msgid "Warning: illegal as 2-op instr"
1699 #: msp430-dis.c:1002
1700 msgid "Warning: unrecognised CALLA addressing mode"
1703 #: msp430-dis.c:1303 msp430-dis.c:1324 msp430-dis.c:1345
1705 msgid "Warning: reserved use of A/L and B/W bits detected"
1708 #: mt-asm.c:110 mt-asm.c:190
1709 msgid "Operand out of range. Must be between -32768 and 32767."
1713 msgid "Biiiig Trouble in parse_imm16!"
1717 msgid "The percent-operator's operand is not a symbol"
1721 msgid "invalid operand. type may have values 0,1,2 only."
1727 "internal error: mt_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1728 "values: `%d' vs. `%d'"
1733 msgid "internal error: mt_cgen_cpu_open: unsupported argument `%d'"
1738 msgid "internal error: mt_cgen_cpu_open: no endianness specified"
1743 msgid "internal error: unknown operand, %s"
1748 msgid "internal error: don't know how to handle parsing results"
1753 msgid "internal error: unknown hardware resource"
1757 msgid "insufficient data to decode instruction"
1761 msgid "<invalid_instruction>:"
1765 msgid ", <invalid CRC operator>, "
1769 msgid "<invalid branch>["
1772 #: nfp-dis.c:2055 nfp-dis.c:2326
1774 msgid "<invalid cmd target %d:%d:%d>[]"
1777 #: nfp-dis.c:2066 nfp-dis.c:2337
1779 msgid "<invalid cmd action %d:%d:%d>[]"
1783 msgid "File has no ME-Config section."
1787 msgid "File has invalid ME-Config section."
1792 msgid "Error processing section %u "
1797 msgid "Invalid NFP option: %s"
1804 "The following NFP specific disassembler options are supported for use\n"
1805 "with the -M switch (multiple options should be separated by commas):\n"
1812 " no-pc\t\t Don't print program counter prefix.\n"
1813 " ctx4\t\t Force disassembly using 4-context mode.\n"
1814 " ctx8\t\t Force 8-context mode, takes precedence."
1819 msgid "out of memory"
1824 msgid "internal error: broken opcode descriptor for `%s %s'"
1827 #. I and Z are output operands and can`t be immediate
1828 #. A is an address and we can`t have the address of
1829 #. an immediate either. We don't know how much to increase
1830 #. aoffsetp by since whatever generated this is broken
1834 msgid "$<undefined>"
1838 msgid "relocation invalid for store"
1842 msgid "internal relocation type invalid"
1848 "internal error: or1k_cgen_rebuild_tables: conflicting insn-chunk-bitsize "
1849 "values: `%d' vs. `%d'"
1854 msgid "internal error: or1k_cgen_cpu_open: unsupported argument `%d'"
1859 msgid "internal error: or1k_cgen_cpu_open: no endianness specified"
1864 msgid "warning: ignoring unknown -M%s option"
1871 "The following PPC specific disassembler options are supported for use with\n"
1875 #: ppc-opc.c:52 ppc-opc.c:75 ppc-opc.c:101 ppc-opc.c:131
1876 msgid "invalid register"
1880 msgid "invalid conditional option"
1884 msgid "invalid counter access"
1888 msgid "BO value implies no branch hint, when using + or - modifier"
1892 msgid "attempt to set y bit when using + or - modifier"
1896 msgid "attempt to set 'at' bits when using + or - modifier"
1900 msgid "invalid offset: must be in the range [-512, -8] and be a multiple of 8"
1904 msgid "invalid R operand"
1908 msgid "invalid mask field"
1912 msgid "invalid mfcr mask"
1915 #: ppc-opc.c:902 ppc-opc.c:920
1916 msgid "illegal L operand value"
1920 msgid "illegal WC operand value"
1924 msgid "incompatible L operand value"
1927 #: ppc-opc.c:1239 ppc-opc.c:1274
1928 msgid "illegal bitmask"
1932 msgid "address register in load range"
1936 msgid "illegal PL operand value"
1940 msgid "index register in load range"
1943 #: ppc-opc.c:1568 ppc-opc.c:1654
1944 msgid "source and target register operands must be different"
1948 msgid "invalid register operand when updating"
1952 msgid "illegal immediate value"
1956 msgid "invalid bat number"
1960 msgid "invalid sprg number"
1964 msgid "invalid tbr number"
1967 #: ppc-opc.c:2203 ppc-opc.c:2271
1968 msgid "VSR overlaps ACC operand"
1972 msgid "invalid constant"
1975 #: ppc-opc.c:2482 ppc-opc.c:2505 ppc-opc.c:2528 ppc-opc.c:2551
1976 msgid "UIMM = 00000 is illegal"
1980 msgid "UIMM values >7 are illegal"
1984 msgid "UIMM values >15 are illegal"
1988 msgid "GPR odd is illegal"
1991 #: ppc-opc.c:2643 ppc-opc.c:2666
1992 msgid "invalid offset"
1996 msgid "invalid Ddd value"
1999 #: ppc-opc.c:2742 ppc-opc.c:2769
2000 msgid "invalid TH value"
2003 #. Invalid options with '=', no option name before '=',
2004 #. and no value after '='.
2007 msgid "unrecognized disassembler option with '=': %s"
2012 msgid "unknown privileged spec set by %s=%s"
2018 "mis-matched privilege spec set by %s=%s, the elf privilege attribute is %s"
2023 msgid "# internal error, undefined modifier (%c)"
2027 msgid "Print numeric register names, rather than ABI names."
2031 msgid "Disassemble only into canonical instructions."
2035 msgid "Print the CSR according to the chosen privilege spec."
2042 "The following RISC-V specific disassembler options are supported for use\n"
2043 "with the -M switch (multiple options should be separated by commas):\n"
2046 #: rx-dis.c:139 rx-dis.c:163 rx-dis.c:171 rx-dis.c:179 rx-dis.c:187
2047 msgid "<invalid register number>"
2050 #: rx-dis.c:147 rx-dis.c:195
2051 msgid "<invalid condition code>"
2055 msgid "<invalid flag>"
2059 msgid "<invalid opsize>"
2063 msgid "<invalid size>"
2066 #: s12z-dis.c:239 s12z-dis.c:296 s12z-dis.c:307
2067 msgid "<illegal reg num>"
2079 msgid "Disassemble in ESA architecture mode"
2083 msgid "Disassemble in z/Architecture mode"
2087 msgid "Print unknown instructions according to length from first two bits"
2091 msgid "Print instruction description as comment"
2096 msgid "unknown S/390 disassembler option: %s"
2103 "The following S/390 specific disassembler options are supported for use\n"
2104 "with the -M switch (multiple options should be separated by commas):\n"
2107 #: score-dis.c:653 score-dis.c:871 score-dis.c:1032 score-dis.c:1138
2108 #: score-dis.c:1146 score-dis.c:1153 score7-dis.c:691 score7-dis.c:854
2109 msgid "<illegal instruction>"
2112 #: sparc-dis.c:308 sparc-dis.c:318
2114 msgid "internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"
2119 msgid "internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"
2122 #. Mark as non-valid instruction.
2128 msgid "<invalid s-reg number>"
2132 msgid "<invalid reg number>"
2136 msgid "<invalid v-reg number>"
2140 msgid "<invalid CC-reg number>"
2144 msgid "<invalid float-CC-reg number>"
2148 msgid "<invalid cacheop number>"
2152 msgid "<invalid prefop number>"
2157 msgid "unknown operand shift: %x"
2162 msgid "unknown reg: %d"
2165 #. The functions used to insert and extract complicated operands.
2166 #. Note: There is a conspiracy between these functions and
2167 #. v850_insert_operand() in gas/config/tc-v850.c. Error messages
2168 #. containing the string 'out of range' will be ignored unless a
2169 #. specific command line option is given to GAS.
2171 msgid "displacement value is not in range and is not aligned"
2175 msgid "displacement value is out of range"
2179 msgid "displacement value is not aligned"
2183 msgid "immediate value is out of range"
2187 msgid "branch value out of range"
2191 msgid "branch value not in range and to odd offset"
2195 msgid "branch to odd offset"
2199 msgid "position value is out of range"
2203 msgid "width value is out of range"
2207 msgid "SelID is out of range"
2211 msgid "vector8 is out of range"
2215 msgid "vector5 is out of range"
2219 msgid "imm10 is out of range"
2223 msgid "SR/SelID is out of range"
2227 msgid "invalid register for stack adjustment"
2231 msgid "invalid register name"
2235 msgid "Disassemble \"register\" names"
2239 msgid "Name well-known globals"
2245 "The following WebAssembly-specific disassembler options are supported for "
2247 "with the -M switch:\n"
2250 #: xstormy16-asm.c:71
2251 msgid "Bad register in preincrement"
2254 #: xstormy16-asm.c:76
2255 msgid "Bad register in postincrement"
2258 #: xstormy16-asm.c:78
2259 msgid "Bad register name"
2262 #: xstormy16-asm.c:82
2263 msgid "Label conflicts with register name"
2266 #: xstormy16-asm.c:86
2267 msgid "Label conflicts with `Rx'"
2270 #: xstormy16-asm.c:88
2271 msgid "Bad immediate expression"
2274 #: xstormy16-asm.c:109
2275 msgid "No relocation for small immediate"
2278 #: xstormy16-asm.c:119
2279 msgid "Small operand was not an immediate number"
2282 #: xstormy16-asm.c:157
2283 msgid "Operand is not a symbol"
2286 #: xstormy16-asm.c:165
2287 msgid "Syntax error: No trailing ')'"
2290 #: xstormy16-desc.c:1318
2293 "internal error: xstormy16_cgen_rebuild_tables: conflicting insn-chunk-"
2294 "bitsize values: `%d' vs. `%d'"
2297 #: xstormy16-desc.c:1406
2299 msgid "internal error: xstormy16_cgen_cpu_open: unsupported argument `%d'"
2302 #: xstormy16-desc.c:1425
2304 msgid "internal error: xstormy16_cgen_cpu_open: no endianness specified"