1 /* BFD support for handling relocation entries.
2 Copyright (C) 1990-2023 Free Software Foundation, Inc.
3 Written by Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 BFD maintains relocations in much the same way it maintains
27 symbols: they are left alone until required, then read in
28 en-masse and translated into an internal form. A common
29 routine <<bfd_perform_relocation>> acts upon the
30 canonical form to do the fixup.
32 Relocations are maintained on a per section basis,
33 while symbols are maintained on a per BFD basis.
35 All that a back end has to do to fit the BFD interface is to create
36 a <<struct reloc_cache_entry>> for each relocation
37 in a particular section, and fill in the right bits of the structures.
46 /* DO compile in the reloc_code name table from libbfd.h. */
47 #define _BFD_MAKE_TABLE_bfd_reloc_code_real
58 typedef arelent, howto manager, Relocations, Relocations
63 This is the structure of a relocation entry:
67 .typedef enum bfd_reloc_status
69 . {* No errors detected. Note - the value 2 is used so that it
70 . will not be mistaken for the boolean TRUE or FALSE values. *}
73 . {* The relocation was performed, but there was an overflow. *}
76 . {* The address to relocate was not within the section supplied. *}
77 . bfd_reloc_outofrange,
79 . {* Used by special functions. *}
82 . {* Unsupported relocation size requested. *}
83 . bfd_reloc_notsupported,
85 . {* Target specific meaning. *}
88 . {* The symbol to relocate against was undefined. *}
89 . bfd_reloc_undefined,
91 . {* The relocation was performed, but may not be ok. If this type is
92 . returned, the error_message argument to bfd_perform_relocation
96 . bfd_reloc_status_type;
98 .typedef const struct reloc_howto_struct reloc_howto_type;
100 .typedef struct reloc_cache_entry
102 . {* A pointer into the canonical table of pointers. *}
103 . struct bfd_symbol **sym_ptr_ptr;
105 . {* offset in section. *}
106 . bfd_size_type address;
108 . {* addend for relocation value. *}
111 . {* Pointer to how to perform the required relocation. *}
112 . reloc_howto_type *howto;
122 Here is a description of each of the fields within an <<arelent>>:
126 The symbol table pointer points to a pointer to the symbol
127 associated with the relocation request. It is the pointer
128 into the table returned by the back end's
129 <<canonicalize_symtab>> action. @xref{Symbols}. The symbol is
130 referenced through a pointer to a pointer so that tools like
131 the linker can fix up all the symbols of the same name by
132 modifying only one pointer. The relocation routine looks in
133 the symbol and uses the base of the section the symbol is
134 attached to and the value of the symbol as the initial
135 relocation offset. If the symbol pointer is zero, then the
136 section provided is looked up.
140 The <<address>> field gives the offset in bytes from the base of
141 the section data which owns the relocation record to the first
142 byte of relocatable information. The actual data relocated
143 will be relative to this point; for example, a relocation
144 type which modifies the bottom two bytes of a four byte word
145 would not touch the first byte pointed to in a big endian
150 The <<addend>> is a value provided by the back end to be added (!)
151 to the relocation offset. Its interpretation is dependent upon
152 the howto. For example, on the 68k the code:
157 | return foo[0x12345678];
160 Could be compiled into:
163 | moveb @@#12345678,d0
168 This could create a reloc pointing to <<foo>>, but leave the
169 offset in the data, something like:
171 |RELOCATION RECORDS FOR [.text]:
175 |00000000 4e56 fffc ; linkw fp,#-4
176 |00000004 1039 1234 5678 ; moveb @@#12345678,d0
177 |0000000a 49c0 ; extbl d0
178 |0000000c 4e5e ; unlk fp
181 Using coff and an 88k, some instructions don't have enough
182 space in them to represent the full address range, and
183 pointers have to be loaded in two parts. So you'd get something like:
185 | or.u r13,r0,hi16(_foo+0x12345678)
186 | ld.b r2,r13,lo16(_foo+0x12345678)
189 This should create two relocs, both pointing to <<_foo>>, and with
190 0x12340000 in their addend field. The data would consist of:
192 |RELOCATION RECORDS FOR [.text]:
194 |00000002 HVRT16 _foo+0x12340000
195 |00000006 LVRT16 _foo+0x12340000
197 |00000000 5da05678 ; or.u r13,r0,0x5678
198 |00000004 1c4d5678 ; ld.b r2,r13,0x5678
199 |00000008 f400c001 ; jmp r1
201 The relocation routine digs out the value from the data, adds
202 it to the addend to get the original offset, and then adds the
203 value of <<_foo>>. Note that all 32 bits have to be kept around
204 somewhere, to cope with carry from bit 15 to bit 16.
206 One further example is the sparc and the a.out format. The
207 sparc has a similar problem to the 88k, in that some
208 instructions don't have room for an entire offset, but on the
209 sparc the parts are created in odd sized lumps. The designers of
210 the a.out format chose to not use the data within the section
211 for storing part of the offset; all the offset is kept within
212 the reloc. Anything in the data should be ignored.
215 | sethi %hi(_foo+0x12345678),%g2
216 | ldsb [%g2+%lo(_foo+0x12345678)],%i0
220 Both relocs contain a pointer to <<foo>>, and the offsets
223 |RELOCATION RECORDS FOR [.text]:
225 |00000004 HI22 _foo+0x12345678
226 |00000008 LO10 _foo+0x12345678
228 |00000000 9de3bf90 ; save %sp,-112,%sp
229 |00000004 05000000 ; sethi %hi(_foo+0),%g2
230 |00000008 f048a000 ; ldsb [%g2+%lo(_foo+0)],%i0
231 |0000000c 81c7e008 ; ret
232 |00000010 81e80000 ; restore
236 The <<howto>> field can be imagined as a
237 relocation instruction. It is a pointer to a structure which
238 contains information on what to do with all of the other
239 information in the reloc record and data section. A back end
240 would normally have a relocation instruction set and turn
241 relocations into pointers to the correct structure on input -
242 but it would be possible to create each howto field on demand.
248 <<enum complain_overflow>>
250 Indicates what sort of overflow checking should be done when
251 performing a relocation.
255 .enum complain_overflow
257 . {* Do not complain on overflow. *}
258 . complain_overflow_dont,
260 . {* Complain if the value overflows when considered as a signed
261 . number one bit larger than the field. ie. A bitfield of N bits
262 . is allowed to represent -2**n to 2**n-1. *}
263 . complain_overflow_bitfield,
265 . {* Complain if the value overflows when considered as a signed
267 . complain_overflow_signed,
269 . {* Complain if the value overflows when considered as an
270 . unsigned number. *}
271 . complain_overflow_unsigned
280 The <<reloc_howto_type>> is a structure which contains all the
281 information that libbfd needs to know to tie up a back end's data.
284 .struct reloc_howto_struct
286 . {* The type field has mainly a documentary use - the back end can
287 . do what it wants with it, though normally the back end's idea of
288 . an external reloc number is stored in this field. *}
291 . {* The size of the item to be relocated in bytes. *}
292 . unsigned int size:4;
294 . {* The number of bits in the field to be relocated. This is used
295 . when doing overflow checking. *}
296 . unsigned int bitsize:7;
298 . {* The value the final relocation is shifted right by. This drops
299 . unwanted data from the relocation. *}
300 . unsigned int rightshift:6;
302 . {* The bit position of the reloc value in the destination.
303 . The relocated value is left shifted by this amount. *}
304 . unsigned int bitpos:6;
306 . {* What type of overflow error should be checked for when
308 . ENUM_BITFIELD (complain_overflow) complain_on_overflow:2;
310 . {* The relocation value should be negated before applying. *}
311 . unsigned int negate:1;
313 . {* The relocation is relative to the item being relocated. *}
314 . unsigned int pc_relative:1;
316 . {* Some formats record a relocation addend in the section contents
317 . rather than with the relocation. For ELF formats this is the
318 . distinction between USE_REL and USE_RELA (though the code checks
319 . for USE_REL == 1/0). The value of this field is TRUE if the
320 . addend is recorded with the section contents; when performing a
321 . partial link (ld -r) the section contents (the data) will be
322 . modified. The value of this field is FALSE if addends are
323 . recorded with the relocation (in arelent.addend); when performing
324 . a partial link the relocation will be modified.
325 . All relocations for all ELF USE_RELA targets should set this field
326 . to FALSE (values of TRUE should be looked on with suspicion).
327 . However, the converse is not true: not all relocations of all ELF
328 . USE_REL targets set this field to TRUE. Why this is so is peculiar
329 . to each particular target. For relocs that aren't used in partial
330 . links (e.g. GOT stuff) it doesn't matter what this is set to. *}
331 . unsigned int partial_inplace:1;
333 . {* When some formats create PC relative instructions, they leave
334 . the value of the pc of the place being relocated in the offset
335 . slot of the instruction, so that a PC relative relocation can
336 . be made just by adding in an ordinary offset (e.g., sun3 a.out).
337 . Some formats leave the displacement part of an instruction
338 . empty (e.g., ELF); this flag signals the fact. *}
339 . unsigned int pcrel_offset:1;
341 . {* Whether bfd_install_relocation should just install the addend,
342 . or should follow the practice of some older object formats and
343 . install a value including the symbol. *}
344 . unsigned int install_addend:1;
346 . {* src_mask selects the part of the instruction (or data) to be used
347 . in the relocation sum. If the target relocations don't have an
348 . addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
349 . dst_mask to extract the addend from the section contents. If
350 . relocations do have an addend in the reloc, eg. ELF USE_RELA, this
351 . field should normally be zero. Non-zero values for ELF USE_RELA
352 . targets should be viewed with suspicion as normally the value in
353 . the dst_mask part of the section contents should be ignored. *}
356 . {* dst_mask selects which parts of the instruction (or data) are
357 . replaced with a relocated value. *}
360 . {* If this field is non null, then the supplied function is
361 . called rather than the normal function. This allows really
362 . strange relocation methods to be accommodated. *}
363 . bfd_reloc_status_type (*special_function)
364 . (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
367 . {* The textual name of the relocation type. *}
378 The HOWTO macro fills in a reloc_howto_type (a typedef for
379 const struct reloc_howto_struct).
381 .#define HOWTO_INSTALL_ADDEND 0
382 .#define HOWTO_RSIZE(sz) ((sz) < 0 ? -(sz) : (sz))
383 .#define HOWTO(type, right, size, bits, pcrel, left, ovf, func, name, \
384 . inplace, src_mask, dst_mask, pcrel_off) \
385 . { (unsigned) type, HOWTO_RSIZE (size), bits, right, left, ovf, \
386 . size < 0, pcrel, inplace, pcrel_off, HOWTO_INSTALL_ADDEND, \
387 . src_mask, dst_mask, func, name }
390 This is used to fill in an empty howto entry in an array.
392 .#define EMPTY_HOWTO(C) \
393 . HOWTO ((C), 0, 1, 0, false, 0, complain_overflow_dont, NULL, \
394 . NULL, false, 0, 0, false)
396 .static inline unsigned int
397 .bfd_get_reloc_size (reloc_howto_type *howto)
399 . return howto->size;
410 How relocs are tied together in an <<asection>>:
412 .typedef struct relent_chain
415 . struct relent_chain *next;
421 /* N_ONES produces N one bits, without undefined behaviour for N
422 between zero and the number of bits in a bfd_vma. */
423 #define N_ONES(n) ((n) == 0 ? 0 : ((bfd_vma) 1 << ((n) - 1) << 1) - 1)
430 bfd_reloc_status_type bfd_check_overflow
431 (enum complain_overflow how,
432 unsigned int bitsize,
433 unsigned int rightshift,
434 unsigned int addrsize,
438 Perform overflow checking on @var{relocation} which has
439 @var{bitsize} significant bits and will be shifted right by
440 @var{rightshift} bits, on a machine with addresses containing
441 @var{addrsize} significant bits. The result is either of
442 @code{bfd_reloc_ok} or @code{bfd_reloc_overflow}.
446 bfd_reloc_status_type
447 bfd_check_overflow (enum complain_overflow how
,
448 unsigned int bitsize
,
449 unsigned int rightshift
,
450 unsigned int addrsize
,
453 bfd_vma fieldmask
, addrmask
, signmask
, ss
, a
;
454 bfd_reloc_status_type flag
= bfd_reloc_ok
;
459 /* Note: BITSIZE should always be <= ADDRSIZE, but in case it's not,
460 we'll be permissive: extra bits in the field mask will
461 automatically extend the address mask for purposes of the
463 fieldmask
= N_ONES (bitsize
);
464 signmask
= ~fieldmask
;
465 addrmask
= N_ONES (addrsize
) | (fieldmask
<< rightshift
);
466 a
= (relocation
& addrmask
) >> rightshift
;
470 case complain_overflow_dont
:
473 case complain_overflow_signed
:
474 /* If any sign bits are set, all sign bits must be set. That
475 is, A must be a valid negative address after shifting. */
476 signmask
= ~ (fieldmask
>> 1);
479 case complain_overflow_bitfield
:
480 /* Bitfields are sometimes signed, sometimes unsigned. We
481 explicitly allow an address wrap too, which means a bitfield
482 of n bits is allowed to store -2**n to 2**n-1. Thus overflow
483 if the value has some, but not all, bits set outside the
486 if (ss
!= 0 && ss
!= ((addrmask
>> rightshift
) & signmask
))
487 flag
= bfd_reloc_overflow
;
490 case complain_overflow_unsigned
:
491 /* We have an overflow if the address does not fit in the field. */
492 if ((a
& signmask
) != 0)
493 flag
= bfd_reloc_overflow
;
505 bfd_reloc_offset_in_range
508 bool bfd_reloc_offset_in_range
509 (reloc_howto_type *howto,
512 bfd_size_type offset);
515 Returns TRUE if the reloc described by @var{HOWTO} can be
516 applied at @var{OFFSET} octets in @var{SECTION}.
520 /* HOWTO describes a relocation, at offset OCTET. Return whether the
521 relocation field is within SECTION of ABFD. */
524 bfd_reloc_offset_in_range (reloc_howto_type
*howto
,
529 bfd_size_type octet_end
= bfd_get_section_limit_octets (abfd
, section
);
530 bfd_size_type reloc_size
= bfd_get_reloc_size (howto
);
532 /* The reloc field must be contained entirely within the section.
533 Allow zero length fields (marker relocs or NONE relocs where no
534 relocation will be performed) at the end of the section. */
535 return octet
<= octet_end
&& reloc_size
<= octet_end
- octet
;
538 /* Read and return the section contents at DATA converted to a host
539 integer (bfd_vma). The number of bytes read is given by the HOWTO. */
542 read_reloc (bfd
*abfd
, bfd_byte
*data
, reloc_howto_type
*howto
)
544 switch (bfd_get_reloc_size (howto
))
550 return bfd_get_8 (abfd
, data
);
553 return bfd_get_16 (abfd
, data
);
556 return bfd_get_24 (abfd
, data
);
559 return bfd_get_32 (abfd
, data
);
563 return bfd_get_64 (abfd
, data
);
572 /* Convert VAL to target format and write to DATA. The number of
573 bytes written is given by the HOWTO. */
576 write_reloc (bfd
*abfd
, bfd_vma val
, bfd_byte
*data
, reloc_howto_type
*howto
)
578 switch (bfd_get_reloc_size (howto
))
584 bfd_put_8 (abfd
, val
, data
);
588 bfd_put_16 (abfd
, val
, data
);
592 bfd_put_24 (abfd
, val
, data
);
596 bfd_put_32 (abfd
, val
, data
);
601 bfd_put_64 (abfd
, val
, data
);
610 /* Apply RELOCATION value to target bytes at DATA, according to
614 apply_reloc (bfd
*abfd
, bfd_byte
*data
, reloc_howto_type
*howto
,
617 bfd_vma val
= read_reloc (abfd
, data
, howto
);
620 relocation
= -relocation
;
622 val
= ((val
& ~howto
->dst_mask
)
623 | (((val
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
625 write_reloc (abfd
, val
, data
, howto
);
630 bfd_perform_relocation
633 bfd_reloc_status_type bfd_perform_relocation
635 arelent *reloc_entry,
637 asection *input_section,
639 char **error_message);
642 If @var{output_bfd} is supplied to this function, the
643 generated image will be relocatable; the relocations are
644 copied to the output file after they have been changed to
645 reflect the new state of the world. There are two ways of
646 reflecting the results of partial linkage in an output file:
647 by modifying the output data in place, and by modifying the
648 relocation record. Some native formats (e.g., basic a.out and
649 basic coff) have no way of specifying an addend in the
650 relocation type, so the addend has to go in the output data.
651 This is no big deal since in these formats the output data
652 slot will always be big enough for the addend. Complex reloc
653 types with addends were invented to solve just this problem.
654 The @var{error_message} argument is set to an error message if
655 this return @code{bfd_reloc_dangerous}.
659 bfd_reloc_status_type
660 bfd_perform_relocation (bfd
*abfd
,
661 arelent
*reloc_entry
,
663 asection
*input_section
,
665 char **error_message
)
668 bfd_reloc_status_type flag
= bfd_reloc_ok
;
669 bfd_size_type octets
;
670 bfd_vma output_base
= 0;
671 reloc_howto_type
*howto
= reloc_entry
->howto
;
672 asection
*reloc_target_output_section
;
675 symbol
= *(reloc_entry
->sym_ptr_ptr
);
677 /* If we are not producing relocatable output, return an error if
678 the symbol is not defined. An undefined weak symbol is
679 considered to have a value of zero (SVR4 ABI, p. 4-27). */
680 if (bfd_is_und_section (symbol
->section
)
681 && (symbol
->flags
& BSF_WEAK
) == 0
682 && output_bfd
== NULL
)
683 flag
= bfd_reloc_undefined
;
685 /* If there is a function supplied to handle this relocation type,
686 call it. It'll return `bfd_reloc_continue' if further processing
688 if (howto
&& howto
->special_function
)
690 bfd_reloc_status_type cont
;
692 /* Note - we do not call bfd_reloc_offset_in_range here as the
693 reloc_entry->address field might actually be valid for the
694 backend concerned. It is up to the special_function itself
695 to call bfd_reloc_offset_in_range if needed. */
696 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
, data
,
697 input_section
, output_bfd
,
699 if (cont
!= bfd_reloc_continue
)
703 if (bfd_is_abs_section (symbol
->section
)
704 && output_bfd
!= NULL
)
706 reloc_entry
->address
+= input_section
->output_offset
;
710 /* PR 17512: file: 0f67f69d. */
712 return bfd_reloc_undefined
;
714 /* Is the address of the relocation really within the section? */
715 octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
, input_section
);
716 if (!bfd_reloc_offset_in_range (howto
, abfd
, input_section
, octets
))
717 return bfd_reloc_outofrange
;
719 /* Work out which section the relocation is targeted at and the
720 initial relocation command value. */
722 /* Get symbol value. (Common symbols are special.) */
723 if (bfd_is_com_section (symbol
->section
))
726 relocation
= symbol
->value
;
728 reloc_target_output_section
= symbol
->section
->output_section
;
730 /* Convert input-section-relative symbol value to absolute. */
731 if ((output_bfd
&& ! howto
->partial_inplace
)
732 || reloc_target_output_section
== NULL
)
735 output_base
= reloc_target_output_section
->vma
;
737 output_base
+= symbol
->section
->output_offset
;
739 /* If symbol addresses are in octets, convert to bytes. */
740 if (bfd_get_flavour (abfd
) == bfd_target_elf_flavour
741 && (symbol
->section
->flags
& SEC_ELF_OCTETS
))
742 output_base
*= bfd_octets_per_byte (abfd
, input_section
);
744 relocation
+= output_base
;
746 /* Add in supplied addend. */
747 relocation
+= reloc_entry
->addend
;
749 /* Here the variable relocation holds the final address of the
750 symbol we are relocating against, plus any addend. */
752 if (howto
->pc_relative
)
754 /* This is a PC relative relocation. We want to set RELOCATION
755 to the distance between the address of the symbol and the
756 location. RELOCATION is already the address of the symbol.
758 We start by subtracting the address of the section containing
761 If pcrel_offset is set, we must further subtract the position
762 of the location within the section. Some targets arrange for
763 the addend to be the negative of the position of the location
764 within the section; for example, i386-aout does this. For
765 i386-aout, pcrel_offset is FALSE. Some other targets do not
766 include the position of the location; for example, ELF.
767 For those targets, pcrel_offset is TRUE.
769 If we are producing relocatable output, then we must ensure
770 that this reloc will be correctly computed when the final
771 relocation is done. If pcrel_offset is FALSE we want to wind
772 up with the negative of the location within the section,
773 which means we must adjust the existing addend by the change
774 in the location within the section. If pcrel_offset is TRUE
775 we do not want to adjust the existing addend at all.
777 FIXME: This seems logical to me, but for the case of
778 producing relocatable output it is not what the code
779 actually does. I don't want to change it, because it seems
780 far too likely that something will break. */
783 input_section
->output_section
->vma
+ input_section
->output_offset
;
785 if (howto
->pcrel_offset
)
786 relocation
-= reloc_entry
->address
;
789 if (output_bfd
!= NULL
)
791 if (! howto
->partial_inplace
)
793 /* This is a partial relocation, and we want to apply the relocation
794 to the reloc entry rather than the raw data. Modify the reloc
795 inplace to reflect what we now know. */
796 reloc_entry
->addend
= relocation
;
797 reloc_entry
->address
+= input_section
->output_offset
;
802 /* This is a partial relocation, but inplace, so modify the
805 If we've relocated with a symbol with a section, change
806 into a ref to the section belonging to the symbol. */
808 reloc_entry
->address
+= input_section
->output_offset
;
811 if (abfd
->xvec
->flavour
== bfd_target_coff_flavour
)
813 /* For m68k-coff, the addend was being subtracted twice during
814 relocation with -r. Removing the line below this comment
815 fixes that problem; see PR 2953.
817 However, Ian wrote the following, regarding removing the line below,
818 which explains why it is still enabled: --djm
820 If you put a patch like that into BFD you need to check all the COFF
821 linkers. I am fairly certain that patch will break coff-i386 (e.g.,
822 SCO); see coff_i386_reloc in coff-i386.c where I worked around the
823 problem in a different way. There may very well be a reason that the
824 code works as it does.
826 Hmmm. The first obvious point is that bfd_perform_relocation should
827 not have any tests that depend upon the flavour. It's seem like
828 entirely the wrong place for such a thing. The second obvious point
829 is that the current code ignores the reloc addend when producing
830 relocatable output for COFF. That's peculiar. In fact, I really
831 have no idea what the point of the line you want to remove is.
833 A typical COFF reloc subtracts the old value of the symbol and adds in
834 the new value to the location in the object file (if it's a pc
835 relative reloc it adds the difference between the symbol value and the
836 location). When relocating we need to preserve that property.
838 BFD handles this by setting the addend to the negative of the old
839 value of the symbol. Unfortunately it handles common symbols in a
840 non-standard way (it doesn't subtract the old value) but that's a
841 different story (we can't change it without losing backward
842 compatibility with old object files) (coff-i386 does subtract the old
843 value, to be compatible with existing coff-i386 targets, like SCO).
845 So everything works fine when not producing relocatable output. When
846 we are producing relocatable output, logically we should do exactly
847 what we do when not producing relocatable output. Therefore, your
848 patch is correct. In fact, it should probably always just set
849 reloc_entry->addend to 0 for all cases, since it is, in fact, going to
850 add the value into the object file. This won't hurt the COFF code,
851 which doesn't use the addend; I'm not sure what it will do to other
852 formats (the thing to check for would be whether any formats both use
853 the addend and set partial_inplace).
855 When I wanted to make coff-i386 produce relocatable output, I ran
856 into the problem that you are running into: I wanted to remove that
857 line. Rather than risk it, I made the coff-i386 relocs use a special
858 function; it's coff_i386_reloc in coff-i386.c. The function
859 specifically adds the addend field into the object file, knowing that
860 bfd_perform_relocation is not going to. If you remove that line, then
861 coff-i386.c will wind up adding the addend field in twice. It's
862 trivial to fix; it just needs to be done.
864 The problem with removing the line is just that it may break some
865 working code. With BFD it's hard to be sure of anything. The right
866 way to deal with this is simply to build and test at least all the
867 supported COFF targets. It should be straightforward if time and disk
868 space consuming. For each target:
870 2) generate some executable, and link it using -r (I would
871 probably use paranoia.o and link against newlib/libc.a, which
872 for all the supported targets would be available in
873 /usr/cygnus/progressive/H-host/target/lib/libc.a).
874 3) make the change to reloc.c
875 4) rebuild the linker
877 6) if the resulting object files are the same, you have at least
879 7) if they are different you have to figure out which version is
882 relocation
-= reloc_entry
->addend
;
883 reloc_entry
->addend
= 0;
887 reloc_entry
->addend
= relocation
;
892 /* FIXME: This overflow checking is incomplete, because the value
893 might have overflowed before we get here. For a correct check we
894 need to compute the value in a size larger than bitsize, but we
895 can't reasonably do that for a reloc the same size as a host
897 FIXME: We should also do overflow checking on the result after
898 adding in the value contained in the object file. */
899 if (howto
->complain_on_overflow
!= complain_overflow_dont
900 && flag
== bfd_reloc_ok
)
901 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
904 bfd_arch_bits_per_address (abfd
),
907 /* Either we are relocating all the way, or we don't want to apply
908 the relocation to the reloc entry (probably because there isn't
909 any room in the output format to describe addends to relocs). */
911 /* The cast to bfd_vma avoids a bug in the Alpha OSF/1 C compiler
912 (OSF version 1.3, compiler version 3.11). It miscompiles the
926 x <<= (unsigned long) s.i0;
930 printf ("succeeded (%lx)\n", x);
934 relocation
>>= (bfd_vma
) howto
->rightshift
;
936 /* Shift everything up to where it's going to be used. */
937 relocation
<<= (bfd_vma
) howto
->bitpos
;
939 /* Wait for the day when all have the mask in them. */
942 i instruction to be left alone
943 o offset within instruction
944 r relocation offset to apply
953 (( i i i i i o o o o o from bfd_get<size>
954 and S S S S S) to get the size offset we want
955 + r r r r r r r r r r) to get the final value to place
956 and D D D D D to chop to right size
957 -----------------------
960 ( i i i i i o o o o o from bfd_get<size>
961 and N N N N N ) get instruction
962 -----------------------
968 -----------------------
969 = R R R R R R R R R R put into bfd_put<size>
972 data
= (bfd_byte
*) data
+ octets
;
973 apply_reloc (abfd
, data
, howto
, relocation
);
979 bfd_install_relocation
982 bfd_reloc_status_type bfd_install_relocation
984 arelent *reloc_entry,
985 void *data, bfd_vma data_start,
986 asection *input_section,
987 char **error_message);
990 This looks remarkably like <<bfd_perform_relocation>>, except it
991 does not expect that the section contents have been filled in.
992 I.e., it's suitable for use when creating, rather than applying
995 For now, this function should be considered reserved for the
999 bfd_reloc_status_type
1000 bfd_install_relocation (bfd
*abfd
,
1001 arelent
*reloc_entry
,
1003 bfd_vma data_start_offset
,
1004 asection
*input_section
,
1005 char **error_message
)
1008 bfd_reloc_status_type flag
= bfd_reloc_ok
;
1009 bfd_size_type octets
;
1010 bfd_vma output_base
= 0;
1011 reloc_howto_type
*howto
= reloc_entry
->howto
;
1012 asection
*reloc_target_output_section
;
1016 symbol
= *(reloc_entry
->sym_ptr_ptr
);
1018 /* If there is a function supplied to handle this relocation type,
1019 call it. It'll return `bfd_reloc_continue' if further processing
1021 if (howto
&& howto
->special_function
)
1023 bfd_reloc_status_type cont
;
1025 /* Note - we do not call bfd_reloc_offset_in_range here as the
1026 reloc_entry->address field might actually be valid for the
1027 backend concerned. It is up to the special_function itself
1028 to call bfd_reloc_offset_in_range if needed. */
1029 cont
= howto
->special_function (abfd
, reloc_entry
, symbol
,
1030 /* XXX - Non-portable! */
1031 ((bfd_byte
*) data_start
1032 - data_start_offset
),
1033 input_section
, abfd
, error_message
);
1034 if (cont
!= bfd_reloc_continue
)
1038 if (howto
->install_addend
)
1039 relocation
= reloc_entry
->addend
;
1042 if (bfd_is_abs_section (symbol
->section
))
1043 return bfd_reloc_ok
;
1045 /* Work out which section the relocation is targeted at and the
1046 initial relocation command value. */
1048 /* Get symbol value. (Common symbols are special.) */
1049 if (bfd_is_com_section (symbol
->section
))
1052 relocation
= symbol
->value
;
1054 reloc_target_output_section
= symbol
->section
;
1056 /* Convert input-section-relative symbol value to absolute. */
1057 if (! howto
->partial_inplace
)
1060 output_base
= reloc_target_output_section
->vma
;
1062 /* If symbol addresses are in octets, convert to bytes. */
1063 if (bfd_get_flavour (abfd
) == bfd_target_elf_flavour
1064 && (symbol
->section
->flags
& SEC_ELF_OCTETS
))
1065 output_base
*= bfd_octets_per_byte (abfd
, input_section
);
1067 relocation
+= output_base
;
1069 /* Add in supplied addend. */
1070 relocation
+= reloc_entry
->addend
;
1072 /* Here the variable relocation holds the final address of the
1073 symbol we are relocating against, plus any addend. */
1075 if (howto
->pc_relative
)
1077 relocation
-= input_section
->vma
;
1079 if (howto
->pcrel_offset
&& howto
->partial_inplace
)
1080 relocation
-= reloc_entry
->address
;
1084 if (!howto
->partial_inplace
)
1086 reloc_entry
->addend
= relocation
;
1090 if (!howto
->install_addend
1091 && abfd
->xvec
->flavour
== bfd_target_coff_flavour
)
1093 /* This is just weird. We're subtracting out the original
1094 addend, so that for COFF the addend is ignored??? */
1095 relocation
-= reloc_entry
->addend
;
1096 /* FIXME: There should be no target specific code here... */
1097 if (strcmp (abfd
->xvec
->name
, "coff-z8k") != 0)
1098 reloc_entry
->addend
= 0;
1101 reloc_entry
->addend
= relocation
;
1103 /* Is the address of the relocation really within the section? */
1104 octets
= reloc_entry
->address
* bfd_octets_per_byte (abfd
, input_section
);
1105 if (!bfd_reloc_offset_in_range (howto
, abfd
, input_section
, octets
))
1106 return bfd_reloc_outofrange
;
1108 /* FIXME: This overflow checking is incomplete, because the value
1109 might have overflowed before we get here. For a correct check we
1110 need to compute the value in a size larger than bitsize, but we
1111 can't reasonably do that for a reloc the same size as a host
1113 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1114 flag
= bfd_check_overflow (howto
->complain_on_overflow
,
1117 bfd_arch_bits_per_address (abfd
),
1120 relocation
>>= (bfd_vma
) howto
->rightshift
;
1122 /* Shift everything up to where it's going to be used. */
1123 relocation
<<= (bfd_vma
) howto
->bitpos
;
1125 data
= (bfd_byte
*) data_start
+ (octets
- data_start_offset
);
1126 apply_reloc (abfd
, data
, howto
, relocation
);
1130 /* This relocation routine is used by some of the backend linkers.
1131 They do not construct asymbol or arelent structures, so there is no
1132 reason for them to use bfd_perform_relocation. Also,
1133 bfd_perform_relocation is so hacked up it is easier to write a new
1134 function than to try to deal with it.
1136 This routine does a final relocation. Whether it is useful for a
1137 relocatable link depends upon how the object format defines
1140 FIXME: This routine ignores any special_function in the HOWTO,
1141 since the existing special_function values have been written for
1142 bfd_perform_relocation.
1144 HOWTO is the reloc howto information.
1145 INPUT_BFD is the BFD which the reloc applies to.
1146 INPUT_SECTION is the section which the reloc applies to.
1147 CONTENTS is the contents of the section.
1148 ADDRESS is the address of the reloc within INPUT_SECTION.
1149 VALUE is the value of the symbol the reloc refers to.
1150 ADDEND is the addend of the reloc. */
1152 bfd_reloc_status_type
1153 _bfd_final_link_relocate (reloc_howto_type
*howto
,
1155 asection
*input_section
,
1162 bfd_size_type octets
= (address
1163 * bfd_octets_per_byte (input_bfd
, input_section
));
1165 /* Sanity check the address. */
1166 if (!bfd_reloc_offset_in_range (howto
, input_bfd
, input_section
, octets
))
1167 return bfd_reloc_outofrange
;
1169 /* This function assumes that we are dealing with a basic relocation
1170 against a symbol. We want to compute the value of the symbol to
1171 relocate to. This is just VALUE, the value of the symbol, plus
1172 ADDEND, any addend associated with the reloc. */
1173 relocation
= value
+ addend
;
1175 /* If the relocation is PC relative, we want to set RELOCATION to
1176 the distance between the symbol (currently in RELOCATION) and the
1177 location we are relocating. Some targets (e.g., i386-aout)
1178 arrange for the contents of the section to be the negative of the
1179 offset of the location within the section; for such targets
1180 pcrel_offset is FALSE. Other targets (e.g., ELF) simply leave
1181 the contents of the section as zero; for such targets
1182 pcrel_offset is TRUE. If pcrel_offset is FALSE we do not need to
1183 subtract out the offset of the location within the section (which
1184 is just ADDRESS). */
1185 if (howto
->pc_relative
)
1187 relocation
-= (input_section
->output_section
->vma
1188 + input_section
->output_offset
);
1189 if (howto
->pcrel_offset
)
1190 relocation
-= address
;
1193 return _bfd_relocate_contents (howto
, input_bfd
, relocation
,
1197 /* Relocate a given location using a given value and howto. */
1199 bfd_reloc_status_type
1200 _bfd_relocate_contents (reloc_howto_type
*howto
,
1206 bfd_reloc_status_type flag
;
1207 unsigned int rightshift
= howto
->rightshift
;
1208 unsigned int bitpos
= howto
->bitpos
;
1211 relocation
= -relocation
;
1213 /* Get the value we are going to relocate. */
1214 x
= read_reloc (input_bfd
, location
, howto
);
1216 /* Check for overflow. FIXME: We may drop bits during the addition
1217 which we don't check for. We must either check at every single
1218 operation, which would be tedious, or we must do the computations
1219 in a type larger than bfd_vma, which would be inefficient. */
1220 flag
= bfd_reloc_ok
;
1221 if (howto
->complain_on_overflow
!= complain_overflow_dont
)
1223 bfd_vma addrmask
, fieldmask
, signmask
, ss
;
1226 /* Get the values to be added together. For signed and unsigned
1227 relocations, we assume that all values should be truncated to
1228 the size of an address. For bitfields, all the bits matter.
1229 See also bfd_check_overflow. */
1230 fieldmask
= N_ONES (howto
->bitsize
);
1231 signmask
= ~fieldmask
;
1232 addrmask
= (N_ONES (bfd_arch_bits_per_address (input_bfd
))
1233 | (fieldmask
<< rightshift
));
1234 a
= (relocation
& addrmask
) >> rightshift
;
1235 b
= (x
& howto
->src_mask
& addrmask
) >> bitpos
;
1236 addrmask
>>= rightshift
;
1238 switch (howto
->complain_on_overflow
)
1240 case complain_overflow_signed
:
1241 /* If any sign bits are set, all sign bits must be set.
1242 That is, A must be a valid negative address after
1244 signmask
= ~(fieldmask
>> 1);
1247 case complain_overflow_bitfield
:
1248 /* Much like the signed check, but for a field one bit
1249 wider. We allow a bitfield to represent numbers in the
1250 range -2**n to 2**n-1, where n is the number of bits in the
1251 field. Note that when bfd_vma is 32 bits, a 32-bit reloc
1252 can't overflow, which is exactly what we want. */
1254 if (ss
!= 0 && ss
!= (addrmask
& signmask
))
1255 flag
= bfd_reloc_overflow
;
1257 /* We only need this next bit of code if the sign bit of B
1258 is below the sign bit of A. This would only happen if
1259 SRC_MASK had fewer bits than BITSIZE. Note that if
1260 SRC_MASK has more bits than BITSIZE, we can get into
1261 trouble; we would need to verify that B is in range, as
1262 we do for A above. */
1263 ss
= ((~howto
->src_mask
) >> 1) & howto
->src_mask
;
1266 /* Set all the bits above the sign bit. */
1269 /* Now we can do the addition. */
1272 /* See if the result has the correct sign. Bits above the
1273 sign bit are junk now; ignore them. If the sum is
1274 positive, make sure we did not have all negative inputs;
1275 if the sum is negative, make sure we did not have all
1276 positive inputs. The test below looks only at the sign
1277 bits, and it really just
1278 SIGN (A) == SIGN (B) && SIGN (A) != SIGN (SUM)
1280 We mask with addrmask here to explicitly allow an address
1281 wrap-around. The Linux kernel relies on it, and it is
1282 the only way to write assembler code which can run when
1283 loaded at a location 0x80000000 away from the location at
1284 which it is linked. */
1285 if (((~(a
^ b
)) & (a
^ sum
)) & signmask
& addrmask
)
1286 flag
= bfd_reloc_overflow
;
1289 case complain_overflow_unsigned
:
1290 /* Checking for an unsigned overflow is relatively easy:
1291 trim the addresses and add, and trim the result as well.
1292 Overflow is normally indicated when the result does not
1293 fit in the field. However, we also need to consider the
1294 case when, e.g., fieldmask is 0x7fffffff or smaller, an
1295 input is 0x80000000, and bfd_vma is only 32 bits; then we
1296 will get sum == 0, but there is an overflow, since the
1297 inputs did not fit in the field. Instead of doing a
1298 separate test, we can check for this by or-ing in the
1299 operands when testing for the sum overflowing its final
1301 sum
= (a
+ b
) & addrmask
;
1302 if ((a
| b
| sum
) & signmask
)
1303 flag
= bfd_reloc_overflow
;
1311 /* Put RELOCATION in the right bits. */
1312 relocation
>>= (bfd_vma
) rightshift
;
1313 relocation
<<= (bfd_vma
) bitpos
;
1315 /* Add RELOCATION to the right bits of X. */
1316 x
= ((x
& ~howto
->dst_mask
)
1317 | (((x
& howto
->src_mask
) + relocation
) & howto
->dst_mask
));
1319 /* Put the relocated value back in the object file. */
1320 write_reloc (input_bfd
, x
, location
, howto
);
1324 /* Clear a given location using a given howto, by applying a fixed relocation
1325 value and discarding any in-place addend. This is used for fixed-up
1326 relocations against discarded symbols, to make ignorable debug or unwind
1327 information more obvious. */
1329 bfd_reloc_status_type
1330 _bfd_clear_contents (reloc_howto_type
*howto
,
1332 asection
*input_section
,
1339 if (!bfd_reloc_offset_in_range (howto
, input_bfd
, input_section
, off
))
1340 return bfd_reloc_outofrange
;
1342 /* Get the value we are going to relocate. */
1343 location
= buf
+ off
;
1344 x
= read_reloc (input_bfd
, location
, howto
);
1346 /* Zero out the unwanted bits of X. */
1347 x
&= ~howto
->dst_mask
;
1349 /* For a range list, use 1 instead of 0 as placeholder. 0
1350 would terminate the list, hiding any later entries. */
1351 if (strcmp (bfd_section_name (input_section
), ".debug_ranges") == 0
1352 && (howto
->dst_mask
& 1) != 0)
1355 /* Put the relocated value back in the object file. */
1356 write_reloc (input_bfd
, x
, location
, howto
);
1357 return bfd_reloc_ok
;
1363 howto manager, , typedef arelent, Relocations
1368 When an application wants to create a relocation, but doesn't
1369 know what the target machine might call it, it can find out by
1370 using this bit of code.
1379 The insides of a reloc code. The idea is that, eventually, there
1380 will be one enumerator for every type of relocation we ever do.
1381 Pass one of these values to <<bfd_reloc_type_lookup>>, and it'll
1382 return a howto pointer.
1384 This does mean that the application must determine the correct
1385 enumerator value; you can't get a howto pointer from a random set
1406 Basic absolute relocations of N bits.
1421 PC-relative relocations. Sometimes these are relative to the address
1422 of the relocation itself; sometimes they are relative to the start of
1423 the section containing the relocation. It depends on the specific target.
1430 Section relative relocations. Some targets need this for DWARF2.
1433 BFD_RELOC_32_GOT_PCREL
1435 BFD_RELOC_16_GOT_PCREL
1437 BFD_RELOC_8_GOT_PCREL
1443 BFD_RELOC_LO16_GOTOFF
1445 BFD_RELOC_HI16_GOTOFF
1447 BFD_RELOC_HI16_S_GOTOFF
1451 BFD_RELOC_64_PLT_PCREL
1453 BFD_RELOC_32_PLT_PCREL
1455 BFD_RELOC_24_PLT_PCREL
1457 BFD_RELOC_16_PLT_PCREL
1459 BFD_RELOC_8_PLT_PCREL
1467 BFD_RELOC_LO16_PLTOFF
1469 BFD_RELOC_HI16_PLTOFF
1471 BFD_RELOC_HI16_S_PLTOFF
1485 BFD_RELOC_68K_GLOB_DAT
1487 BFD_RELOC_68K_JMP_SLOT
1489 BFD_RELOC_68K_RELATIVE
1491 BFD_RELOC_68K_TLS_GD32
1493 BFD_RELOC_68K_TLS_GD16
1495 BFD_RELOC_68K_TLS_GD8
1497 BFD_RELOC_68K_TLS_LDM32
1499 BFD_RELOC_68K_TLS_LDM16
1501 BFD_RELOC_68K_TLS_LDM8
1503 BFD_RELOC_68K_TLS_LDO32
1505 BFD_RELOC_68K_TLS_LDO16
1507 BFD_RELOC_68K_TLS_LDO8
1509 BFD_RELOC_68K_TLS_IE32
1511 BFD_RELOC_68K_TLS_IE16
1513 BFD_RELOC_68K_TLS_IE8
1515 BFD_RELOC_68K_TLS_LE32
1517 BFD_RELOC_68K_TLS_LE16
1519 BFD_RELOC_68K_TLS_LE8
1521 Relocations used by 68K ELF.
1524 BFD_RELOC_32_BASEREL
1526 BFD_RELOC_16_BASEREL
1528 BFD_RELOC_LO16_BASEREL
1530 BFD_RELOC_HI16_BASEREL
1532 BFD_RELOC_HI16_S_BASEREL
1538 Linkage-table relative.
1543 Absolute 8-bit relocation, but used to form an address like 0xFFnn.
1546 BFD_RELOC_32_PCREL_S2
1548 BFD_RELOC_16_PCREL_S2
1550 BFD_RELOC_23_PCREL_S2
1552 These PC-relative relocations are stored as word displacements --
1553 i.e., byte displacements shifted right two bits. The 30-bit word
1554 displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
1555 SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
1556 signed 16-bit displacement is used on the MIPS, and the 23-bit
1557 displacement is used on the Alpha.
1564 High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
1565 the target word. These are used on the SPARC.
1572 For systems that allocate a Global Pointer register, these are
1573 displacements off that register. These relocation types are
1574 handled specially, because the value the register will have is
1575 decided relatively late.
1580 BFD_RELOC_SPARC_WDISP22
1586 BFD_RELOC_SPARC_GOT10
1588 BFD_RELOC_SPARC_GOT13
1590 BFD_RELOC_SPARC_GOT22
1592 BFD_RELOC_SPARC_PC10
1594 BFD_RELOC_SPARC_PC22
1596 BFD_RELOC_SPARC_WPLT30
1598 BFD_RELOC_SPARC_COPY
1600 BFD_RELOC_SPARC_GLOB_DAT
1602 BFD_RELOC_SPARC_JMP_SLOT
1604 BFD_RELOC_SPARC_RELATIVE
1606 BFD_RELOC_SPARC_UA16
1608 BFD_RELOC_SPARC_UA32
1610 BFD_RELOC_SPARC_UA64
1612 BFD_RELOC_SPARC_GOTDATA_HIX22
1614 BFD_RELOC_SPARC_GOTDATA_LOX10
1616 BFD_RELOC_SPARC_GOTDATA_OP_HIX22
1618 BFD_RELOC_SPARC_GOTDATA_OP_LOX10
1620 BFD_RELOC_SPARC_GOTDATA_OP
1622 BFD_RELOC_SPARC_JMP_IREL
1624 BFD_RELOC_SPARC_IRELATIVE
1626 SPARC ELF relocations. There is probably some overlap with other
1627 relocation types already defined.
1630 BFD_RELOC_SPARC_BASE13
1632 BFD_RELOC_SPARC_BASE22
1634 I think these are specific to SPARC a.out (e.g., Sun 4).
1644 BFD_RELOC_SPARC_OLO10
1646 BFD_RELOC_SPARC_HH22
1648 BFD_RELOC_SPARC_HM10
1650 BFD_RELOC_SPARC_LM22
1652 BFD_RELOC_SPARC_PC_HH22
1654 BFD_RELOC_SPARC_PC_HM10
1656 BFD_RELOC_SPARC_PC_LM22
1658 BFD_RELOC_SPARC_WDISP16
1660 BFD_RELOC_SPARC_WDISP19
1668 BFD_RELOC_SPARC_DISP64
1671 BFD_RELOC_SPARC_PLT32
1673 BFD_RELOC_SPARC_PLT64
1675 BFD_RELOC_SPARC_HIX22
1677 BFD_RELOC_SPARC_LOX10
1685 BFD_RELOC_SPARC_REGISTER
1689 BFD_RELOC_SPARC_SIZE32
1691 BFD_RELOC_SPARC_SIZE64
1693 BFD_RELOC_SPARC_WDISP10
1698 BFD_RELOC_SPARC_REV32
1700 SPARC little endian relocation
1702 BFD_RELOC_SPARC_TLS_GD_HI22
1704 BFD_RELOC_SPARC_TLS_GD_LO10
1706 BFD_RELOC_SPARC_TLS_GD_ADD
1708 BFD_RELOC_SPARC_TLS_GD_CALL
1710 BFD_RELOC_SPARC_TLS_LDM_HI22
1712 BFD_RELOC_SPARC_TLS_LDM_LO10
1714 BFD_RELOC_SPARC_TLS_LDM_ADD
1716 BFD_RELOC_SPARC_TLS_LDM_CALL
1718 BFD_RELOC_SPARC_TLS_LDO_HIX22
1720 BFD_RELOC_SPARC_TLS_LDO_LOX10
1722 BFD_RELOC_SPARC_TLS_LDO_ADD
1724 BFD_RELOC_SPARC_TLS_IE_HI22
1726 BFD_RELOC_SPARC_TLS_IE_LO10
1728 BFD_RELOC_SPARC_TLS_IE_LD
1730 BFD_RELOC_SPARC_TLS_IE_LDX
1732 BFD_RELOC_SPARC_TLS_IE_ADD
1734 BFD_RELOC_SPARC_TLS_LE_HIX22
1736 BFD_RELOC_SPARC_TLS_LE_LOX10
1738 BFD_RELOC_SPARC_TLS_DTPMOD32
1740 BFD_RELOC_SPARC_TLS_DTPMOD64
1742 BFD_RELOC_SPARC_TLS_DTPOFF32
1744 BFD_RELOC_SPARC_TLS_DTPOFF64
1746 BFD_RELOC_SPARC_TLS_TPOFF32
1748 BFD_RELOC_SPARC_TLS_TPOFF64
1750 SPARC TLS relocations
1759 BFD_RELOC_SPU_IMM10W
1763 BFD_RELOC_SPU_IMM16W
1767 BFD_RELOC_SPU_PCREL9a
1769 BFD_RELOC_SPU_PCREL9b
1771 BFD_RELOC_SPU_PCREL16
1781 BFD_RELOC_SPU_ADD_PIC
1786 BFD_RELOC_ALPHA_GPDISP_HI16
1788 Alpha ECOFF and ELF relocations. Some of these treat the symbol or
1789 "addend" in some special way.
1790 For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
1791 writing; when reading, it will be the absolute section symbol. The
1792 addend is the displacement in bytes of the "lda" instruction from
1793 the "ldah" instruction (which is at the address of this reloc).
1795 BFD_RELOC_ALPHA_GPDISP_LO16
1797 For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
1798 with GPDISP_HI16 relocs. The addend is ignored when writing the
1799 relocations out, and is filled in with the file's GP value on
1800 reading, for convenience.
1803 BFD_RELOC_ALPHA_GPDISP
1805 The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
1806 relocation except that there is no accompanying GPDISP_LO16
1810 BFD_RELOC_ALPHA_LITERAL
1812 BFD_RELOC_ALPHA_ELF_LITERAL
1814 BFD_RELOC_ALPHA_LITUSE
1816 The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
1817 the assembler turns it into a LDQ instruction to load the address of
1818 the symbol, and then fills in a register in the real instruction.
1820 The LITERAL reloc, at the LDQ instruction, refers to the .lita
1821 section symbol. The addend is ignored when writing, but is filled
1822 in with the file's GP value on reading, for convenience, as with the
1825 The ELF_LITERAL reloc is somewhere between 16_GOTOFF and GPDISP_LO16.
1826 It should refer to the symbol to be referenced, as with 16_GOTOFF,
1827 but it generates output not based on the position within the .got
1828 section, but relative to the GP value chosen for the file during the
1831 The LITUSE reloc, on the instruction using the loaded address, gives
1832 information to the linker that it might be able to use to optimize
1833 away some literal section references. The symbol is ignored (read
1834 as the absolute section symbol), and the "addend" indicates the type
1835 of instruction using the register:
1836 1 - "memory" fmt insn
1837 2 - byte-manipulation (byte offset reg)
1838 3 - jsr (target of branch)
1841 BFD_RELOC_ALPHA_HINT
1843 The HINT relocation indicates a value that should be filled into the
1844 "hint" field of a jmp/jsr/ret instruction, for possible branch-
1845 prediction logic which may be provided on some processors.
1848 BFD_RELOC_ALPHA_LINKAGE
1850 The LINKAGE relocation outputs a linkage pair in the object file,
1851 which is filled by the linker.
1854 BFD_RELOC_ALPHA_CODEADDR
1856 The CODEADDR relocation outputs a STO_CA in the object file,
1857 which is filled by the linker.
1860 BFD_RELOC_ALPHA_GPREL_HI16
1862 BFD_RELOC_ALPHA_GPREL_LO16
1864 The GPREL_HI/LO relocations together form a 32-bit offset from the
1868 BFD_RELOC_ALPHA_BRSGP
1870 Like BFD_RELOC_23_PCREL_S2, except that the source and target must
1871 share a common GP, and the target address is adjusted for
1872 STO_ALPHA_STD_GPLOAD.
1877 The NOP relocation outputs a NOP if the longword displacement
1878 between two procedure entry points is < 2^21.
1883 The BSR relocation outputs a BSR if the longword displacement
1884 between two procedure entry points is < 2^21.
1889 The LDA relocation outputs a LDA if the longword displacement
1890 between two procedure entry points is < 2^16.
1895 The BOH relocation outputs a BSR if the longword displacement
1896 between two procedure entry points is < 2^21, or else a hint.
1899 BFD_RELOC_ALPHA_TLSGD
1901 BFD_RELOC_ALPHA_TLSLDM
1903 BFD_RELOC_ALPHA_DTPMOD64
1905 BFD_RELOC_ALPHA_GOTDTPREL16
1907 BFD_RELOC_ALPHA_DTPREL64
1909 BFD_RELOC_ALPHA_DTPREL_HI16
1911 BFD_RELOC_ALPHA_DTPREL_LO16
1913 BFD_RELOC_ALPHA_DTPREL16
1915 BFD_RELOC_ALPHA_GOTTPREL16
1917 BFD_RELOC_ALPHA_TPREL64
1919 BFD_RELOC_ALPHA_TPREL_HI16
1921 BFD_RELOC_ALPHA_TPREL_LO16
1923 BFD_RELOC_ALPHA_TPREL16
1925 Alpha thread-local storage relocations.
1930 BFD_RELOC_MICROMIPS_JMP
1932 The MIPS jump instruction.
1935 BFD_RELOC_MIPS16_JMP
1937 The MIPS16 jump instruction.
1940 BFD_RELOC_MIPS16_GPREL
1942 MIPS16 GP relative reloc.
1947 High 16 bits of 32-bit value; simple reloc.
1952 High 16 bits of 32-bit value but the low 16 bits will be sign
1953 extended and added to form the final result. If the low 16
1954 bits form a negative number, we need to add one to the high value
1955 to compensate for the borrow when the low bits are added.
1963 BFD_RELOC_HI16_PCREL
1965 High 16 bits of 32-bit pc-relative value
1967 BFD_RELOC_HI16_S_PCREL
1969 High 16 bits of 32-bit pc-relative value, adjusted
1971 BFD_RELOC_LO16_PCREL
1973 Low 16 bits of pc-relative value
1976 BFD_RELOC_MIPS16_GOT16
1978 BFD_RELOC_MIPS16_CALL16
1980 Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
1981 16-bit immediate fields
1983 BFD_RELOC_MIPS16_HI16
1985 MIPS16 high 16 bits of 32-bit value.
1987 BFD_RELOC_MIPS16_HI16_S
1989 MIPS16 high 16 bits of 32-bit value but the low 16 bits will be sign
1990 extended and added to form the final result. If the low 16
1991 bits form a negative number, we need to add one to the high value
1992 to compensate for the borrow when the low bits are added.
1994 BFD_RELOC_MIPS16_LO16
1999 BFD_RELOC_MIPS16_TLS_GD
2001 BFD_RELOC_MIPS16_TLS_LDM
2003 BFD_RELOC_MIPS16_TLS_DTPREL_HI16
2005 BFD_RELOC_MIPS16_TLS_DTPREL_LO16
2007 BFD_RELOC_MIPS16_TLS_GOTTPREL
2009 BFD_RELOC_MIPS16_TLS_TPREL_HI16
2011 BFD_RELOC_MIPS16_TLS_TPREL_LO16
2013 MIPS16 TLS relocations
2016 BFD_RELOC_MIPS_LITERAL
2018 BFD_RELOC_MICROMIPS_LITERAL
2020 Relocation against a MIPS literal section.
2023 BFD_RELOC_MICROMIPS_7_PCREL_S1
2025 BFD_RELOC_MICROMIPS_10_PCREL_S1
2027 BFD_RELOC_MICROMIPS_16_PCREL_S1
2029 microMIPS PC-relative relocations.
2032 BFD_RELOC_MIPS16_16_PCREL_S1
2034 MIPS16 PC-relative relocation.
2037 BFD_RELOC_MIPS_21_PCREL_S2
2039 BFD_RELOC_MIPS_26_PCREL_S2
2041 BFD_RELOC_MIPS_18_PCREL_S3
2043 BFD_RELOC_MIPS_19_PCREL_S2
2045 MIPS PC-relative relocations.
2048 BFD_RELOC_MICROMIPS_GPREL16
2050 BFD_RELOC_MICROMIPS_HI16
2052 BFD_RELOC_MICROMIPS_HI16_S
2054 BFD_RELOC_MICROMIPS_LO16
2056 microMIPS versions of generic BFD relocs.
2059 BFD_RELOC_MIPS_GOT16
2061 BFD_RELOC_MICROMIPS_GOT16
2063 BFD_RELOC_MIPS_CALL16
2065 BFD_RELOC_MICROMIPS_CALL16
2067 BFD_RELOC_MIPS_GOT_HI16
2069 BFD_RELOC_MICROMIPS_GOT_HI16
2071 BFD_RELOC_MIPS_GOT_LO16
2073 BFD_RELOC_MICROMIPS_GOT_LO16
2075 BFD_RELOC_MIPS_CALL_HI16
2077 BFD_RELOC_MICROMIPS_CALL_HI16
2079 BFD_RELOC_MIPS_CALL_LO16
2081 BFD_RELOC_MICROMIPS_CALL_LO16
2085 BFD_RELOC_MICROMIPS_SUB
2087 BFD_RELOC_MIPS_GOT_PAGE
2089 BFD_RELOC_MICROMIPS_GOT_PAGE
2091 BFD_RELOC_MIPS_GOT_OFST
2093 BFD_RELOC_MICROMIPS_GOT_OFST
2095 BFD_RELOC_MIPS_GOT_DISP
2097 BFD_RELOC_MICROMIPS_GOT_DISP
2099 BFD_RELOC_MIPS_SHIFT5
2101 BFD_RELOC_MIPS_SHIFT6
2103 BFD_RELOC_MIPS_INSERT_A
2105 BFD_RELOC_MIPS_INSERT_B
2107 BFD_RELOC_MIPS_DELETE
2109 BFD_RELOC_MIPS_HIGHEST
2111 BFD_RELOC_MICROMIPS_HIGHEST
2113 BFD_RELOC_MIPS_HIGHER
2115 BFD_RELOC_MICROMIPS_HIGHER
2117 BFD_RELOC_MIPS_SCN_DISP
2119 BFD_RELOC_MICROMIPS_SCN_DISP
2123 BFD_RELOC_MIPS_RELGOT
2127 BFD_RELOC_MICROMIPS_JALR
2129 BFD_RELOC_MIPS_TLS_DTPMOD32
2131 BFD_RELOC_MIPS_TLS_DTPREL32
2133 BFD_RELOC_MIPS_TLS_DTPMOD64
2135 BFD_RELOC_MIPS_TLS_DTPREL64
2137 BFD_RELOC_MIPS_TLS_GD
2139 BFD_RELOC_MICROMIPS_TLS_GD
2141 BFD_RELOC_MIPS_TLS_LDM
2143 BFD_RELOC_MICROMIPS_TLS_LDM
2145 BFD_RELOC_MIPS_TLS_DTPREL_HI16
2147 BFD_RELOC_MICROMIPS_TLS_DTPREL_HI16
2149 BFD_RELOC_MIPS_TLS_DTPREL_LO16
2151 BFD_RELOC_MICROMIPS_TLS_DTPREL_LO16
2153 BFD_RELOC_MIPS_TLS_GOTTPREL
2155 BFD_RELOC_MICROMIPS_TLS_GOTTPREL
2157 BFD_RELOC_MIPS_TLS_TPREL32
2159 BFD_RELOC_MIPS_TLS_TPREL64
2161 BFD_RELOC_MIPS_TLS_TPREL_HI16
2163 BFD_RELOC_MICROMIPS_TLS_TPREL_HI16
2165 BFD_RELOC_MIPS_TLS_TPREL_LO16
2167 BFD_RELOC_MICROMIPS_TLS_TPREL_LO16
2171 MIPS ELF relocations.
2177 BFD_RELOC_MIPS_JUMP_SLOT
2179 MIPS ELF relocations (VxWorks and PLT extensions).
2183 BFD_RELOC_MOXIE_10_PCREL
2185 Moxie ELF relocations.
2197 BFD_RELOC_FT32_RELAX
2205 BFD_RELOC_FT32_DIFF32
2207 FT32 ELF relocations.
2211 BFD_RELOC_FRV_LABEL16
2213 BFD_RELOC_FRV_LABEL24
2219 BFD_RELOC_FRV_GPREL12
2221 BFD_RELOC_FRV_GPRELU12
2223 BFD_RELOC_FRV_GPREL32
2225 BFD_RELOC_FRV_GPRELHI
2227 BFD_RELOC_FRV_GPRELLO
2235 BFD_RELOC_FRV_FUNCDESC
2237 BFD_RELOC_FRV_FUNCDESC_GOT12
2239 BFD_RELOC_FRV_FUNCDESC_GOTHI
2241 BFD_RELOC_FRV_FUNCDESC_GOTLO
2243 BFD_RELOC_FRV_FUNCDESC_VALUE
2245 BFD_RELOC_FRV_FUNCDESC_GOTOFF12
2247 BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
2249 BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
2251 BFD_RELOC_FRV_GOTOFF12
2253 BFD_RELOC_FRV_GOTOFFHI
2255 BFD_RELOC_FRV_GOTOFFLO
2257 BFD_RELOC_FRV_GETTLSOFF
2259 BFD_RELOC_FRV_TLSDESC_VALUE
2261 BFD_RELOC_FRV_GOTTLSDESC12
2263 BFD_RELOC_FRV_GOTTLSDESCHI
2265 BFD_RELOC_FRV_GOTTLSDESCLO
2267 BFD_RELOC_FRV_TLSMOFF12
2269 BFD_RELOC_FRV_TLSMOFFHI
2271 BFD_RELOC_FRV_TLSMOFFLO
2273 BFD_RELOC_FRV_GOTTLSOFF12
2275 BFD_RELOC_FRV_GOTTLSOFFHI
2277 BFD_RELOC_FRV_GOTTLSOFFLO
2279 BFD_RELOC_FRV_TLSOFF
2281 BFD_RELOC_FRV_TLSDESC_RELAX
2283 BFD_RELOC_FRV_GETTLSOFF_RELAX
2285 BFD_RELOC_FRV_TLSOFF_RELAX
2287 BFD_RELOC_FRV_TLSMOFF
2289 Fujitsu Frv Relocations.
2293 BFD_RELOC_MN10300_GOTOFF24
2295 This is a 24bit GOT-relative reloc for the mn10300.
2297 BFD_RELOC_MN10300_GOT32
2299 This is a 32bit GOT-relative reloc for the mn10300, offset by two bytes
2302 BFD_RELOC_MN10300_GOT24
2304 This is a 24bit GOT-relative reloc for the mn10300, offset by two bytes
2307 BFD_RELOC_MN10300_GOT16
2309 This is a 16bit GOT-relative reloc for the mn10300, offset by two bytes
2312 BFD_RELOC_MN10300_COPY
2314 Copy symbol at runtime.
2316 BFD_RELOC_MN10300_GLOB_DAT
2320 BFD_RELOC_MN10300_JMP_SLOT
2324 BFD_RELOC_MN10300_RELATIVE
2326 Adjust by program base.
2328 BFD_RELOC_MN10300_SYM_DIFF
2330 Together with another reloc targeted at the same location,
2331 allows for a value that is the difference of two symbols
2332 in the same section.
2334 BFD_RELOC_MN10300_ALIGN
2336 The addend of this reloc is an alignment power that must
2337 be honoured at the offset's location, regardless of linker
2340 BFD_RELOC_MN10300_TLS_GD
2342 BFD_RELOC_MN10300_TLS_LD
2344 BFD_RELOC_MN10300_TLS_LDO
2346 BFD_RELOC_MN10300_TLS_GOTIE
2348 BFD_RELOC_MN10300_TLS_IE
2350 BFD_RELOC_MN10300_TLS_LE
2352 BFD_RELOC_MN10300_TLS_DTPMOD
2354 BFD_RELOC_MN10300_TLS_DTPOFF
2356 BFD_RELOC_MN10300_TLS_TPOFF
2358 Various TLS-related relocations.
2360 BFD_RELOC_MN10300_32_PCREL
2362 This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
2365 BFD_RELOC_MN10300_16_PCREL
2367 This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
2378 BFD_RELOC_386_GLOB_DAT
2380 BFD_RELOC_386_JUMP_SLOT
2382 BFD_RELOC_386_RELATIVE
2384 BFD_RELOC_386_GOTOFF
2388 BFD_RELOC_386_TLS_TPOFF
2390 BFD_RELOC_386_TLS_IE
2392 BFD_RELOC_386_TLS_GOTIE
2394 BFD_RELOC_386_TLS_LE
2396 BFD_RELOC_386_TLS_GD
2398 BFD_RELOC_386_TLS_LDM
2400 BFD_RELOC_386_TLS_LDO_32
2402 BFD_RELOC_386_TLS_IE_32
2404 BFD_RELOC_386_TLS_LE_32
2406 BFD_RELOC_386_TLS_DTPMOD32
2408 BFD_RELOC_386_TLS_DTPOFF32
2410 BFD_RELOC_386_TLS_TPOFF32
2412 BFD_RELOC_386_TLS_GOTDESC
2414 BFD_RELOC_386_TLS_DESC_CALL
2416 BFD_RELOC_386_TLS_DESC
2418 BFD_RELOC_386_IRELATIVE
2420 BFD_RELOC_386_GOT32X
2422 i386/elf relocations
2425 BFD_RELOC_X86_64_GOT32
2427 BFD_RELOC_X86_64_PLT32
2429 BFD_RELOC_X86_64_COPY
2431 BFD_RELOC_X86_64_GLOB_DAT
2433 BFD_RELOC_X86_64_JUMP_SLOT
2435 BFD_RELOC_X86_64_RELATIVE
2437 BFD_RELOC_X86_64_GOTPCREL
2439 BFD_RELOC_X86_64_32S
2441 BFD_RELOC_X86_64_DTPMOD64
2443 BFD_RELOC_X86_64_DTPOFF64
2445 BFD_RELOC_X86_64_TPOFF64
2447 BFD_RELOC_X86_64_TLSGD
2449 BFD_RELOC_X86_64_TLSLD
2451 BFD_RELOC_X86_64_DTPOFF32
2453 BFD_RELOC_X86_64_GOTTPOFF
2455 BFD_RELOC_X86_64_TPOFF32
2457 BFD_RELOC_X86_64_GOTOFF64
2459 BFD_RELOC_X86_64_GOTPC32
2461 BFD_RELOC_X86_64_GOT64
2463 BFD_RELOC_X86_64_GOTPCREL64
2465 BFD_RELOC_X86_64_GOTPC64
2467 BFD_RELOC_X86_64_GOTPLT64
2469 BFD_RELOC_X86_64_PLTOFF64
2471 BFD_RELOC_X86_64_GOTPC32_TLSDESC
2473 BFD_RELOC_X86_64_TLSDESC_CALL
2475 BFD_RELOC_X86_64_TLSDESC
2477 BFD_RELOC_X86_64_IRELATIVE
2479 BFD_RELOC_X86_64_PC32_BND
2481 BFD_RELOC_X86_64_PLT32_BND
2483 BFD_RELOC_X86_64_GOTPCRELX
2485 BFD_RELOC_X86_64_REX_GOTPCRELX
2487 x86-64/elf relocations
2490 BFD_RELOC_NS32K_IMM_8
2492 BFD_RELOC_NS32K_IMM_16
2494 BFD_RELOC_NS32K_IMM_32
2496 BFD_RELOC_NS32K_IMM_8_PCREL
2498 BFD_RELOC_NS32K_IMM_16_PCREL
2500 BFD_RELOC_NS32K_IMM_32_PCREL
2502 BFD_RELOC_NS32K_DISP_8
2504 BFD_RELOC_NS32K_DISP_16
2506 BFD_RELOC_NS32K_DISP_32
2508 BFD_RELOC_NS32K_DISP_8_PCREL
2510 BFD_RELOC_NS32K_DISP_16_PCREL
2512 BFD_RELOC_NS32K_DISP_32_PCREL
2517 BFD_RELOC_PDP11_DISP_8_PCREL
2519 BFD_RELOC_PDP11_DISP_6_PCREL
2524 BFD_RELOC_PJ_CODE_HI16
2526 BFD_RELOC_PJ_CODE_LO16
2528 BFD_RELOC_PJ_CODE_DIR16
2530 BFD_RELOC_PJ_CODE_DIR32
2532 BFD_RELOC_PJ_CODE_REL16
2534 BFD_RELOC_PJ_CODE_REL32
2536 Picojava relocs. Not all of these appear in object files.
2545 BFD_RELOC_PPC_TOC16_LO
2547 BFD_RELOC_PPC_TOC16_HI
2551 BFD_RELOC_PPC_B16_BRTAKEN
2553 BFD_RELOC_PPC_B16_BRNTAKEN
2557 BFD_RELOC_PPC_BA16_BRTAKEN
2559 BFD_RELOC_PPC_BA16_BRNTAKEN
2563 BFD_RELOC_PPC_GLOB_DAT
2565 BFD_RELOC_PPC_JMP_SLOT
2567 BFD_RELOC_PPC_RELATIVE
2569 BFD_RELOC_PPC_LOCAL24PC
2571 BFD_RELOC_PPC_EMB_NADDR32
2573 BFD_RELOC_PPC_EMB_NADDR16
2575 BFD_RELOC_PPC_EMB_NADDR16_LO
2577 BFD_RELOC_PPC_EMB_NADDR16_HI
2579 BFD_RELOC_PPC_EMB_NADDR16_HA
2581 BFD_RELOC_PPC_EMB_SDAI16
2583 BFD_RELOC_PPC_EMB_SDA2I16
2585 BFD_RELOC_PPC_EMB_SDA2REL
2587 BFD_RELOC_PPC_EMB_SDA21
2589 BFD_RELOC_PPC_EMB_MRKREF
2591 BFD_RELOC_PPC_EMB_RELSEC16
2593 BFD_RELOC_PPC_EMB_RELST_LO
2595 BFD_RELOC_PPC_EMB_RELST_HI
2597 BFD_RELOC_PPC_EMB_RELST_HA
2599 BFD_RELOC_PPC_EMB_BIT_FLD
2601 BFD_RELOC_PPC_EMB_RELSDA
2603 BFD_RELOC_PPC_VLE_REL8
2605 BFD_RELOC_PPC_VLE_REL15
2607 BFD_RELOC_PPC_VLE_REL24
2609 BFD_RELOC_PPC_VLE_LO16A
2611 BFD_RELOC_PPC_VLE_LO16D
2613 BFD_RELOC_PPC_VLE_HI16A
2615 BFD_RELOC_PPC_VLE_HI16D
2617 BFD_RELOC_PPC_VLE_HA16A
2619 BFD_RELOC_PPC_VLE_HA16D
2621 BFD_RELOC_PPC_VLE_SDA21
2623 BFD_RELOC_PPC_VLE_SDA21_LO
2625 BFD_RELOC_PPC_VLE_SDAREL_LO16A
2627 BFD_RELOC_PPC_VLE_SDAREL_LO16D
2629 BFD_RELOC_PPC_VLE_SDAREL_HI16A
2631 BFD_RELOC_PPC_VLE_SDAREL_HI16D
2633 BFD_RELOC_PPC_VLE_SDAREL_HA16A
2635 BFD_RELOC_PPC_VLE_SDAREL_HA16D
2637 BFD_RELOC_PPC_16DX_HA
2639 BFD_RELOC_PPC_REL16DX_HA
2643 BFD_RELOC_PPC64_HIGHER
2645 BFD_RELOC_PPC64_HIGHER_S
2647 BFD_RELOC_PPC64_HIGHEST
2649 BFD_RELOC_PPC64_HIGHEST_S
2651 BFD_RELOC_PPC64_TOC16_LO
2653 BFD_RELOC_PPC64_TOC16_HI
2655 BFD_RELOC_PPC64_TOC16_HA
2659 BFD_RELOC_PPC64_PLTGOT16
2661 BFD_RELOC_PPC64_PLTGOT16_LO
2663 BFD_RELOC_PPC64_PLTGOT16_HI
2665 BFD_RELOC_PPC64_PLTGOT16_HA
2667 BFD_RELOC_PPC64_ADDR16_DS
2669 BFD_RELOC_PPC64_ADDR16_LO_DS
2671 BFD_RELOC_PPC64_GOT16_DS
2673 BFD_RELOC_PPC64_GOT16_LO_DS
2675 BFD_RELOC_PPC64_PLT16_LO_DS
2677 BFD_RELOC_PPC64_SECTOFF_DS
2679 BFD_RELOC_PPC64_SECTOFF_LO_DS
2681 BFD_RELOC_PPC64_TOC16_DS
2683 BFD_RELOC_PPC64_TOC16_LO_DS
2685 BFD_RELOC_PPC64_PLTGOT16_DS
2687 BFD_RELOC_PPC64_PLTGOT16_LO_DS
2689 BFD_RELOC_PPC64_ADDR16_HIGH
2691 BFD_RELOC_PPC64_ADDR16_HIGHA
2693 BFD_RELOC_PPC64_REL16_HIGH
2695 BFD_RELOC_PPC64_REL16_HIGHA
2697 BFD_RELOC_PPC64_REL16_HIGHER
2699 BFD_RELOC_PPC64_REL16_HIGHERA
2701 BFD_RELOC_PPC64_REL16_HIGHEST
2703 BFD_RELOC_PPC64_REL16_HIGHESTA
2705 BFD_RELOC_PPC64_ADDR64_LOCAL
2707 BFD_RELOC_PPC64_ENTRY
2709 BFD_RELOC_PPC64_REL24_NOTOC
2711 BFD_RELOC_PPC64_REL24_P9NOTOC
2715 BFD_RELOC_PPC64_D34_LO
2717 BFD_RELOC_PPC64_D34_HI30
2719 BFD_RELOC_PPC64_D34_HA30
2721 BFD_RELOC_PPC64_PCREL34
2723 BFD_RELOC_PPC64_GOT_PCREL34
2725 BFD_RELOC_PPC64_PLT_PCREL34
2727 BFD_RELOC_PPC64_ADDR16_HIGHER34
2729 BFD_RELOC_PPC64_ADDR16_HIGHERA34
2731 BFD_RELOC_PPC64_ADDR16_HIGHEST34
2733 BFD_RELOC_PPC64_ADDR16_HIGHESTA34
2735 BFD_RELOC_PPC64_REL16_HIGHER34
2737 BFD_RELOC_PPC64_REL16_HIGHERA34
2739 BFD_RELOC_PPC64_REL16_HIGHEST34
2741 BFD_RELOC_PPC64_REL16_HIGHESTA34
2745 BFD_RELOC_PPC64_PCREL28
2747 Power(rs6000) and PowerPC relocations.
2764 BFD_RELOC_PPC_DTPMOD
2766 BFD_RELOC_PPC_TPREL16
2768 BFD_RELOC_PPC_TPREL16_LO
2770 BFD_RELOC_PPC_TPREL16_HI
2772 BFD_RELOC_PPC_TPREL16_HA
2776 BFD_RELOC_PPC_DTPREL16
2778 BFD_RELOC_PPC_DTPREL16_LO
2780 BFD_RELOC_PPC_DTPREL16_HI
2782 BFD_RELOC_PPC_DTPREL16_HA
2784 BFD_RELOC_PPC_DTPREL
2786 BFD_RELOC_PPC_GOT_TLSGD16
2788 BFD_RELOC_PPC_GOT_TLSGD16_LO
2790 BFD_RELOC_PPC_GOT_TLSGD16_HI
2792 BFD_RELOC_PPC_GOT_TLSGD16_HA
2794 BFD_RELOC_PPC_GOT_TLSLD16
2796 BFD_RELOC_PPC_GOT_TLSLD16_LO
2798 BFD_RELOC_PPC_GOT_TLSLD16_HI
2800 BFD_RELOC_PPC_GOT_TLSLD16_HA
2802 BFD_RELOC_PPC_GOT_TPREL16
2804 BFD_RELOC_PPC_GOT_TPREL16_LO
2806 BFD_RELOC_PPC_GOT_TPREL16_HI
2808 BFD_RELOC_PPC_GOT_TPREL16_HA
2810 BFD_RELOC_PPC_GOT_DTPREL16
2812 BFD_RELOC_PPC_GOT_DTPREL16_LO
2814 BFD_RELOC_PPC_GOT_DTPREL16_HI
2816 BFD_RELOC_PPC_GOT_DTPREL16_HA
2818 BFD_RELOC_PPC64_TLSGD
2820 BFD_RELOC_PPC64_TLSLD
2822 BFD_RELOC_PPC64_TLSLE
2824 BFD_RELOC_PPC64_TLSIE
2826 BFD_RELOC_PPC64_TLSM
2828 BFD_RELOC_PPC64_TLSML
2830 BFD_RELOC_PPC64_TPREL16_DS
2832 BFD_RELOC_PPC64_TPREL16_LO_DS
2834 BFD_RELOC_PPC64_TPREL16_HIGH
2836 BFD_RELOC_PPC64_TPREL16_HIGHA
2838 BFD_RELOC_PPC64_TPREL16_HIGHER
2840 BFD_RELOC_PPC64_TPREL16_HIGHERA
2842 BFD_RELOC_PPC64_TPREL16_HIGHEST
2844 BFD_RELOC_PPC64_TPREL16_HIGHESTA
2846 BFD_RELOC_PPC64_DTPREL16_DS
2848 BFD_RELOC_PPC64_DTPREL16_LO_DS
2850 BFD_RELOC_PPC64_DTPREL16_HIGH
2852 BFD_RELOC_PPC64_DTPREL16_HIGHA
2854 BFD_RELOC_PPC64_DTPREL16_HIGHER
2856 BFD_RELOC_PPC64_DTPREL16_HIGHERA
2858 BFD_RELOC_PPC64_DTPREL16_HIGHEST
2860 BFD_RELOC_PPC64_DTPREL16_HIGHESTA
2862 BFD_RELOC_PPC64_TPREL34
2864 BFD_RELOC_PPC64_DTPREL34
2866 BFD_RELOC_PPC64_GOT_TLSGD_PCREL34
2868 BFD_RELOC_PPC64_GOT_TLSLD_PCREL34
2870 BFD_RELOC_PPC64_GOT_TPREL_PCREL34
2872 BFD_RELOC_PPC64_GOT_DTPREL_PCREL34
2874 BFD_RELOC_PPC64_TLS_PCREL
2876 PowerPC and PowerPC64 thread-local storage relocations.
2881 IBM 370/390 relocations
2886 The type of reloc used to build a constructor table - at the moment
2887 probably a 32 bit wide absolute relocation, but the target can choose.
2888 It generally does map to one of the other relocation types.
2891 BFD_RELOC_ARM_PCREL_BRANCH
2893 ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
2894 not stored in the instruction.
2896 BFD_RELOC_ARM_PCREL_BLX
2898 ARM 26 bit pc-relative branch. The lowest bit must be zero and is
2899 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2900 field in the instruction.
2902 BFD_RELOC_THUMB_PCREL_BLX
2904 Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
2905 not stored in the instruction. The 2nd lowest bit comes from a 1 bit
2906 field in the instruction.
2908 BFD_RELOC_ARM_PCREL_CALL
2910 ARM 26-bit pc-relative branch for an unconditional BL or BLX instruction.
2912 BFD_RELOC_ARM_PCREL_JUMP
2914 ARM 26-bit pc-relative branch for B or conditional BL instruction.
2917 BFD_RELOC_THUMB_PCREL_BRANCH5
2919 ARM 5-bit pc-relative branch for Branch Future instructions.
2922 BFD_RELOC_THUMB_PCREL_BFCSEL
2924 ARM 6-bit pc-relative branch for BFCSEL instruction.
2927 BFD_RELOC_ARM_THUMB_BF17
2929 ARM 17-bit pc-relative branch for Branch Future instructions.
2932 BFD_RELOC_ARM_THUMB_BF13
2934 ARM 13-bit pc-relative branch for BFCSEL instruction.
2937 BFD_RELOC_ARM_THUMB_BF19
2939 ARM 19-bit pc-relative branch for Branch Future Link instruction.
2942 BFD_RELOC_ARM_THUMB_LOOP12
2944 ARM 12-bit pc-relative branch for Low Overhead Loop instructions.
2947 BFD_RELOC_THUMB_PCREL_BRANCH7
2949 BFD_RELOC_THUMB_PCREL_BRANCH9
2951 BFD_RELOC_THUMB_PCREL_BRANCH12
2953 BFD_RELOC_THUMB_PCREL_BRANCH20
2955 BFD_RELOC_THUMB_PCREL_BRANCH23
2957 BFD_RELOC_THUMB_PCREL_BRANCH25
2959 Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.
2960 The lowest bit must be zero and is not stored in the instruction.
2961 Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
2962 "nn" one smaller in all cases. Note further that BRANCH23
2963 corresponds to R_ARM_THM_CALL.
2966 BFD_RELOC_ARM_OFFSET_IMM
2968 12-bit immediate offset, used in ARM-format ldr and str instructions.
2971 BFD_RELOC_ARM_THUMB_OFFSET
2973 5-bit immediate offset, used in Thumb-format ldr and str instructions.
2976 BFD_RELOC_ARM_TARGET1
2978 Pc-relative or absolute relocation depending on target. Used for
2979 entries in .init_array sections.
2981 BFD_RELOC_ARM_ROSEGREL32
2983 Read-only segment base relative address.
2985 BFD_RELOC_ARM_SBREL32
2987 Data segment base relative address.
2989 BFD_RELOC_ARM_TARGET2
2991 This reloc is used for references to RTTI data from exception handling
2992 tables. The actual definition depends on the target. It may be a
2993 pc-relative or some form of GOT-indirect relocation.
2995 BFD_RELOC_ARM_PREL31
2997 31-bit PC relative address.
3003 BFD_RELOC_ARM_MOVW_PCREL
3005 BFD_RELOC_ARM_MOVT_PCREL
3007 BFD_RELOC_ARM_THUMB_MOVW
3009 BFD_RELOC_ARM_THUMB_MOVT
3011 BFD_RELOC_ARM_THUMB_MOVW_PCREL
3013 BFD_RELOC_ARM_THUMB_MOVT_PCREL
3015 Low and High halfword relocations for MOVW and MOVT instructions.
3018 BFD_RELOC_ARM_GOTFUNCDESC
3020 BFD_RELOC_ARM_GOTOFFFUNCDESC
3022 BFD_RELOC_ARM_FUNCDESC
3024 BFD_RELOC_ARM_FUNCDESC_VALUE
3026 BFD_RELOC_ARM_TLS_GD32_FDPIC
3028 BFD_RELOC_ARM_TLS_LDM32_FDPIC
3030 BFD_RELOC_ARM_TLS_IE32_FDPIC
3032 ARM FDPIC specific relocations.
3035 BFD_RELOC_ARM_JUMP_SLOT
3037 BFD_RELOC_ARM_GLOB_DAT
3043 BFD_RELOC_ARM_RELATIVE
3045 BFD_RELOC_ARM_GOTOFF
3049 BFD_RELOC_ARM_GOT_PREL
3051 Relocations for setting up GOTs and PLTs for shared libraries.
3054 BFD_RELOC_ARM_TLS_GD32
3056 BFD_RELOC_ARM_TLS_LDO32
3058 BFD_RELOC_ARM_TLS_LDM32
3060 BFD_RELOC_ARM_TLS_DTPOFF32
3062 BFD_RELOC_ARM_TLS_DTPMOD32
3064 BFD_RELOC_ARM_TLS_TPOFF32
3066 BFD_RELOC_ARM_TLS_IE32
3068 BFD_RELOC_ARM_TLS_LE32
3070 BFD_RELOC_ARM_TLS_GOTDESC
3072 BFD_RELOC_ARM_TLS_CALL
3074 BFD_RELOC_ARM_THM_TLS_CALL
3076 BFD_RELOC_ARM_TLS_DESCSEQ
3078 BFD_RELOC_ARM_THM_TLS_DESCSEQ
3080 BFD_RELOC_ARM_TLS_DESC
3082 ARM thread-local storage relocations.
3085 BFD_RELOC_ARM_ALU_PC_G0_NC
3087 BFD_RELOC_ARM_ALU_PC_G0
3089 BFD_RELOC_ARM_ALU_PC_G1_NC
3091 BFD_RELOC_ARM_ALU_PC_G1
3093 BFD_RELOC_ARM_ALU_PC_G2
3095 BFD_RELOC_ARM_LDR_PC_G0
3097 BFD_RELOC_ARM_LDR_PC_G1
3099 BFD_RELOC_ARM_LDR_PC_G2
3101 BFD_RELOC_ARM_LDRS_PC_G0
3103 BFD_RELOC_ARM_LDRS_PC_G1
3105 BFD_RELOC_ARM_LDRS_PC_G2
3107 BFD_RELOC_ARM_LDC_PC_G0
3109 BFD_RELOC_ARM_LDC_PC_G1
3111 BFD_RELOC_ARM_LDC_PC_G2
3113 BFD_RELOC_ARM_ALU_SB_G0_NC
3115 BFD_RELOC_ARM_ALU_SB_G0
3117 BFD_RELOC_ARM_ALU_SB_G1_NC
3119 BFD_RELOC_ARM_ALU_SB_G1
3121 BFD_RELOC_ARM_ALU_SB_G2
3123 BFD_RELOC_ARM_LDR_SB_G0
3125 BFD_RELOC_ARM_LDR_SB_G1
3127 BFD_RELOC_ARM_LDR_SB_G2
3129 BFD_RELOC_ARM_LDRS_SB_G0
3131 BFD_RELOC_ARM_LDRS_SB_G1
3133 BFD_RELOC_ARM_LDRS_SB_G2
3135 BFD_RELOC_ARM_LDC_SB_G0
3137 BFD_RELOC_ARM_LDC_SB_G1
3139 BFD_RELOC_ARM_LDC_SB_G2
3141 ARM group relocations.
3146 Annotation of BX instructions.
3149 BFD_RELOC_ARM_IRELATIVE
3151 ARM support for STT_GNU_IFUNC.
3154 BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
3156 BFD_RELOC_ARM_THUMB_ALU_ABS_G1_NC
3158 BFD_RELOC_ARM_THUMB_ALU_ABS_G2_NC
3160 BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC
3162 Thumb1 relocations to support execute-only code.
3165 BFD_RELOC_ARM_IMMEDIATE
3167 BFD_RELOC_ARM_ADRL_IMMEDIATE
3169 BFD_RELOC_ARM_T32_IMMEDIATE
3171 BFD_RELOC_ARM_T32_ADD_IMM
3173 BFD_RELOC_ARM_T32_IMM12
3175 BFD_RELOC_ARM_T32_ADD_PC12
3177 BFD_RELOC_ARM_SHIFT_IMM
3187 BFD_RELOC_ARM_CP_OFF_IMM
3189 BFD_RELOC_ARM_CP_OFF_IMM_S2
3191 BFD_RELOC_ARM_T32_CP_OFF_IMM
3193 BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
3195 BFD_RELOC_ARM_T32_VLDR_VSTR_OFF_IMM
3197 BFD_RELOC_ARM_ADR_IMM
3199 BFD_RELOC_ARM_LDR_IMM
3201 BFD_RELOC_ARM_LITERAL
3203 BFD_RELOC_ARM_IN_POOL
3205 BFD_RELOC_ARM_OFFSET_IMM8
3207 BFD_RELOC_ARM_T32_OFFSET_U8
3209 BFD_RELOC_ARM_T32_OFFSET_IMM
3211 BFD_RELOC_ARM_HWLITERAL
3213 BFD_RELOC_ARM_THUMB_ADD
3215 BFD_RELOC_ARM_THUMB_IMM
3217 BFD_RELOC_ARM_THUMB_SHIFT
3219 These relocs are only used within the ARM assembler. They are not
3220 (at present) written to any object files.
3223 BFD_RELOC_SH_PCDISP8BY2
3225 BFD_RELOC_SH_PCDISP12BY2
3233 BFD_RELOC_SH_DISP12BY2
3235 BFD_RELOC_SH_DISP12BY4
3237 BFD_RELOC_SH_DISP12BY8
3241 BFD_RELOC_SH_DISP20BY8
3245 BFD_RELOC_SH_IMM4BY2
3247 BFD_RELOC_SH_IMM4BY4
3251 BFD_RELOC_SH_IMM8BY2
3253 BFD_RELOC_SH_IMM8BY4
3255 BFD_RELOC_SH_PCRELIMM8BY2
3257 BFD_RELOC_SH_PCRELIMM8BY4
3259 BFD_RELOC_SH_SWITCH16
3261 BFD_RELOC_SH_SWITCH32
3275 BFD_RELOC_SH_LOOP_START
3277 BFD_RELOC_SH_LOOP_END
3281 BFD_RELOC_SH_GLOB_DAT
3283 BFD_RELOC_SH_JMP_SLOT
3285 BFD_RELOC_SH_RELATIVE
3289 BFD_RELOC_SH_GOT_LOW16
3291 BFD_RELOC_SH_GOT_MEDLOW16
3293 BFD_RELOC_SH_GOT_MEDHI16
3295 BFD_RELOC_SH_GOT_HI16
3297 BFD_RELOC_SH_GOTPLT_LOW16
3299 BFD_RELOC_SH_GOTPLT_MEDLOW16
3301 BFD_RELOC_SH_GOTPLT_MEDHI16
3303 BFD_RELOC_SH_GOTPLT_HI16
3305 BFD_RELOC_SH_PLT_LOW16
3307 BFD_RELOC_SH_PLT_MEDLOW16
3309 BFD_RELOC_SH_PLT_MEDHI16
3311 BFD_RELOC_SH_PLT_HI16
3313 BFD_RELOC_SH_GOTOFF_LOW16
3315 BFD_RELOC_SH_GOTOFF_MEDLOW16
3317 BFD_RELOC_SH_GOTOFF_MEDHI16
3319 BFD_RELOC_SH_GOTOFF_HI16
3321 BFD_RELOC_SH_GOTPC_LOW16
3323 BFD_RELOC_SH_GOTPC_MEDLOW16
3325 BFD_RELOC_SH_GOTPC_MEDHI16
3327 BFD_RELOC_SH_GOTPC_HI16
3331 BFD_RELOC_SH_GLOB_DAT64
3333 BFD_RELOC_SH_JMP_SLOT64
3335 BFD_RELOC_SH_RELATIVE64
3337 BFD_RELOC_SH_GOT10BY4
3339 BFD_RELOC_SH_GOT10BY8
3341 BFD_RELOC_SH_GOTPLT10BY4
3343 BFD_RELOC_SH_GOTPLT10BY8
3345 BFD_RELOC_SH_GOTPLT32
3347 BFD_RELOC_SH_SHMEDIA_CODE
3353 BFD_RELOC_SH_IMMS6BY32
3359 BFD_RELOC_SH_IMMS10BY2
3361 BFD_RELOC_SH_IMMS10BY4
3363 BFD_RELOC_SH_IMMS10BY8
3369 BFD_RELOC_SH_IMM_LOW16
3371 BFD_RELOC_SH_IMM_LOW16_PCREL
3373 BFD_RELOC_SH_IMM_MEDLOW16
3375 BFD_RELOC_SH_IMM_MEDLOW16_PCREL
3377 BFD_RELOC_SH_IMM_MEDHI16
3379 BFD_RELOC_SH_IMM_MEDHI16_PCREL
3381 BFD_RELOC_SH_IMM_HI16
3383 BFD_RELOC_SH_IMM_HI16_PCREL
3387 BFD_RELOC_SH_TLS_GD_32
3389 BFD_RELOC_SH_TLS_LD_32
3391 BFD_RELOC_SH_TLS_LDO_32
3393 BFD_RELOC_SH_TLS_IE_32
3395 BFD_RELOC_SH_TLS_LE_32
3397 BFD_RELOC_SH_TLS_DTPMOD32
3399 BFD_RELOC_SH_TLS_DTPOFF32
3401 BFD_RELOC_SH_TLS_TPOFF32
3405 BFD_RELOC_SH_GOTOFF20
3407 BFD_RELOC_SH_GOTFUNCDESC
3409 BFD_RELOC_SH_GOTFUNCDESC20
3411 BFD_RELOC_SH_GOTOFFFUNCDESC
3413 BFD_RELOC_SH_GOTOFFFUNCDESC20
3415 BFD_RELOC_SH_FUNCDESC
3417 Renesas / SuperH SH relocs. Not all of these appear in object files.
3440 BFD_RELOC_ARC_SECTOFF
3442 BFD_RELOC_ARC_S21H_PCREL
3444 BFD_RELOC_ARC_S21W_PCREL
3446 BFD_RELOC_ARC_S25H_PCREL
3448 BFD_RELOC_ARC_S25W_PCREL
3452 BFD_RELOC_ARC_SDA_LDST
3454 BFD_RELOC_ARC_SDA_LDST1
3456 BFD_RELOC_ARC_SDA_LDST2
3458 BFD_RELOC_ARC_SDA16_LD
3460 BFD_RELOC_ARC_SDA16_LD1
3462 BFD_RELOC_ARC_SDA16_LD2
3464 BFD_RELOC_ARC_S13_PCREL
3470 BFD_RELOC_ARC_32_ME_S
3472 BFD_RELOC_ARC_N32_ME
3474 BFD_RELOC_ARC_SECTOFF_ME
3476 BFD_RELOC_ARC_SDA32_ME
3480 BFD_RELOC_AC_SECTOFF_U8
3482 BFD_RELOC_AC_SECTOFF_U8_1
3484 BFD_RELOC_AC_SECTOFF_U8_2
3486 BFD_RELOC_AC_SECTOFF_S9
3488 BFD_RELOC_AC_SECTOFF_S9_1
3490 BFD_RELOC_AC_SECTOFF_S9_2
3492 BFD_RELOC_ARC_SECTOFF_ME_1
3494 BFD_RELOC_ARC_SECTOFF_ME_2
3496 BFD_RELOC_ARC_SECTOFF_1
3498 BFD_RELOC_ARC_SECTOFF_2
3500 BFD_RELOC_ARC_SDA_12
3502 BFD_RELOC_ARC_SDA16_ST2
3504 BFD_RELOC_ARC_32_PCREL
3510 BFD_RELOC_ARC_GOTPC32
3516 BFD_RELOC_ARC_GLOB_DAT
3518 BFD_RELOC_ARC_JMP_SLOT
3520 BFD_RELOC_ARC_RELATIVE
3522 BFD_RELOC_ARC_GOTOFF
3526 BFD_RELOC_ARC_S21W_PCREL_PLT
3528 BFD_RELOC_ARC_S25H_PCREL_PLT
3530 BFD_RELOC_ARC_TLS_DTPMOD
3532 BFD_RELOC_ARC_TLS_TPOFF
3534 BFD_RELOC_ARC_TLS_GD_GOT
3536 BFD_RELOC_ARC_TLS_GD_LD
3538 BFD_RELOC_ARC_TLS_GD_CALL
3540 BFD_RELOC_ARC_TLS_IE_GOT
3542 BFD_RELOC_ARC_TLS_DTPOFF
3544 BFD_RELOC_ARC_TLS_DTPOFF_S9
3546 BFD_RELOC_ARC_TLS_LE_S9
3548 BFD_RELOC_ARC_TLS_LE_32
3550 BFD_RELOC_ARC_S25W_PCREL_PLT
3552 BFD_RELOC_ARC_S21H_PCREL_PLT
3554 BFD_RELOC_ARC_NPS_CMEM16
3556 BFD_RELOC_ARC_JLI_SECTOFF
3561 BFD_RELOC_BFIN_16_IMM
3563 ADI Blackfin 16 bit immediate absolute reloc.
3565 BFD_RELOC_BFIN_16_HIGH
3567 ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
3569 BFD_RELOC_BFIN_4_PCREL
3571 ADI Blackfin 'a' part of LSETUP.
3573 BFD_RELOC_BFIN_5_PCREL
3577 BFD_RELOC_BFIN_16_LOW
3579 ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
3581 BFD_RELOC_BFIN_10_PCREL
3585 BFD_RELOC_BFIN_11_PCREL
3587 ADI Blackfin 'b' part of LSETUP.
3589 BFD_RELOC_BFIN_12_PCREL_JUMP
3593 BFD_RELOC_BFIN_12_PCREL_JUMP_S
3595 ADI Blackfin Short jump, pcrel.
3597 BFD_RELOC_BFIN_24_PCREL_CALL_X
3599 ADI Blackfin Call.x not implemented.
3601 BFD_RELOC_BFIN_24_PCREL_JUMP_L
3603 ADI Blackfin Long Jump pcrel.
3605 BFD_RELOC_BFIN_GOT17M4
3607 BFD_RELOC_BFIN_GOTHI
3609 BFD_RELOC_BFIN_GOTLO
3611 BFD_RELOC_BFIN_FUNCDESC
3613 BFD_RELOC_BFIN_FUNCDESC_GOT17M4
3615 BFD_RELOC_BFIN_FUNCDESC_GOTHI
3617 BFD_RELOC_BFIN_FUNCDESC_GOTLO
3619 BFD_RELOC_BFIN_FUNCDESC_VALUE
3621 BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
3623 BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
3625 BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
3627 BFD_RELOC_BFIN_GOTOFF17M4
3629 BFD_RELOC_BFIN_GOTOFFHI
3631 BFD_RELOC_BFIN_GOTOFFLO
3633 ADI Blackfin FD-PIC relocations.
3637 ADI Blackfin GOT relocation.
3639 BFD_RELOC_BFIN_PLTPC
3641 ADI Blackfin PLTPC relocation.
3643 BFD_ARELOC_BFIN_PUSH
3645 ADI Blackfin arithmetic relocation.
3647 BFD_ARELOC_BFIN_CONST
3649 ADI Blackfin arithmetic relocation.
3653 ADI Blackfin arithmetic relocation.
3657 ADI Blackfin arithmetic relocation.
3659 BFD_ARELOC_BFIN_MULT
3661 ADI Blackfin arithmetic relocation.
3665 ADI Blackfin arithmetic relocation.
3669 ADI Blackfin arithmetic relocation.
3671 BFD_ARELOC_BFIN_LSHIFT
3673 ADI Blackfin arithmetic relocation.
3675 BFD_ARELOC_BFIN_RSHIFT
3677 ADI Blackfin arithmetic relocation.
3681 ADI Blackfin arithmetic relocation.
3685 ADI Blackfin arithmetic relocation.
3689 ADI Blackfin arithmetic relocation.
3691 BFD_ARELOC_BFIN_LAND
3693 ADI Blackfin arithmetic relocation.
3697 ADI Blackfin arithmetic relocation.
3701 ADI Blackfin arithmetic relocation.
3705 ADI Blackfin arithmetic relocation.
3707 BFD_ARELOC_BFIN_COMP
3709 ADI Blackfin arithmetic relocation.
3711 BFD_ARELOC_BFIN_PAGE
3713 ADI Blackfin arithmetic relocation.
3715 BFD_ARELOC_BFIN_HWPAGE
3717 ADI Blackfin arithmetic relocation.
3719 BFD_ARELOC_BFIN_ADDR
3721 ADI Blackfin arithmetic relocation.
3724 BFD_RELOC_D10V_10_PCREL_R
3726 Mitsubishi D10V relocs.
3727 This is a 10-bit reloc with the right 2 bits
3730 BFD_RELOC_D10V_10_PCREL_L
3732 Mitsubishi D10V relocs.
3733 This is a 10-bit reloc with the right 2 bits
3734 assumed to be 0. This is the same as the previous reloc
3735 except it is in the left container, i.e.,
3736 shifted left 15 bits.
3740 This is an 18-bit reloc with the right 2 bits
3743 BFD_RELOC_D10V_18_PCREL
3745 This is an 18-bit reloc with the right 2 bits
3751 Mitsubishi D30V relocs.
3752 This is a 6-bit absolute reloc.
3754 BFD_RELOC_D30V_9_PCREL
3756 This is a 6-bit pc-relative reloc with
3757 the right 3 bits assumed to be 0.
3759 BFD_RELOC_D30V_9_PCREL_R
3761 This is a 6-bit pc-relative reloc with
3762 the right 3 bits assumed to be 0. Same
3763 as the previous reloc but on the right side
3768 This is a 12-bit absolute reloc with the
3769 right 3 bitsassumed to be 0.
3771 BFD_RELOC_D30V_15_PCREL
3773 This is a 12-bit pc-relative reloc with
3774 the right 3 bits assumed to be 0.
3776 BFD_RELOC_D30V_15_PCREL_R
3778 This is a 12-bit pc-relative reloc with
3779 the right 3 bits assumed to be 0. Same
3780 as the previous reloc but on the right side
3785 This is an 18-bit absolute reloc with
3786 the right 3 bits assumed to be 0.
3788 BFD_RELOC_D30V_21_PCREL
3790 This is an 18-bit pc-relative reloc with
3791 the right 3 bits assumed to be 0.
3793 BFD_RELOC_D30V_21_PCREL_R
3795 This is an 18-bit pc-relative reloc with
3796 the right 3 bits assumed to be 0. Same
3797 as the previous reloc but on the right side
3802 This is a 32-bit absolute reloc.
3804 BFD_RELOC_D30V_32_PCREL
3806 This is a 32-bit pc-relative reloc.
3809 BFD_RELOC_DLX_HI16_S
3824 BFD_RELOC_M32C_RL_JUMP
3826 BFD_RELOC_M32C_RL_1ADDR
3828 BFD_RELOC_M32C_RL_2ADDR
3830 Renesas M16C/M32C Relocations.
3835 Renesas M32R (formerly Mitsubishi M32R) relocs.
3836 This is a 24 bit absolute address.
3838 BFD_RELOC_M32R_10_PCREL
3840 This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0.
3842 BFD_RELOC_M32R_18_PCREL
3844 This is an 18-bit reloc with the right 2 bits assumed to be 0.
3846 BFD_RELOC_M32R_26_PCREL
3848 This is a 26-bit reloc with the right 2 bits assumed to be 0.
3850 BFD_RELOC_M32R_HI16_ULO
3852 This is a 16-bit reloc containing the high 16 bits of an address
3853 used when the lower 16 bits are treated as unsigned.
3855 BFD_RELOC_M32R_HI16_SLO
3857 This is a 16-bit reloc containing the high 16 bits of an address
3858 used when the lower 16 bits are treated as signed.
3862 This is a 16-bit reloc containing the lower 16 bits of an address.
3864 BFD_RELOC_M32R_SDA16
3866 This is a 16-bit reloc containing the small data area offset for use in
3867 add3, load, and store instructions.
3869 BFD_RELOC_M32R_GOT24
3871 BFD_RELOC_M32R_26_PLTREL
3875 BFD_RELOC_M32R_GLOB_DAT
3877 BFD_RELOC_M32R_JMP_SLOT
3879 BFD_RELOC_M32R_RELATIVE
3881 BFD_RELOC_M32R_GOTOFF
3883 BFD_RELOC_M32R_GOTOFF_HI_ULO
3885 BFD_RELOC_M32R_GOTOFF_HI_SLO
3887 BFD_RELOC_M32R_GOTOFF_LO
3889 BFD_RELOC_M32R_GOTPC24
3891 BFD_RELOC_M32R_GOT16_HI_ULO
3893 BFD_RELOC_M32R_GOT16_HI_SLO
3895 BFD_RELOC_M32R_GOT16_LO
3897 BFD_RELOC_M32R_GOTPC_HI_ULO
3899 BFD_RELOC_M32R_GOTPC_HI_SLO
3901 BFD_RELOC_M32R_GOTPC_LO
3910 This is a 20 bit absolute address.
3912 BFD_RELOC_NDS32_9_PCREL
3914 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
3916 BFD_RELOC_NDS32_WORD_9_PCREL
3918 This is a 9-bit pc-relative reloc with the right 1 bit assumed to be 0.
3920 BFD_RELOC_NDS32_15_PCREL
3922 This is an 15-bit reloc with the right 1 bit assumed to be 0.
3924 BFD_RELOC_NDS32_17_PCREL
3926 This is an 17-bit reloc with the right 1 bit assumed to be 0.
3928 BFD_RELOC_NDS32_25_PCREL
3930 This is a 25-bit reloc with the right 1 bit assumed to be 0.
3932 BFD_RELOC_NDS32_HI20
3934 This is a 20-bit reloc containing the high 20 bits of an address
3935 used with the lower 12 bits
3937 BFD_RELOC_NDS32_LO12S3
3939 This is a 12-bit reloc containing the lower 12 bits of an address
3940 then shift right by 3. This is used with ldi,sdi...
3942 BFD_RELOC_NDS32_LO12S2
3944 This is a 12-bit reloc containing the lower 12 bits of an address
3945 then shift left by 2. This is used with lwi,swi...
3947 BFD_RELOC_NDS32_LO12S1
3949 This is a 12-bit reloc containing the lower 12 bits of an address
3950 then shift left by 1. This is used with lhi,shi...
3952 BFD_RELOC_NDS32_LO12S0
3954 This is a 12-bit reloc containing the lower 12 bits of an address
3955 then shift left by 0. This is used with lbisbi...
3957 BFD_RELOC_NDS32_LO12S0_ORI
3959 This is a 12-bit reloc containing the lower 12 bits of an address
3960 then shift left by 0. This is only used with branch relaxations
3962 BFD_RELOC_NDS32_SDA15S3
3964 This is a 15-bit reloc containing the small data area 18-bit signed offset
3965 and shift left by 3 for use in ldi, sdi...
3967 BFD_RELOC_NDS32_SDA15S2
3969 This is a 15-bit reloc containing the small data area 17-bit signed offset
3970 and shift left by 2 for use in lwi, swi...
3972 BFD_RELOC_NDS32_SDA15S1
3974 This is a 15-bit reloc containing the small data area 16-bit signed offset
3975 and shift left by 1 for use in lhi, shi...
3977 BFD_RELOC_NDS32_SDA15S0
3979 This is a 15-bit reloc containing the small data area 15-bit signed offset
3980 and shift left by 0 for use in lbi, sbi...
3982 BFD_RELOC_NDS32_SDA16S3
3984 This is a 16-bit reloc containing the small data area 16-bit signed offset
3987 BFD_RELOC_NDS32_SDA17S2
3989 This is a 17-bit reloc containing the small data area 17-bit signed offset
3990 and shift left by 2 for use in lwi.gp, swi.gp...
3992 BFD_RELOC_NDS32_SDA18S1
3994 This is a 18-bit reloc containing the small data area 18-bit signed offset
3995 and shift left by 1 for use in lhi.gp, shi.gp...
3997 BFD_RELOC_NDS32_SDA19S0
3999 This is a 19-bit reloc containing the small data area 19-bit signed offset
4000 and shift left by 0 for use in lbi.gp, sbi.gp...
4002 BFD_RELOC_NDS32_GOT20
4004 BFD_RELOC_NDS32_9_PLTREL
4006 BFD_RELOC_NDS32_25_PLTREL
4008 BFD_RELOC_NDS32_COPY
4010 BFD_RELOC_NDS32_GLOB_DAT
4012 BFD_RELOC_NDS32_JMP_SLOT
4014 BFD_RELOC_NDS32_RELATIVE
4016 BFD_RELOC_NDS32_GOTOFF
4018 BFD_RELOC_NDS32_GOTOFF_HI20
4020 BFD_RELOC_NDS32_GOTOFF_LO12
4022 BFD_RELOC_NDS32_GOTPC20
4024 BFD_RELOC_NDS32_GOT_HI20
4026 BFD_RELOC_NDS32_GOT_LO12
4028 BFD_RELOC_NDS32_GOTPC_HI20
4030 BFD_RELOC_NDS32_GOTPC_LO12
4034 BFD_RELOC_NDS32_INSN16
4036 BFD_RELOC_NDS32_LABEL
4038 BFD_RELOC_NDS32_LONGCALL1
4040 BFD_RELOC_NDS32_LONGCALL2
4042 BFD_RELOC_NDS32_LONGCALL3
4044 BFD_RELOC_NDS32_LONGJUMP1
4046 BFD_RELOC_NDS32_LONGJUMP2
4048 BFD_RELOC_NDS32_LONGJUMP3
4050 BFD_RELOC_NDS32_LOADSTORE
4052 BFD_RELOC_NDS32_9_FIXED
4054 BFD_RELOC_NDS32_15_FIXED
4056 BFD_RELOC_NDS32_17_FIXED
4058 BFD_RELOC_NDS32_25_FIXED
4060 BFD_RELOC_NDS32_LONGCALL4
4062 BFD_RELOC_NDS32_LONGCALL5
4064 BFD_RELOC_NDS32_LONGCALL6
4066 BFD_RELOC_NDS32_LONGJUMP4
4068 BFD_RELOC_NDS32_LONGJUMP5
4070 BFD_RELOC_NDS32_LONGJUMP6
4072 BFD_RELOC_NDS32_LONGJUMP7
4076 BFD_RELOC_NDS32_PLTREL_HI20
4078 BFD_RELOC_NDS32_PLTREL_LO12
4080 BFD_RELOC_NDS32_PLT_GOTREL_HI20
4082 BFD_RELOC_NDS32_PLT_GOTREL_LO12
4086 BFD_RELOC_NDS32_SDA12S2_DP
4088 BFD_RELOC_NDS32_SDA12S2_SP
4090 BFD_RELOC_NDS32_LO12S2_DP
4092 BFD_RELOC_NDS32_LO12S2_SP
4096 BFD_RELOC_NDS32_DWARF2_OP1
4098 BFD_RELOC_NDS32_DWARF2_OP2
4100 BFD_RELOC_NDS32_DWARF2_LEB
4102 for dwarf2 debug_line.
4104 BFD_RELOC_NDS32_UPDATE_TA
4106 for eliminate 16-bit instructions
4108 BFD_RELOC_NDS32_PLT_GOTREL_LO20
4110 BFD_RELOC_NDS32_PLT_GOTREL_LO15
4112 BFD_RELOC_NDS32_PLT_GOTREL_LO19
4114 BFD_RELOC_NDS32_GOT_LO15
4116 BFD_RELOC_NDS32_GOT_LO19
4118 BFD_RELOC_NDS32_GOTOFF_LO15
4120 BFD_RELOC_NDS32_GOTOFF_LO19
4122 BFD_RELOC_NDS32_GOT15S2
4124 BFD_RELOC_NDS32_GOT17S2
4126 for PIC object relaxation
4131 This is a 5 bit absolute address.
4133 BFD_RELOC_NDS32_10_UPCREL
4135 This is a 10-bit unsigned pc-relative reloc with the right 1 bit assumed to be 0.
4137 BFD_RELOC_NDS32_SDA_FP7U2_RELA
4139 If fp were omitted, fp can used as another gp.
4141 BFD_RELOC_NDS32_RELAX_ENTRY
4143 BFD_RELOC_NDS32_GOT_SUFF
4145 BFD_RELOC_NDS32_GOTOFF_SUFF
4147 BFD_RELOC_NDS32_PLT_GOT_SUFF
4149 BFD_RELOC_NDS32_MULCALL_SUFF
4153 BFD_RELOC_NDS32_PTR_COUNT
4155 BFD_RELOC_NDS32_PTR_RESOLVED
4157 BFD_RELOC_NDS32_PLTBLOCK
4159 BFD_RELOC_NDS32_RELAX_REGION_BEGIN
4161 BFD_RELOC_NDS32_RELAX_REGION_END
4163 BFD_RELOC_NDS32_MINUEND
4165 BFD_RELOC_NDS32_SUBTRAHEND
4167 BFD_RELOC_NDS32_DIFF8
4169 BFD_RELOC_NDS32_DIFF16
4171 BFD_RELOC_NDS32_DIFF32
4173 BFD_RELOC_NDS32_DIFF_ULEB128
4175 BFD_RELOC_NDS32_EMPTY
4177 relaxation relative relocation types
4179 BFD_RELOC_NDS32_25_ABS
4181 This is a 25 bit absolute address.
4183 BFD_RELOC_NDS32_DATA
4185 BFD_RELOC_NDS32_TRAN
4187 BFD_RELOC_NDS32_17IFC_PCREL
4189 BFD_RELOC_NDS32_10IFCU_PCREL
4191 For ex9 and ifc using.
4193 BFD_RELOC_NDS32_TPOFF
4195 BFD_RELOC_NDS32_GOTTPOFF
4197 BFD_RELOC_NDS32_TLS_LE_HI20
4199 BFD_RELOC_NDS32_TLS_LE_LO12
4201 BFD_RELOC_NDS32_TLS_LE_20
4203 BFD_RELOC_NDS32_TLS_LE_15S0
4205 BFD_RELOC_NDS32_TLS_LE_15S1
4207 BFD_RELOC_NDS32_TLS_LE_15S2
4209 BFD_RELOC_NDS32_TLS_LE_ADD
4211 BFD_RELOC_NDS32_TLS_LE_LS
4213 BFD_RELOC_NDS32_TLS_IE_HI20
4215 BFD_RELOC_NDS32_TLS_IE_LO12
4217 BFD_RELOC_NDS32_TLS_IE_LO12S2
4219 BFD_RELOC_NDS32_TLS_IEGP_HI20
4221 BFD_RELOC_NDS32_TLS_IEGP_LO12
4223 BFD_RELOC_NDS32_TLS_IEGP_LO12S2
4225 BFD_RELOC_NDS32_TLS_IEGP_LW
4227 BFD_RELOC_NDS32_TLS_DESC
4229 BFD_RELOC_NDS32_TLS_DESC_HI20
4231 BFD_RELOC_NDS32_TLS_DESC_LO12
4233 BFD_RELOC_NDS32_TLS_DESC_20
4235 BFD_RELOC_NDS32_TLS_DESC_SDA17S2
4237 BFD_RELOC_NDS32_TLS_DESC_ADD
4239 BFD_RELOC_NDS32_TLS_DESC_FUNC
4241 BFD_RELOC_NDS32_TLS_DESC_CALL
4243 BFD_RELOC_NDS32_TLS_DESC_MEM
4245 BFD_RELOC_NDS32_REMOVE
4247 BFD_RELOC_NDS32_GROUP
4253 For floating load store relaxation.
4257 BFD_RELOC_V850_9_PCREL
4259 This is a 9-bit reloc
4261 BFD_RELOC_V850_22_PCREL
4263 This is a 22-bit reloc
4266 BFD_RELOC_V850_SDA_16_16_OFFSET
4268 This is a 16 bit offset from the short data area pointer.
4270 BFD_RELOC_V850_SDA_15_16_OFFSET
4272 This is a 16 bit offset (of which only 15 bits are used) from the
4273 short data area pointer.
4275 BFD_RELOC_V850_ZDA_16_16_OFFSET
4277 This is a 16 bit offset from the zero data area pointer.
4279 BFD_RELOC_V850_ZDA_15_16_OFFSET
4281 This is a 16 bit offset (of which only 15 bits are used) from the
4282 zero data area pointer.
4284 BFD_RELOC_V850_TDA_6_8_OFFSET
4286 This is an 8 bit offset (of which only 6 bits are used) from the
4287 tiny data area pointer.
4289 BFD_RELOC_V850_TDA_7_8_OFFSET
4291 This is an 8bit offset (of which only 7 bits are used) from the tiny
4294 BFD_RELOC_V850_TDA_7_7_OFFSET
4296 This is a 7 bit offset from the tiny data area pointer.
4298 BFD_RELOC_V850_TDA_16_16_OFFSET
4300 This is a 16 bit offset from the tiny data area pointer.
4303 BFD_RELOC_V850_TDA_4_5_OFFSET
4305 This is a 5 bit offset (of which only 4 bits are used) from the tiny
4308 BFD_RELOC_V850_TDA_4_4_OFFSET
4310 This is a 4 bit offset from the tiny data area pointer.
4312 BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
4314 This is a 16 bit offset from the short data area pointer, with the
4315 bits placed non-contiguously in the instruction.
4317 BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
4319 This is a 16 bit offset from the zero data area pointer, with the
4320 bits placed non-contiguously in the instruction.
4322 BFD_RELOC_V850_CALLT_6_7_OFFSET
4324 This is a 6 bit offset from the call table base pointer.
4326 BFD_RELOC_V850_CALLT_16_16_OFFSET
4328 This is a 16 bit offset from the call table base pointer.
4330 BFD_RELOC_V850_LONGCALL
4332 Used for relaxing indirect function calls.
4334 BFD_RELOC_V850_LONGJUMP
4336 Used for relaxing indirect jumps.
4338 BFD_RELOC_V850_ALIGN
4340 Used to maintain alignment whilst relaxing.
4342 BFD_RELOC_V850_LO16_SPLIT_OFFSET
4344 This is a variation of BFD_RELOC_LO16 that can be used in v850e ld.bu
4347 BFD_RELOC_V850_16_PCREL
4349 This is a 16-bit reloc.
4351 BFD_RELOC_V850_17_PCREL
4353 This is a 17-bit reloc.
4357 This is a 23-bit reloc.
4359 BFD_RELOC_V850_32_PCREL
4361 This is a 32-bit reloc.
4363 BFD_RELOC_V850_32_ABS
4365 This is a 32-bit reloc.
4367 BFD_RELOC_V850_16_SPLIT_OFFSET
4369 This is a 16-bit reloc.
4371 BFD_RELOC_V850_16_S1
4373 This is a 16-bit reloc.
4375 BFD_RELOC_V850_LO16_S1
4377 Low 16 bits. 16 bit shifted by 1.
4379 BFD_RELOC_V850_CALLT_15_16_OFFSET
4381 This is a 16 bit offset from the call table base pointer.
4383 BFD_RELOC_V850_32_GOTPCREL
4387 BFD_RELOC_V850_16_GOT
4391 BFD_RELOC_V850_32_GOT
4395 BFD_RELOC_V850_22_PLT_PCREL
4399 BFD_RELOC_V850_32_PLT_PCREL
4407 BFD_RELOC_V850_GLOB_DAT
4411 BFD_RELOC_V850_JMP_SLOT
4415 BFD_RELOC_V850_RELATIVE
4419 BFD_RELOC_V850_16_GOTOFF
4423 BFD_RELOC_V850_32_GOTOFF
4438 This is a 8bit DP reloc for the tms320c30, where the most
4439 significant 8 bits of a 24 bit word are placed into the least
4440 significant 8 bits of the opcode.
4443 BFD_RELOC_TIC54X_PARTLS7
4445 This is a 7bit reloc for the tms320c54x, where the least
4446 significant 7 bits of a 16 bit word are placed into the least
4447 significant 7 bits of the opcode.
4450 BFD_RELOC_TIC54X_PARTMS9
4452 This is a 9bit DP reloc for the tms320c54x, where the most
4453 significant 9 bits of a 16 bit word are placed into the least
4454 significant 9 bits of the opcode.
4459 This is an extended address 23-bit reloc for the tms320c54x.
4462 BFD_RELOC_TIC54X_16_OF_23
4464 This is a 16-bit reloc for the tms320c54x, where the least
4465 significant 16 bits of a 23-bit extended address are placed into
4469 BFD_RELOC_TIC54X_MS7_OF_23
4471 This is a reloc for the tms320c54x, where the most
4472 significant 7 bits of a 23-bit extended address are placed into
4476 BFD_RELOC_C6000_PCR_S21
4478 BFD_RELOC_C6000_PCR_S12
4480 BFD_RELOC_C6000_PCR_S10
4482 BFD_RELOC_C6000_PCR_S7
4484 BFD_RELOC_C6000_ABS_S16
4486 BFD_RELOC_C6000_ABS_L16
4488 BFD_RELOC_C6000_ABS_H16
4490 BFD_RELOC_C6000_SBR_U15_B
4492 BFD_RELOC_C6000_SBR_U15_H
4494 BFD_RELOC_C6000_SBR_U15_W
4496 BFD_RELOC_C6000_SBR_S16
4498 BFD_RELOC_C6000_SBR_L16_B
4500 BFD_RELOC_C6000_SBR_L16_H
4502 BFD_RELOC_C6000_SBR_L16_W
4504 BFD_RELOC_C6000_SBR_H16_B
4506 BFD_RELOC_C6000_SBR_H16_H
4508 BFD_RELOC_C6000_SBR_H16_W
4510 BFD_RELOC_C6000_SBR_GOT_U15_W
4512 BFD_RELOC_C6000_SBR_GOT_L16_W
4514 BFD_RELOC_C6000_SBR_GOT_H16_W
4516 BFD_RELOC_C6000_DSBT_INDEX
4518 BFD_RELOC_C6000_PREL31
4520 BFD_RELOC_C6000_COPY
4522 BFD_RELOC_C6000_JUMP_SLOT
4524 BFD_RELOC_C6000_EHTYPE
4526 BFD_RELOC_C6000_PCR_H16
4528 BFD_RELOC_C6000_PCR_L16
4530 BFD_RELOC_C6000_ALIGN
4532 BFD_RELOC_C6000_FPHEAD
4534 BFD_RELOC_C6000_NOCMP
4536 TMS320C6000 relocations.
4541 This is a 48 bit reloc for the FR30 that stores 32 bits.
4545 This is a 32 bit reloc for the FR30 that stores 20 bits split up into
4548 BFD_RELOC_FR30_6_IN_4
4550 This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
4553 BFD_RELOC_FR30_8_IN_8
4555 This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
4558 BFD_RELOC_FR30_9_IN_8
4560 This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
4563 BFD_RELOC_FR30_10_IN_8
4565 This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
4568 BFD_RELOC_FR30_9_PCREL
4570 This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
4571 short offset into 8 bits.
4573 BFD_RELOC_FR30_12_PCREL
4575 This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
4576 short offset into 11 bits.
4579 BFD_RELOC_MCORE_PCREL_IMM8BY4
4581 BFD_RELOC_MCORE_PCREL_IMM11BY2
4583 BFD_RELOC_MCORE_PCREL_IMM4BY2
4585 BFD_RELOC_MCORE_PCREL_32
4587 BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
4591 Motorola Mcore relocations.
4600 BFD_RELOC_MEP_PCREL8A2
4602 BFD_RELOC_MEP_PCREL12A2
4604 BFD_RELOC_MEP_PCREL17A2
4606 BFD_RELOC_MEP_PCREL24A2
4608 BFD_RELOC_MEP_PCABS24A2
4620 BFD_RELOC_MEP_TPREL7
4622 BFD_RELOC_MEP_TPREL7A2
4624 BFD_RELOC_MEP_TPREL7A4
4626 BFD_RELOC_MEP_UIMM24
4628 BFD_RELOC_MEP_ADDR24A4
4630 BFD_RELOC_MEP_GNU_VTINHERIT
4632 BFD_RELOC_MEP_GNU_VTENTRY
4634 Toshiba Media Processor Relocations.
4638 BFD_RELOC_METAG_HIADDR16
4640 BFD_RELOC_METAG_LOADDR16
4642 BFD_RELOC_METAG_RELBRANCH
4644 BFD_RELOC_METAG_GETSETOFF
4646 BFD_RELOC_METAG_HIOG
4648 BFD_RELOC_METAG_LOOG
4650 BFD_RELOC_METAG_REL8
4652 BFD_RELOC_METAG_REL16
4654 BFD_RELOC_METAG_HI16_GOTOFF
4656 BFD_RELOC_METAG_LO16_GOTOFF
4658 BFD_RELOC_METAG_GETSET_GOTOFF
4660 BFD_RELOC_METAG_GETSET_GOT
4662 BFD_RELOC_METAG_HI16_GOTPC
4664 BFD_RELOC_METAG_LO16_GOTPC
4666 BFD_RELOC_METAG_HI16_PLT
4668 BFD_RELOC_METAG_LO16_PLT
4670 BFD_RELOC_METAG_RELBRANCH_PLT
4672 BFD_RELOC_METAG_GOTOFF
4676 BFD_RELOC_METAG_COPY
4678 BFD_RELOC_METAG_JMP_SLOT
4680 BFD_RELOC_METAG_RELATIVE
4682 BFD_RELOC_METAG_GLOB_DAT
4684 BFD_RELOC_METAG_TLS_GD
4686 BFD_RELOC_METAG_TLS_LDM
4688 BFD_RELOC_METAG_TLS_LDO_HI16
4690 BFD_RELOC_METAG_TLS_LDO_LO16
4692 BFD_RELOC_METAG_TLS_LDO
4694 BFD_RELOC_METAG_TLS_IE
4696 BFD_RELOC_METAG_TLS_IENONPIC
4698 BFD_RELOC_METAG_TLS_IENONPIC_HI16
4700 BFD_RELOC_METAG_TLS_IENONPIC_LO16
4702 BFD_RELOC_METAG_TLS_TPOFF
4704 BFD_RELOC_METAG_TLS_DTPMOD
4706 BFD_RELOC_METAG_TLS_DTPOFF
4708 BFD_RELOC_METAG_TLS_LE
4710 BFD_RELOC_METAG_TLS_LE_HI16
4712 BFD_RELOC_METAG_TLS_LE_LO16
4714 Imagination Technologies Meta relocations.
4719 BFD_RELOC_MMIX_GETA_1
4721 BFD_RELOC_MMIX_GETA_2
4723 BFD_RELOC_MMIX_GETA_3
4725 These are relocations for the GETA instruction.
4727 BFD_RELOC_MMIX_CBRANCH
4729 BFD_RELOC_MMIX_CBRANCH_J
4731 BFD_RELOC_MMIX_CBRANCH_1
4733 BFD_RELOC_MMIX_CBRANCH_2
4735 BFD_RELOC_MMIX_CBRANCH_3
4737 These are relocations for a conditional branch instruction.
4739 BFD_RELOC_MMIX_PUSHJ
4741 BFD_RELOC_MMIX_PUSHJ_1
4743 BFD_RELOC_MMIX_PUSHJ_2
4745 BFD_RELOC_MMIX_PUSHJ_3
4747 BFD_RELOC_MMIX_PUSHJ_STUBBABLE
4749 These are relocations for the PUSHJ instruction.
4753 BFD_RELOC_MMIX_JMP_1
4755 BFD_RELOC_MMIX_JMP_2
4757 BFD_RELOC_MMIX_JMP_3
4759 These are relocations for the JMP instruction.
4761 BFD_RELOC_MMIX_ADDR19
4763 This is a relocation for a relative address as in a GETA instruction or
4766 BFD_RELOC_MMIX_ADDR27
4768 This is a relocation for a relative address as in a JMP instruction.
4770 BFD_RELOC_MMIX_REG_OR_BYTE
4772 This is a relocation for an instruction field that may be a general
4773 register or a value 0..255.
4777 This is a relocation for an instruction field that may be a general
4780 BFD_RELOC_MMIX_BASE_PLUS_OFFSET
4782 This is a relocation for two instruction fields holding a register and
4783 an offset, the equivalent of the relocation.
4785 BFD_RELOC_MMIX_LOCAL
4787 This relocation is an assertion that the expression is not allocated as
4788 a global register. It does not modify contents.
4791 BFD_RELOC_AVR_7_PCREL
4793 This is a 16 bit reloc for the AVR that stores 8 bit pc relative
4794 short offset into 7 bits.
4796 BFD_RELOC_AVR_13_PCREL
4798 This is a 16 bit reloc for the AVR that stores 13 bit pc relative
4799 short offset into 12 bits.
4803 This is a 16 bit reloc for the AVR that stores 17 bit value (usually
4804 program memory address) into 16 bits.
4806 BFD_RELOC_AVR_LO8_LDI
4808 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4809 data memory address) into 8 bit immediate value of LDI insn.
4811 BFD_RELOC_AVR_HI8_LDI
4813 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4814 of data memory address) into 8 bit immediate value of LDI insn.
4816 BFD_RELOC_AVR_HH8_LDI
4818 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4819 of program memory address) into 8 bit immediate value of LDI insn.
4821 BFD_RELOC_AVR_MS8_LDI
4823 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4824 of 32 bit value) into 8 bit immediate value of LDI insn.
4826 BFD_RELOC_AVR_LO8_LDI_NEG
4828 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4829 (usually data memory address) into 8 bit immediate value of SUBI insn.
4831 BFD_RELOC_AVR_HI8_LDI_NEG
4833 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4834 (high 8 bit of data memory address) into 8 bit immediate value of
4837 BFD_RELOC_AVR_HH8_LDI_NEG
4839 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4840 (most high 8 bit of program memory address) into 8 bit immediate value
4841 of LDI or SUBI insn.
4843 BFD_RELOC_AVR_MS8_LDI_NEG
4845 This is a 16 bit reloc for the AVR that stores negated 8 bit value (msb
4846 of 32 bit value) into 8 bit immediate value of LDI insn.
4848 BFD_RELOC_AVR_LO8_LDI_PM
4850 This is a 16 bit reloc for the AVR that stores 8 bit value (usually
4851 command address) into 8 bit immediate value of LDI insn.
4853 BFD_RELOC_AVR_LO8_LDI_GS
4855 This is a 16 bit reloc for the AVR that stores 8 bit value
4856 (command address) into 8 bit immediate value of LDI insn. If the address
4857 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4860 BFD_RELOC_AVR_HI8_LDI_PM
4862 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4863 of command address) into 8 bit immediate value of LDI insn.
4865 BFD_RELOC_AVR_HI8_LDI_GS
4867 This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
4868 of command address) into 8 bit immediate value of LDI insn. If the address
4869 is beyond the 128k boundary, the linker inserts a jump stub for this reloc
4872 BFD_RELOC_AVR_HH8_LDI_PM
4874 This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
4875 of command address) into 8 bit immediate value of LDI insn.
4877 BFD_RELOC_AVR_LO8_LDI_PM_NEG
4879 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4880 (usually command address) into 8 bit immediate value of SUBI insn.
4882 BFD_RELOC_AVR_HI8_LDI_PM_NEG
4884 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4885 (high 8 bit of 16 bit command address) into 8 bit immediate value
4888 BFD_RELOC_AVR_HH8_LDI_PM_NEG
4890 This is a 16 bit reloc for the AVR that stores negated 8 bit value
4891 (high 6 bit of 22 bit command address) into 8 bit immediate
4896 This is a 32 bit reloc for the AVR that stores 23 bit value
4901 This is a 16 bit reloc for the AVR that stores all needed bits
4902 for absolute addressing with ldi with overflow check to linktime
4906 This is a 6 bit reloc for the AVR that stores offset for ldd/std
4909 BFD_RELOC_AVR_6_ADIW
4911 This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
4916 This is a 8 bit reloc for the AVR that stores bits 0..7 of a symbol
4917 in .byte lo8(symbol)
4921 This is a 8 bit reloc for the AVR that stores bits 8..15 of a symbol
4922 in .byte hi8(symbol)
4926 This is a 8 bit reloc for the AVR that stores bits 16..23 of a symbol
4927 in .byte hlo8(symbol)
4931 BFD_RELOC_AVR_DIFF16
4933 BFD_RELOC_AVR_DIFF32
4935 AVR relocations to mark the difference of two local symbols.
4936 These are only needed to support linker relaxation and can be ignored
4937 when not relaxing. The field is set to the value of the difference
4938 assuming no relaxation. The relocation encodes the position of the
4939 second symbol so the linker can determine whether to adjust the field
4942 BFD_RELOC_AVR_LDS_STS_16
4944 This is a 7 bit reloc for the AVR that stores SRAM address for 16bit
4945 lds and sts instructions supported only tiny core.
4949 This is a 6 bit reloc for the AVR that stores an I/O register
4950 number for the IN and OUT instructions
4954 This is a 5 bit reloc for the AVR that stores an I/O register
4955 number for the SBIC, SBIS, SBI and CBI instructions
4958 BFD_RELOC_RISCV_HI20
4960 BFD_RELOC_RISCV_PCREL_HI20
4962 BFD_RELOC_RISCV_PCREL_LO12_I
4964 BFD_RELOC_RISCV_PCREL_LO12_S
4966 BFD_RELOC_RISCV_LO12_I
4968 BFD_RELOC_RISCV_LO12_S
4970 BFD_RELOC_RISCV_GPREL12_I
4972 BFD_RELOC_RISCV_GPREL12_S
4974 BFD_RELOC_RISCV_TPREL_HI20
4976 BFD_RELOC_RISCV_TPREL_LO12_I
4978 BFD_RELOC_RISCV_TPREL_LO12_S
4980 BFD_RELOC_RISCV_TPREL_ADD
4982 BFD_RELOC_RISCV_CALL
4984 BFD_RELOC_RISCV_CALL_PLT
4986 BFD_RELOC_RISCV_ADD8
4988 BFD_RELOC_RISCV_ADD16
4990 BFD_RELOC_RISCV_ADD32
4992 BFD_RELOC_RISCV_ADD64
4994 BFD_RELOC_RISCV_SUB8
4996 BFD_RELOC_RISCV_SUB16
4998 BFD_RELOC_RISCV_SUB32
5000 BFD_RELOC_RISCV_SUB64
5002 BFD_RELOC_RISCV_GOT_HI20
5004 BFD_RELOC_RISCV_TLS_GOT_HI20
5006 BFD_RELOC_RISCV_TLS_GD_HI20
5010 BFD_RELOC_RISCV_TLS_DTPMOD32
5012 BFD_RELOC_RISCV_TLS_DTPREL32
5014 BFD_RELOC_RISCV_TLS_DTPMOD64
5016 BFD_RELOC_RISCV_TLS_DTPREL64
5018 BFD_RELOC_RISCV_TLS_TPREL32
5020 BFD_RELOC_RISCV_TLS_TPREL64
5022 BFD_RELOC_RISCV_ALIGN
5024 BFD_RELOC_RISCV_RVC_BRANCH
5026 BFD_RELOC_RISCV_RVC_JUMP
5028 BFD_RELOC_RISCV_RVC_LUI
5030 BFD_RELOC_RISCV_GPREL_I
5032 BFD_RELOC_RISCV_GPREL_S
5034 BFD_RELOC_RISCV_TPREL_I
5036 BFD_RELOC_RISCV_TPREL_S
5038 BFD_RELOC_RISCV_RELAX
5042 BFD_RELOC_RISCV_SUB6
5044 BFD_RELOC_RISCV_SET6
5046 BFD_RELOC_RISCV_SET8
5048 BFD_RELOC_RISCV_SET16
5050 BFD_RELOC_RISCV_SET32
5052 BFD_RELOC_RISCV_32_PCREL
5059 BFD_RELOC_RL78_NEG16
5061 BFD_RELOC_RL78_NEG24
5063 BFD_RELOC_RL78_NEG32
5065 BFD_RELOC_RL78_16_OP
5067 BFD_RELOC_RL78_24_OP
5069 BFD_RELOC_RL78_32_OP
5077 BFD_RELOC_RL78_DIR3U_PCREL
5081 BFD_RELOC_RL78_GPRELB
5083 BFD_RELOC_RL78_GPRELW
5085 BFD_RELOC_RL78_GPRELL
5089 BFD_RELOC_RL78_OP_SUBTRACT
5091 BFD_RELOC_RL78_OP_NEG
5093 BFD_RELOC_RL78_OP_AND
5095 BFD_RELOC_RL78_OP_SHRA
5099 BFD_RELOC_RL78_ABS16
5101 BFD_RELOC_RL78_ABS16_REV
5103 BFD_RELOC_RL78_ABS32
5105 BFD_RELOC_RL78_ABS32_REV
5107 BFD_RELOC_RL78_ABS16U
5109 BFD_RELOC_RL78_ABS16UW
5111 BFD_RELOC_RL78_ABS16UL
5113 BFD_RELOC_RL78_RELAX
5123 BFD_RELOC_RL78_SADDR
5125 Renesas RL78 Relocations.
5148 BFD_RELOC_RX_DIR3U_PCREL
5160 BFD_RELOC_RX_OP_SUBTRACT
5168 BFD_RELOC_RX_ABS16_REV
5172 BFD_RELOC_RX_ABS32_REV
5176 BFD_RELOC_RX_ABS16UW
5178 BFD_RELOC_RX_ABS16UL
5182 Renesas RX Relocations.
5195 32 bit PC relative PLT address.
5199 Copy symbol at runtime.
5201 BFD_RELOC_390_GLOB_DAT
5205 BFD_RELOC_390_JMP_SLOT
5209 BFD_RELOC_390_RELATIVE
5211 Adjust by program base.
5215 32 bit PC relative offset to GOT.
5221 BFD_RELOC_390_PC12DBL
5223 PC relative 12 bit shifted by 1.
5225 BFD_RELOC_390_PLT12DBL
5227 12 bit PC rel. PLT shifted by 1.
5229 BFD_RELOC_390_PC16DBL
5231 PC relative 16 bit shifted by 1.
5233 BFD_RELOC_390_PLT16DBL
5235 16 bit PC rel. PLT shifted by 1.
5237 BFD_RELOC_390_PC24DBL
5239 PC relative 24 bit shifted by 1.
5241 BFD_RELOC_390_PLT24DBL
5243 24 bit PC rel. PLT shifted by 1.
5245 BFD_RELOC_390_PC32DBL
5247 PC relative 32 bit shifted by 1.
5249 BFD_RELOC_390_PLT32DBL
5251 32 bit PC rel. PLT shifted by 1.
5253 BFD_RELOC_390_GOTPCDBL
5255 32 bit PC rel. GOT shifted by 1.
5263 64 bit PC relative PLT address.
5265 BFD_RELOC_390_GOTENT
5267 32 bit rel. offset to GOT entry.
5269 BFD_RELOC_390_GOTOFF64
5271 64 bit offset to GOT.
5273 BFD_RELOC_390_GOTPLT12
5275 12-bit offset to symbol-entry within GOT, with PLT handling.
5277 BFD_RELOC_390_GOTPLT16
5279 16-bit offset to symbol-entry within GOT, with PLT handling.
5281 BFD_RELOC_390_GOTPLT32
5283 32-bit offset to symbol-entry within GOT, with PLT handling.
5285 BFD_RELOC_390_GOTPLT64
5287 64-bit offset to symbol-entry within GOT, with PLT handling.
5289 BFD_RELOC_390_GOTPLTENT
5291 32-bit rel. offset to symbol-entry within GOT, with PLT handling.
5293 BFD_RELOC_390_PLTOFF16
5295 16-bit rel. offset from the GOT to a PLT entry.
5297 BFD_RELOC_390_PLTOFF32
5299 32-bit rel. offset from the GOT to a PLT entry.
5301 BFD_RELOC_390_PLTOFF64
5303 64-bit rel. offset from the GOT to a PLT entry.
5306 BFD_RELOC_390_TLS_LOAD
5308 BFD_RELOC_390_TLS_GDCALL
5310 BFD_RELOC_390_TLS_LDCALL
5312 BFD_RELOC_390_TLS_GD32
5314 BFD_RELOC_390_TLS_GD64
5316 BFD_RELOC_390_TLS_GOTIE12
5318 BFD_RELOC_390_TLS_GOTIE32
5320 BFD_RELOC_390_TLS_GOTIE64
5322 BFD_RELOC_390_TLS_LDM32
5324 BFD_RELOC_390_TLS_LDM64
5326 BFD_RELOC_390_TLS_IE32
5328 BFD_RELOC_390_TLS_IE64
5330 BFD_RELOC_390_TLS_IEENT
5332 BFD_RELOC_390_TLS_LE32
5334 BFD_RELOC_390_TLS_LE64
5336 BFD_RELOC_390_TLS_LDO32
5338 BFD_RELOC_390_TLS_LDO64
5340 BFD_RELOC_390_TLS_DTPMOD
5342 BFD_RELOC_390_TLS_DTPOFF
5344 BFD_RELOC_390_TLS_TPOFF
5346 s390 tls relocations.
5353 BFD_RELOC_390_GOTPLT20
5355 BFD_RELOC_390_TLS_GOTIE20
5357 Long displacement extension.
5360 BFD_RELOC_390_IRELATIVE
5362 STT_GNU_IFUNC relocation.
5365 BFD_RELOC_SCORE_GPREL15
5368 Low 16 bit for load/store
5370 BFD_RELOC_SCORE_DUMMY2
5374 This is a 24-bit reloc with the right 1 bit assumed to be 0
5376 BFD_RELOC_SCORE_BRANCH
5378 This is a 19-bit reloc with the right 1 bit assumed to be 0
5380 BFD_RELOC_SCORE_IMM30
5382 This is a 32-bit reloc for 48-bit instructions.
5384 BFD_RELOC_SCORE_IMM32
5386 This is a 32-bit reloc for 48-bit instructions.
5388 BFD_RELOC_SCORE16_JMP
5390 This is a 11-bit reloc with the right 1 bit assumed to be 0
5392 BFD_RELOC_SCORE16_BRANCH
5394 This is a 8-bit reloc with the right 1 bit assumed to be 0
5396 BFD_RELOC_SCORE_BCMP
5398 This is a 9-bit reloc with the right 1 bit assumed to be 0
5400 BFD_RELOC_SCORE_GOT15
5402 BFD_RELOC_SCORE_GOT_LO16
5404 BFD_RELOC_SCORE_CALL15
5406 BFD_RELOC_SCORE_DUMMY_HI16
5408 Undocumented Score relocs
5413 Scenix IP2K - 9-bit register number / data address
5417 Scenix IP2K - 4-bit register/data bank number
5419 BFD_RELOC_IP2K_ADDR16CJP
5421 Scenix IP2K - low 13 bits of instruction word address
5423 BFD_RELOC_IP2K_PAGE3
5425 Scenix IP2K - high 3 bits of instruction word address
5427 BFD_RELOC_IP2K_LO8DATA
5429 BFD_RELOC_IP2K_HI8DATA
5431 BFD_RELOC_IP2K_EX8DATA
5433 Scenix IP2K - ext/low/high 8 bits of data address
5435 BFD_RELOC_IP2K_LO8INSN
5437 BFD_RELOC_IP2K_HI8INSN
5439 Scenix IP2K - low/high 8 bits of instruction word address
5441 BFD_RELOC_IP2K_PC_SKIP
5443 Scenix IP2K - even/odd PC modifier to modify snb pcl.0
5447 Scenix IP2K - 16 bit word address in text section.
5449 BFD_RELOC_IP2K_FR_OFFSET
5451 Scenix IP2K - 7-bit sp or dp offset
5453 BFD_RELOC_VPE4KMATH_DATA
5455 BFD_RELOC_VPE4KMATH_INSN
5457 Scenix VPE4K coprocessor - data/insn-space addressing
5460 BFD_RELOC_VTABLE_INHERIT
5462 BFD_RELOC_VTABLE_ENTRY
5464 These two relocations are used by the linker to determine which of
5465 the entries in a C++ virtual function table are actually used. When
5466 the --gc-sections option is given, the linker will zero out the entries
5467 that are not used, so that the code for those functions need not be
5468 included in the output.
5470 VTABLE_INHERIT is a zero-space relocation used to describe to the
5471 linker the inheritance tree of a C++ virtual function table. The
5472 relocation's symbol should be the parent class' vtable, and the
5473 relocation should be located at the child vtable.
5475 VTABLE_ENTRY is a zero-space relocation that describes the use of a
5476 virtual function table entry. The reloc's symbol should refer to the
5477 table of the class mentioned in the code. Off of that base, an offset
5478 describes the entry that is being used. For Rela hosts, this offset
5479 is stored in the reloc's addend. For Rel hosts, we are forced to put
5480 this offset in the reloc's section offset.
5483 BFD_RELOC_IA64_IMM14
5485 BFD_RELOC_IA64_IMM22
5487 BFD_RELOC_IA64_IMM64
5489 BFD_RELOC_IA64_DIR32MSB
5491 BFD_RELOC_IA64_DIR32LSB
5493 BFD_RELOC_IA64_DIR64MSB
5495 BFD_RELOC_IA64_DIR64LSB
5497 BFD_RELOC_IA64_GPREL22
5499 BFD_RELOC_IA64_GPREL64I
5501 BFD_RELOC_IA64_GPREL32MSB
5503 BFD_RELOC_IA64_GPREL32LSB
5505 BFD_RELOC_IA64_GPREL64MSB
5507 BFD_RELOC_IA64_GPREL64LSB
5509 BFD_RELOC_IA64_LTOFF22
5511 BFD_RELOC_IA64_LTOFF64I
5513 BFD_RELOC_IA64_PLTOFF22
5515 BFD_RELOC_IA64_PLTOFF64I
5517 BFD_RELOC_IA64_PLTOFF64MSB
5519 BFD_RELOC_IA64_PLTOFF64LSB
5521 BFD_RELOC_IA64_FPTR64I
5523 BFD_RELOC_IA64_FPTR32MSB
5525 BFD_RELOC_IA64_FPTR32LSB
5527 BFD_RELOC_IA64_FPTR64MSB
5529 BFD_RELOC_IA64_FPTR64LSB
5531 BFD_RELOC_IA64_PCREL21B
5533 BFD_RELOC_IA64_PCREL21BI
5535 BFD_RELOC_IA64_PCREL21M
5537 BFD_RELOC_IA64_PCREL21F
5539 BFD_RELOC_IA64_PCREL22
5541 BFD_RELOC_IA64_PCREL60B
5543 BFD_RELOC_IA64_PCREL64I
5545 BFD_RELOC_IA64_PCREL32MSB
5547 BFD_RELOC_IA64_PCREL32LSB
5549 BFD_RELOC_IA64_PCREL64MSB
5551 BFD_RELOC_IA64_PCREL64LSB
5553 BFD_RELOC_IA64_LTOFF_FPTR22
5555 BFD_RELOC_IA64_LTOFF_FPTR64I
5557 BFD_RELOC_IA64_LTOFF_FPTR32MSB
5559 BFD_RELOC_IA64_LTOFF_FPTR32LSB
5561 BFD_RELOC_IA64_LTOFF_FPTR64MSB
5563 BFD_RELOC_IA64_LTOFF_FPTR64LSB
5565 BFD_RELOC_IA64_SEGREL32MSB
5567 BFD_RELOC_IA64_SEGREL32LSB
5569 BFD_RELOC_IA64_SEGREL64MSB
5571 BFD_RELOC_IA64_SEGREL64LSB
5573 BFD_RELOC_IA64_SECREL32MSB
5575 BFD_RELOC_IA64_SECREL32LSB
5577 BFD_RELOC_IA64_SECREL64MSB
5579 BFD_RELOC_IA64_SECREL64LSB
5581 BFD_RELOC_IA64_REL32MSB
5583 BFD_RELOC_IA64_REL32LSB
5585 BFD_RELOC_IA64_REL64MSB
5587 BFD_RELOC_IA64_REL64LSB
5589 BFD_RELOC_IA64_LTV32MSB
5591 BFD_RELOC_IA64_LTV32LSB
5593 BFD_RELOC_IA64_LTV64MSB
5595 BFD_RELOC_IA64_LTV64LSB
5597 BFD_RELOC_IA64_IPLTMSB
5599 BFD_RELOC_IA64_IPLTLSB
5603 BFD_RELOC_IA64_LTOFF22X
5605 BFD_RELOC_IA64_LDXMOV
5607 BFD_RELOC_IA64_TPREL14
5609 BFD_RELOC_IA64_TPREL22
5611 BFD_RELOC_IA64_TPREL64I
5613 BFD_RELOC_IA64_TPREL64MSB
5615 BFD_RELOC_IA64_TPREL64LSB
5617 BFD_RELOC_IA64_LTOFF_TPREL22
5619 BFD_RELOC_IA64_DTPMOD64MSB
5621 BFD_RELOC_IA64_DTPMOD64LSB
5623 BFD_RELOC_IA64_LTOFF_DTPMOD22
5625 BFD_RELOC_IA64_DTPREL14
5627 BFD_RELOC_IA64_DTPREL22
5629 BFD_RELOC_IA64_DTPREL64I
5631 BFD_RELOC_IA64_DTPREL32MSB
5633 BFD_RELOC_IA64_DTPREL32LSB
5635 BFD_RELOC_IA64_DTPREL64MSB
5637 BFD_RELOC_IA64_DTPREL64LSB
5639 BFD_RELOC_IA64_LTOFF_DTPREL22
5641 Intel IA64 Relocations.
5644 BFD_RELOC_M68HC11_HI8
5646 Motorola 68HC11 reloc.
5647 This is the 8 bit high part of an absolute address.
5649 BFD_RELOC_M68HC11_LO8
5651 Motorola 68HC11 reloc.
5652 This is the 8 bit low part of an absolute address.
5654 BFD_RELOC_M68HC11_3B
5656 Motorola 68HC11 reloc.
5657 This is the 3 bit of a value.
5659 BFD_RELOC_M68HC11_RL_JUMP
5661 Motorola 68HC11 reloc.
5662 This reloc marks the beginning of a jump/call instruction.
5663 It is used for linker relaxation to correctly identify beginning
5664 of instruction and change some branches to use PC-relative
5667 BFD_RELOC_M68HC11_RL_GROUP
5669 Motorola 68HC11 reloc.
5670 This reloc marks a group of several instructions that gcc generates
5671 and for which the linker relaxation pass can modify and/or remove
5674 BFD_RELOC_M68HC11_LO16
5676 Motorola 68HC11 reloc.
5677 This is the 16-bit lower part of an address. It is used for 'call'
5678 instruction to specify the symbol address without any special
5679 transformation (due to memory bank window).
5681 BFD_RELOC_M68HC11_PAGE
5683 Motorola 68HC11 reloc.
5684 This is a 8-bit reloc that specifies the page number of an address.
5685 It is used by 'call' instruction to specify the page number of
5688 BFD_RELOC_M68HC11_24
5690 Motorola 68HC11 reloc.
5691 This is a 24-bit reloc that represents the address with a 16-bit
5692 value and a 8-bit page number. The symbol address is transformed
5693 to follow the 16K memory bank of 68HC12 (seen as mapped in the window).
5695 BFD_RELOC_M68HC12_5B
5697 Motorola 68HC12 reloc.
5698 This is the 5 bits of a value.
5700 BFD_RELOC_XGATE_RL_JUMP
5702 Freescale XGATE reloc.
5703 This reloc marks the beginning of a bra/jal instruction.
5705 BFD_RELOC_XGATE_RL_GROUP
5707 Freescale XGATE reloc.
5708 This reloc marks a group of several instructions that gcc generates
5709 and for which the linker relaxation pass can modify and/or remove
5712 BFD_RELOC_XGATE_LO16
5714 Freescale XGATE reloc.
5715 This is the 16-bit lower part of an address. It is used for the '16-bit'
5718 BFD_RELOC_XGATE_GPAGE
5720 Freescale XGATE reloc.
5724 Freescale XGATE reloc.
5726 BFD_RELOC_XGATE_PCREL_9
5728 Freescale XGATE reloc.
5729 This is a 9-bit pc-relative reloc.
5731 BFD_RELOC_XGATE_PCREL_10
5733 Freescale XGATE reloc.
5734 This is a 10-bit pc-relative reloc.
5736 BFD_RELOC_XGATE_IMM8_LO
5738 Freescale XGATE reloc.
5739 This is the 16-bit lower part of an address. It is used for the '16-bit'
5742 BFD_RELOC_XGATE_IMM8_HI
5744 Freescale XGATE reloc.
5745 This is the 16-bit higher part of an address. It is used for the '16-bit'
5748 BFD_RELOC_XGATE_IMM3
5750 Freescale XGATE reloc.
5751 This is a 3-bit pc-relative reloc.
5753 BFD_RELOC_XGATE_IMM4
5755 Freescale XGATE reloc.
5756 This is a 4-bit pc-relative reloc.
5758 BFD_RELOC_XGATE_IMM5
5760 Freescale XGATE reloc.
5761 This is a 5-bit pc-relative reloc.
5763 BFD_RELOC_M68HC12_9B
5765 Motorola 68HC12 reloc.
5766 This is the 9 bits of a value.
5768 BFD_RELOC_M68HC12_16B
5770 Motorola 68HC12 reloc.
5771 This is the 16 bits of a value.
5773 BFD_RELOC_M68HC12_9_PCREL
5775 Motorola 68HC12/XGATE reloc.
5776 This is a PCREL9 branch.
5778 BFD_RELOC_M68HC12_10_PCREL
5780 Motorola 68HC12/XGATE reloc.
5781 This is a PCREL10 branch.
5783 BFD_RELOC_M68HC12_LO8XG
5785 Motorola 68HC12/XGATE reloc.
5786 This is the 8 bit low part of an absolute address and immediately precedes
5787 a matching HI8XG part.
5789 BFD_RELOC_M68HC12_HI8XG
5791 Motorola 68HC12/XGATE reloc.
5792 This is the 8 bit high part of an absolute address and immediately follows
5793 a matching LO8XG part.
5795 BFD_RELOC_S12Z_15_PCREL
5797 Freescale S12Z reloc.
5798 This is a 15 bit relative address. If the most significant bits are all zero
5799 then it may be truncated to 8 bits.
5804 BFD_RELOC_CR16_NUM16
5806 BFD_RELOC_CR16_NUM32
5808 BFD_RELOC_CR16_NUM32a
5810 BFD_RELOC_CR16_REGREL0
5812 BFD_RELOC_CR16_REGREL4
5814 BFD_RELOC_CR16_REGREL4a
5816 BFD_RELOC_CR16_REGREL14
5818 BFD_RELOC_CR16_REGREL14a
5820 BFD_RELOC_CR16_REGREL16
5822 BFD_RELOC_CR16_REGREL20
5824 BFD_RELOC_CR16_REGREL20a
5826 BFD_RELOC_CR16_ABS20
5828 BFD_RELOC_CR16_ABS24
5834 BFD_RELOC_CR16_IMM16
5836 BFD_RELOC_CR16_IMM20
5838 BFD_RELOC_CR16_IMM24
5840 BFD_RELOC_CR16_IMM32
5842 BFD_RELOC_CR16_IMM32a
5844 BFD_RELOC_CR16_DISP4
5846 BFD_RELOC_CR16_DISP8
5848 BFD_RELOC_CR16_DISP16
5850 BFD_RELOC_CR16_DISP20
5852 BFD_RELOC_CR16_DISP24
5854 BFD_RELOC_CR16_DISP24a
5856 BFD_RELOC_CR16_SWITCH8
5858 BFD_RELOC_CR16_SWITCH16
5860 BFD_RELOC_CR16_SWITCH32
5862 BFD_RELOC_CR16_GOT_REGREL20
5864 BFD_RELOC_CR16_GOTC_REGREL20
5866 BFD_RELOC_CR16_GLOB_DAT
5868 NS CR16 Relocations.
5875 BFD_RELOC_CRX_REL8_CMP
5883 BFD_RELOC_CRX_REGREL12
5885 BFD_RELOC_CRX_REGREL22
5887 BFD_RELOC_CRX_REGREL28
5889 BFD_RELOC_CRX_REGREL32
5905 BFD_RELOC_CRX_SWITCH8
5907 BFD_RELOC_CRX_SWITCH16
5909 BFD_RELOC_CRX_SWITCH32
5914 BFD_RELOC_CRIS_BDISP8
5916 BFD_RELOC_CRIS_UNSIGNED_5
5918 BFD_RELOC_CRIS_SIGNED_6
5920 BFD_RELOC_CRIS_UNSIGNED_6
5922 BFD_RELOC_CRIS_SIGNED_8
5924 BFD_RELOC_CRIS_UNSIGNED_8
5926 BFD_RELOC_CRIS_SIGNED_16
5928 BFD_RELOC_CRIS_UNSIGNED_16
5930 BFD_RELOC_CRIS_LAPCQ_OFFSET
5932 BFD_RELOC_CRIS_UNSIGNED_4
5934 These relocs are only used within the CRIS assembler. They are not
5935 (at present) written to any object files.
5939 BFD_RELOC_CRIS_GLOB_DAT
5941 BFD_RELOC_CRIS_JUMP_SLOT
5943 BFD_RELOC_CRIS_RELATIVE
5945 Relocs used in ELF shared libraries for CRIS.
5947 BFD_RELOC_CRIS_32_GOT
5949 32-bit offset to symbol-entry within GOT.
5951 BFD_RELOC_CRIS_16_GOT
5953 16-bit offset to symbol-entry within GOT.
5955 BFD_RELOC_CRIS_32_GOTPLT
5957 32-bit offset to symbol-entry within GOT, with PLT handling.
5959 BFD_RELOC_CRIS_16_GOTPLT
5961 16-bit offset to symbol-entry within GOT, with PLT handling.
5963 BFD_RELOC_CRIS_32_GOTREL
5965 32-bit offset to symbol, relative to GOT.
5967 BFD_RELOC_CRIS_32_PLT_GOTREL
5969 32-bit offset to symbol with PLT entry, relative to GOT.
5971 BFD_RELOC_CRIS_32_PLT_PCREL
5973 32-bit offset to symbol with PLT entry, relative to this relocation.
5976 BFD_RELOC_CRIS_32_GOT_GD
5978 BFD_RELOC_CRIS_16_GOT_GD
5980 BFD_RELOC_CRIS_32_GD
5984 BFD_RELOC_CRIS_32_DTPREL
5986 BFD_RELOC_CRIS_16_DTPREL
5988 BFD_RELOC_CRIS_32_GOT_TPREL
5990 BFD_RELOC_CRIS_16_GOT_TPREL
5992 BFD_RELOC_CRIS_32_TPREL
5994 BFD_RELOC_CRIS_16_TPREL
5996 BFD_RELOC_CRIS_DTPMOD
5998 BFD_RELOC_CRIS_32_IE
6000 Relocs used in TLS code for CRIS.
6003 BFD_RELOC_OR1K_REL_26
6005 BFD_RELOC_OR1K_SLO16
6007 BFD_RELOC_OR1K_PCREL_PG21
6011 BFD_RELOC_OR1K_SLO13
6013 BFD_RELOC_OR1K_GOTPC_HI16
6015 BFD_RELOC_OR1K_GOTPC_LO16
6017 BFD_RELOC_OR1K_GOT_AHI16
6019 BFD_RELOC_OR1K_GOT16
6021 BFD_RELOC_OR1K_GOT_PG21
6023 BFD_RELOC_OR1K_GOT_LO13
6025 BFD_RELOC_OR1K_PLT26
6027 BFD_RELOC_OR1K_PLTA26
6029 BFD_RELOC_OR1K_GOTOFF_SLO16
6033 BFD_RELOC_OR1K_GLOB_DAT
6035 BFD_RELOC_OR1K_JMP_SLOT
6037 BFD_RELOC_OR1K_RELATIVE
6039 BFD_RELOC_OR1K_TLS_GD_HI16
6041 BFD_RELOC_OR1K_TLS_GD_LO16
6043 BFD_RELOC_OR1K_TLS_GD_PG21
6045 BFD_RELOC_OR1K_TLS_GD_LO13
6047 BFD_RELOC_OR1K_TLS_LDM_HI16
6049 BFD_RELOC_OR1K_TLS_LDM_LO16
6051 BFD_RELOC_OR1K_TLS_LDM_PG21
6053 BFD_RELOC_OR1K_TLS_LDM_LO13
6055 BFD_RELOC_OR1K_TLS_LDO_HI16
6057 BFD_RELOC_OR1K_TLS_LDO_LO16
6059 BFD_RELOC_OR1K_TLS_IE_HI16
6061 BFD_RELOC_OR1K_TLS_IE_AHI16
6063 BFD_RELOC_OR1K_TLS_IE_LO16
6065 BFD_RELOC_OR1K_TLS_IE_PG21
6067 BFD_RELOC_OR1K_TLS_IE_LO13
6069 BFD_RELOC_OR1K_TLS_LE_HI16
6071 BFD_RELOC_OR1K_TLS_LE_AHI16
6073 BFD_RELOC_OR1K_TLS_LE_LO16
6075 BFD_RELOC_OR1K_TLS_LE_SLO16
6077 BFD_RELOC_OR1K_TLS_TPOFF
6079 BFD_RELOC_OR1K_TLS_DTPOFF
6081 BFD_RELOC_OR1K_TLS_DTPMOD
6083 OpenRISC 1000 Relocations.
6086 BFD_RELOC_H8_DIR16A8
6088 BFD_RELOC_H8_DIR16R8
6090 BFD_RELOC_H8_DIR24A8
6092 BFD_RELOC_H8_DIR24R8
6094 BFD_RELOC_H8_DIR32A16
6096 BFD_RELOC_H8_DISP32A16
6101 BFD_RELOC_XSTORMY16_REL_12
6103 BFD_RELOC_XSTORMY16_12
6105 BFD_RELOC_XSTORMY16_24
6107 BFD_RELOC_XSTORMY16_FPTR16
6109 Sony Xstormy16 Relocations.
6114 Self-describing complex relocations.
6118 BFD_RELOC_VAX_GLOB_DAT
6120 BFD_RELOC_VAX_JMP_SLOT
6122 BFD_RELOC_VAX_RELATIVE
6124 Relocations used by VAX ELF.
6129 Morpho MT - 16 bit immediate relocation.
6133 Morpho MT - Hi 16 bits of an address.
6137 Morpho MT - Low 16 bits of an address.
6139 BFD_RELOC_MT_GNU_VTINHERIT
6141 Morpho MT - Used to tell the linker which vtable entries are used.
6143 BFD_RELOC_MT_GNU_VTENTRY
6145 Morpho MT - Used to tell the linker which vtable entries are used.
6147 BFD_RELOC_MT_PCINSN8
6149 Morpho MT - 8 bit immediate relocation.
6152 BFD_RELOC_MSP430_10_PCREL
6154 BFD_RELOC_MSP430_16_PCREL
6158 BFD_RELOC_MSP430_16_PCREL_BYTE
6160 BFD_RELOC_MSP430_16_BYTE
6162 BFD_RELOC_MSP430_2X_PCREL
6164 BFD_RELOC_MSP430_RL_PCREL
6166 BFD_RELOC_MSP430_ABS8
6168 BFD_RELOC_MSP430X_PCR20_EXT_SRC
6170 BFD_RELOC_MSP430X_PCR20_EXT_DST
6172 BFD_RELOC_MSP430X_PCR20_EXT_ODST
6174 BFD_RELOC_MSP430X_ABS20_EXT_SRC
6176 BFD_RELOC_MSP430X_ABS20_EXT_DST
6178 BFD_RELOC_MSP430X_ABS20_EXT_ODST
6180 BFD_RELOC_MSP430X_ABS20_ADR_SRC
6182 BFD_RELOC_MSP430X_ABS20_ADR_DST
6184 BFD_RELOC_MSP430X_PCR16
6186 BFD_RELOC_MSP430X_PCR20_CALL
6188 BFD_RELOC_MSP430X_ABS16
6190 BFD_RELOC_MSP430_ABS_HI16
6192 BFD_RELOC_MSP430_PREL31
6194 BFD_RELOC_MSP430_SYM_DIFF
6196 BFD_RELOC_MSP430_SET_ULEB128
6198 BFD_RELOC_MSP430_SUB_ULEB128
6201 msp430 specific relocation codes
6208 BFD_RELOC_NIOS2_CALL26
6210 BFD_RELOC_NIOS2_IMM5
6212 BFD_RELOC_NIOS2_CACHE_OPX
6214 BFD_RELOC_NIOS2_IMM6
6216 BFD_RELOC_NIOS2_IMM8
6218 BFD_RELOC_NIOS2_HI16
6220 BFD_RELOC_NIOS2_LO16
6222 BFD_RELOC_NIOS2_HIADJ16
6224 BFD_RELOC_NIOS2_GPREL
6226 BFD_RELOC_NIOS2_UJMP
6228 BFD_RELOC_NIOS2_CJMP
6230 BFD_RELOC_NIOS2_CALLR
6232 BFD_RELOC_NIOS2_ALIGN
6234 BFD_RELOC_NIOS2_GOT16
6236 BFD_RELOC_NIOS2_CALL16
6238 BFD_RELOC_NIOS2_GOTOFF_LO
6240 BFD_RELOC_NIOS2_GOTOFF_HA
6242 BFD_RELOC_NIOS2_PCREL_LO
6244 BFD_RELOC_NIOS2_PCREL_HA
6246 BFD_RELOC_NIOS2_TLS_GD16
6248 BFD_RELOC_NIOS2_TLS_LDM16
6250 BFD_RELOC_NIOS2_TLS_LDO16
6252 BFD_RELOC_NIOS2_TLS_IE16
6254 BFD_RELOC_NIOS2_TLS_LE16
6256 BFD_RELOC_NIOS2_TLS_DTPMOD
6258 BFD_RELOC_NIOS2_TLS_DTPREL
6260 BFD_RELOC_NIOS2_TLS_TPREL
6262 BFD_RELOC_NIOS2_COPY
6264 BFD_RELOC_NIOS2_GLOB_DAT
6266 BFD_RELOC_NIOS2_JUMP_SLOT
6268 BFD_RELOC_NIOS2_RELATIVE
6270 BFD_RELOC_NIOS2_GOTOFF
6272 BFD_RELOC_NIOS2_CALL26_NOAT
6274 BFD_RELOC_NIOS2_GOT_LO
6276 BFD_RELOC_NIOS2_GOT_HA
6278 BFD_RELOC_NIOS2_CALL_LO
6280 BFD_RELOC_NIOS2_CALL_HA
6282 BFD_RELOC_NIOS2_R2_S12
6284 BFD_RELOC_NIOS2_R2_I10_1_PCREL
6286 BFD_RELOC_NIOS2_R2_T1I7_1_PCREL
6288 BFD_RELOC_NIOS2_R2_T1I7_2
6290 BFD_RELOC_NIOS2_R2_T2I4
6292 BFD_RELOC_NIOS2_R2_T2I4_1
6294 BFD_RELOC_NIOS2_R2_T2I4_2
6296 BFD_RELOC_NIOS2_R2_X1I7_2
6298 BFD_RELOC_NIOS2_R2_X2L5
6300 BFD_RELOC_NIOS2_R2_F1I5_2
6302 BFD_RELOC_NIOS2_R2_L5I4X1
6304 BFD_RELOC_NIOS2_R2_T1X1I6
6306 BFD_RELOC_NIOS2_R2_T1X1I6_2
6308 Relocations used by the Altera Nios II core.
6313 PRU LDI 16-bit unsigned data-memory relocation.
6315 BFD_RELOC_PRU_U16_PMEMIMM
6317 PRU LDI 16-bit unsigned instruction-memory relocation.
6321 PRU relocation for two consecutive LDI load instructions that load a
6322 32 bit value into a register. If the higher bits are all zero, then
6323 the second instruction may be relaxed.
6325 BFD_RELOC_PRU_S10_PCREL
6327 PRU QBBx 10-bit signed PC-relative relocation.
6329 BFD_RELOC_PRU_U8_PCREL
6331 PRU 8-bit unsigned relocation used for the LOOP instruction.
6333 BFD_RELOC_PRU_32_PMEM
6335 BFD_RELOC_PRU_16_PMEM
6337 PRU Program Memory relocations. Used to convert from byte addressing to
6338 32-bit word addressing.
6340 BFD_RELOC_PRU_GNU_DIFF8
6342 BFD_RELOC_PRU_GNU_DIFF16
6344 BFD_RELOC_PRU_GNU_DIFF32
6346 BFD_RELOC_PRU_GNU_DIFF16_PMEM
6348 BFD_RELOC_PRU_GNU_DIFF32_PMEM
6350 PRU relocations to mark the difference of two local symbols.
6351 These are only needed to support linker relaxation and can be ignored
6352 when not relaxing. The field is set to the value of the difference
6353 assuming no relaxation. The relocation encodes the position of the
6354 second symbol so the linker can determine whether to adjust the field
6355 value. The PMEM variants encode the word difference, instead of byte
6356 difference between symbols.
6359 BFD_RELOC_IQ2000_OFFSET_16
6361 BFD_RELOC_IQ2000_OFFSET_21
6363 BFD_RELOC_IQ2000_UHI16
6368 BFD_RELOC_XTENSA_RTLD
6370 Special Xtensa relocation used only by PLT entries in ELF shared
6371 objects to indicate that the runtime linker should set the value
6372 to one of its own internal functions or data structures.
6374 BFD_RELOC_XTENSA_GLOB_DAT
6376 BFD_RELOC_XTENSA_JMP_SLOT
6378 BFD_RELOC_XTENSA_RELATIVE
6380 Xtensa relocations for ELF shared objects.
6382 BFD_RELOC_XTENSA_PLT
6384 Xtensa relocation used in ELF object files for symbols that may require
6385 PLT entries. Otherwise, this is just a generic 32-bit relocation.
6387 BFD_RELOC_XTENSA_DIFF8
6389 BFD_RELOC_XTENSA_DIFF16
6391 BFD_RELOC_XTENSA_DIFF32
6393 Xtensa relocations for backward compatibility. These have been replaced
6394 by BFD_RELOC_XTENSA_PDIFF and BFD_RELOC_XTENSA_NDIFF.
6395 Xtensa relocations to mark the difference of two local symbols.
6396 These are only needed to support linker relaxation and can be ignored
6397 when not relaxing. The field is set to the value of the difference
6398 assuming no relaxation. The relocation encodes the position of the
6399 first symbol so the linker can determine whether to adjust the field
6402 BFD_RELOC_XTENSA_SLOT0_OP
6404 BFD_RELOC_XTENSA_SLOT1_OP
6406 BFD_RELOC_XTENSA_SLOT2_OP
6408 BFD_RELOC_XTENSA_SLOT3_OP
6410 BFD_RELOC_XTENSA_SLOT4_OP
6412 BFD_RELOC_XTENSA_SLOT5_OP
6414 BFD_RELOC_XTENSA_SLOT6_OP
6416 BFD_RELOC_XTENSA_SLOT7_OP
6418 BFD_RELOC_XTENSA_SLOT8_OP
6420 BFD_RELOC_XTENSA_SLOT9_OP
6422 BFD_RELOC_XTENSA_SLOT10_OP
6424 BFD_RELOC_XTENSA_SLOT11_OP
6426 BFD_RELOC_XTENSA_SLOT12_OP
6428 BFD_RELOC_XTENSA_SLOT13_OP
6430 BFD_RELOC_XTENSA_SLOT14_OP
6432 Generic Xtensa relocations for instruction operands. Only the slot
6433 number is encoded in the relocation. The relocation applies to the
6434 last PC-relative immediate operand, or if there are no PC-relative
6435 immediates, to the last immediate operand.
6437 BFD_RELOC_XTENSA_SLOT0_ALT
6439 BFD_RELOC_XTENSA_SLOT1_ALT
6441 BFD_RELOC_XTENSA_SLOT2_ALT
6443 BFD_RELOC_XTENSA_SLOT3_ALT
6445 BFD_RELOC_XTENSA_SLOT4_ALT
6447 BFD_RELOC_XTENSA_SLOT5_ALT
6449 BFD_RELOC_XTENSA_SLOT6_ALT
6451 BFD_RELOC_XTENSA_SLOT7_ALT
6453 BFD_RELOC_XTENSA_SLOT8_ALT
6455 BFD_RELOC_XTENSA_SLOT9_ALT
6457 BFD_RELOC_XTENSA_SLOT10_ALT
6459 BFD_RELOC_XTENSA_SLOT11_ALT
6461 BFD_RELOC_XTENSA_SLOT12_ALT
6463 BFD_RELOC_XTENSA_SLOT13_ALT
6465 BFD_RELOC_XTENSA_SLOT14_ALT
6467 Alternate Xtensa relocations. Only the slot is encoded in the
6468 relocation. The meaning of these relocations is opcode-specific.
6470 BFD_RELOC_XTENSA_OP0
6472 BFD_RELOC_XTENSA_OP1
6474 BFD_RELOC_XTENSA_OP2
6476 Xtensa relocations for backward compatibility. These have all been
6477 replaced by BFD_RELOC_XTENSA_SLOT0_OP.
6479 BFD_RELOC_XTENSA_ASM_EXPAND
6481 Xtensa relocation to mark that the assembler expanded the
6482 instructions from an original target. The expansion size is
6483 encoded in the reloc size.
6485 BFD_RELOC_XTENSA_ASM_SIMPLIFY
6487 Xtensa relocation to mark that the linker should simplify
6488 assembler-expanded instructions. This is commonly used
6489 internally by the linker after analysis of a
6490 BFD_RELOC_XTENSA_ASM_EXPAND.
6492 BFD_RELOC_XTENSA_TLSDESC_FN
6494 BFD_RELOC_XTENSA_TLSDESC_ARG
6496 BFD_RELOC_XTENSA_TLS_DTPOFF
6498 BFD_RELOC_XTENSA_TLS_TPOFF
6500 BFD_RELOC_XTENSA_TLS_FUNC
6502 BFD_RELOC_XTENSA_TLS_ARG
6504 BFD_RELOC_XTENSA_TLS_CALL
6506 Xtensa TLS relocations.
6508 BFD_RELOC_XTENSA_PDIFF8
6510 BFD_RELOC_XTENSA_PDIFF16
6512 BFD_RELOC_XTENSA_PDIFF32
6514 BFD_RELOC_XTENSA_NDIFF8
6516 BFD_RELOC_XTENSA_NDIFF16
6518 BFD_RELOC_XTENSA_NDIFF32
6520 Xtensa relocations to mark the difference of two local symbols.
6521 These are only needed to support linker relaxation and can be ignored
6522 when not relaxing. The field is set to the value of the difference
6523 assuming no relaxation. The relocation encodes the position of the
6524 subtracted symbol so the linker can determine whether to adjust the field
6525 value. PDIFF relocations are used for positive differences, NDIFF
6526 relocations are used for negative differences. The difference value
6527 is treated as unsigned with these relocation types, giving full
6533 8 bit signed offset in (ix+d) or (iy+d).
6537 First 8 bits of multibyte (32, 24 or 16 bit) value.
6541 Second 8 bits of multibyte (32, 24 or 16 bit) value.
6545 Third 8 bits of multibyte (32 or 24 bit) value.
6549 Fourth 8 bits of multibyte (32 bit) value.
6553 Lowest 16 bits of multibyte (32 or 24 bit) value.
6557 Highest 16 bits of multibyte (32 or 24 bit) value.
6561 Like BFD_RELOC_16 but big-endian.
6579 BFD_RELOC_LM32_BRANCH
6581 BFD_RELOC_LM32_16_GOT
6583 BFD_RELOC_LM32_GOTOFF_HI16
6585 BFD_RELOC_LM32_GOTOFF_LO16
6589 BFD_RELOC_LM32_GLOB_DAT
6591 BFD_RELOC_LM32_JMP_SLOT
6593 BFD_RELOC_LM32_RELATIVE
6595 Lattice Mico32 relocations.
6598 BFD_RELOC_MACH_O_SECTDIFF
6600 Difference between two section addreses. Must be followed by a
6601 BFD_RELOC_MACH_O_PAIR.
6603 BFD_RELOC_MACH_O_LOCAL_SECTDIFF
6605 Like BFD_RELOC_MACH_O_SECTDIFF but with a local symbol.
6607 BFD_RELOC_MACH_O_PAIR
6609 Pair of relocation. Contains the first symbol.
6611 BFD_RELOC_MACH_O_SUBTRACTOR32
6613 Symbol will be substracted. Must be followed by a BFD_RELOC_32.
6615 BFD_RELOC_MACH_O_SUBTRACTOR64
6617 Symbol will be substracted. Must be followed by a BFD_RELOC_64.
6620 BFD_RELOC_MACH_O_X86_64_BRANCH32
6622 BFD_RELOC_MACH_O_X86_64_BRANCH8
6624 PCREL relocations. They are marked as branch to create PLT entry if
6627 BFD_RELOC_MACH_O_X86_64_GOT
6629 Used when referencing a GOT entry.
6631 BFD_RELOC_MACH_O_X86_64_GOT_LOAD
6633 Used when loading a GOT entry with movq. It is specially marked so that
6634 the linker could optimize the movq to a leaq if possible.
6636 BFD_RELOC_MACH_O_X86_64_PCREL32_1
6638 Same as BFD_RELOC_32_PCREL but with an implicit -1 addend.
6640 BFD_RELOC_MACH_O_X86_64_PCREL32_2
6642 Same as BFD_RELOC_32_PCREL but with an implicit -2 addend.
6644 BFD_RELOC_MACH_O_X86_64_PCREL32_4
6646 Same as BFD_RELOC_32_PCREL but with an implicit -4 addend.
6648 BFD_RELOC_MACH_O_X86_64_TLV
6650 Used when referencing a TLV entry.
6654 BFD_RELOC_MACH_O_ARM64_ADDEND
6656 Addend for PAGE or PAGEOFF.
6658 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGE21
6660 Relative offset to page of GOT slot.
6662 BFD_RELOC_MACH_O_ARM64_GOT_LOAD_PAGEOFF12
6664 Relative offset within page of GOT slot.
6666 BFD_RELOC_MACH_O_ARM64_POINTER_TO_GOT
6668 Address of a GOT entry.
6671 BFD_RELOC_MICROBLAZE_32_LO
6673 This is a 32 bit reloc for the microblaze that stores the
6674 low 16 bits of a value
6676 BFD_RELOC_MICROBLAZE_32_LO_PCREL
6678 This is a 32 bit pc-relative reloc for the microblaze that
6679 stores the low 16 bits of a value
6681 BFD_RELOC_MICROBLAZE_32_ROSDA
6683 This is a 32 bit reloc for the microblaze that stores a
6684 value relative to the read-only small data area anchor
6686 BFD_RELOC_MICROBLAZE_32_RWSDA
6688 This is a 32 bit reloc for the microblaze that stores a
6689 value relative to the read-write small data area anchor
6691 BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
6693 This is a 32 bit reloc for the microblaze to handle
6694 expressions of the form "Symbol Op Symbol"
6696 BFD_RELOC_MICROBLAZE_64_NONE
6698 This is a 64 bit reloc that stores the 32 bit pc relative
6699 value in two words (with an imm instruction). No relocation is
6700 done here - only used for relaxing
6702 BFD_RELOC_MICROBLAZE_64_GOTPC
6704 This is a 64 bit reloc that stores the 32 bit pc relative
6705 value in two words (with an imm instruction). The relocation is
6706 PC-relative GOT offset
6708 BFD_RELOC_MICROBLAZE_64_GOT
6710 This is a 64 bit reloc that stores the 32 bit pc relative
6711 value in two words (with an imm instruction). The relocation is
6714 BFD_RELOC_MICROBLAZE_64_PLT
6716 This is a 64 bit reloc that stores the 32 bit pc relative
6717 value in two words (with an imm instruction). The relocation is
6718 PC-relative offset into PLT
6720 BFD_RELOC_MICROBLAZE_64_GOTOFF
6722 This is a 64 bit reloc that stores the 32 bit GOT relative
6723 value in two words (with an imm instruction). The relocation is
6724 relative offset from _GLOBAL_OFFSET_TABLE_
6726 BFD_RELOC_MICROBLAZE_32_GOTOFF
6728 This is a 32 bit reloc that stores the 32 bit GOT relative
6729 value in a word. The relocation is relative offset from
6730 _GLOBAL_OFFSET_TABLE_
6732 BFD_RELOC_MICROBLAZE_COPY
6734 This is used to tell the dynamic linker to copy the value out of
6735 the dynamic object into the runtime process image.
6737 BFD_RELOC_MICROBLAZE_64_TLS
6741 BFD_RELOC_MICROBLAZE_64_TLSGD
6743 This is a 64 bit reloc that stores the 32 bit GOT relative value
6744 of the GOT TLS GD info entry in two words (with an imm instruction). The
6745 relocation is GOT offset.
6747 BFD_RELOC_MICROBLAZE_64_TLSLD
6749 This is a 64 bit reloc that stores the 32 bit GOT relative value
6750 of the GOT TLS LD info entry in two words (with an imm instruction). The
6751 relocation is GOT offset.
6753 BFD_RELOC_MICROBLAZE_32_TLSDTPMOD
6755 This is a 32 bit reloc that stores the Module ID to GOT(n).
6757 BFD_RELOC_MICROBLAZE_32_TLSDTPREL
6759 This is a 32 bit reloc that stores TLS offset to GOT(n+1).
6761 BFD_RELOC_MICROBLAZE_64_TLSDTPREL
6763 This is a 32 bit reloc for storing TLS offset to two words (uses imm
6766 BFD_RELOC_MICROBLAZE_64_TLSGOTTPREL
6768 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6769 to two words (uses imm instruction).
6771 BFD_RELOC_MICROBLAZE_64_TLSTPREL
6773 This is a 64 bit reloc that stores 32-bit thread pointer relative offset
6774 to two words (uses imm instruction).
6776 BFD_RELOC_MICROBLAZE_64_TEXTPCREL
6778 This is a 64 bit reloc that stores the 32 bit pc relative
6779 value in two words (with an imm instruction). The relocation is
6780 PC-relative offset from start of TEXT.
6782 BFD_RELOC_MICROBLAZE_64_TEXTREL
6784 This is a 64 bit reloc that stores the 32 bit offset
6785 value in two words (with an imm instruction). The relocation is
6786 relative offset from start of TEXT.
6789 BFD_RELOC_AARCH64_RELOC_START
6791 AArch64 pseudo relocation code to mark the start of the AArch64
6792 relocation enumerators. N.B. the order of the enumerators is
6793 important as several tables in the AArch64 bfd backend are indexed
6794 by these enumerators; make sure they are all synced.
6796 BFD_RELOC_AARCH64_NULL
6798 Deprecated AArch64 null relocation code.
6800 BFD_RELOC_AARCH64_NONE
6802 AArch64 null relocation code.
6804 BFD_RELOC_AARCH64_64
6806 BFD_RELOC_AARCH64_32
6808 BFD_RELOC_AARCH64_16
6810 Basic absolute relocations of N bits. These are equivalent to
6811 BFD_RELOC_N and they were added to assist the indexing of the howto
6814 BFD_RELOC_AARCH64_64_PCREL
6816 BFD_RELOC_AARCH64_32_PCREL
6818 BFD_RELOC_AARCH64_16_PCREL
6820 PC-relative relocations. These are equivalent to BFD_RELOC_N_PCREL
6821 and they were added to assist the indexing of the howto table.
6823 BFD_RELOC_AARCH64_MOVW_G0
6825 AArch64 MOV[NZK] instruction with most significant bits 0 to 15
6826 of an unsigned address/value.
6828 BFD_RELOC_AARCH64_MOVW_G0_NC
6830 AArch64 MOV[NZK] instruction with less significant bits 0 to 15 of
6831 an address/value. No overflow checking.
6833 BFD_RELOC_AARCH64_MOVW_G1
6835 AArch64 MOV[NZK] instruction with most significant bits 16 to 31
6836 of an unsigned address/value.
6838 BFD_RELOC_AARCH64_MOVW_G1_NC
6840 AArch64 MOV[NZK] instruction with less significant bits 16 to 31
6841 of an address/value. No overflow checking.
6843 BFD_RELOC_AARCH64_MOVW_G2
6845 AArch64 MOV[NZK] instruction with most significant bits 32 to 47
6846 of an unsigned address/value.
6848 BFD_RELOC_AARCH64_MOVW_G2_NC
6850 AArch64 MOV[NZK] instruction with less significant bits 32 to 47
6851 of an address/value. No overflow checking.
6853 BFD_RELOC_AARCH64_MOVW_G3
6855 AArch64 MOV[NZK] instruction with most signficant bits 48 to 64
6856 of a signed or unsigned address/value.
6858 BFD_RELOC_AARCH64_MOVW_G0_S
6860 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
6861 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6864 BFD_RELOC_AARCH64_MOVW_G1_S
6866 AArch64 MOV[NZ] instruction with most significant bits 16 to 31
6867 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6870 BFD_RELOC_AARCH64_MOVW_G2_S
6872 AArch64 MOV[NZ] instruction with most significant bits 32 to 47
6873 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6876 BFD_RELOC_AARCH64_MOVW_PREL_G0
6878 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
6879 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6882 BFD_RELOC_AARCH64_MOVW_PREL_G0_NC
6884 AArch64 MOV[NZ] instruction with most significant bits 0 to 15
6885 of a signed value. Changes instruction to MOVZ or MOVN depending on the
6888 BFD_RELOC_AARCH64_MOVW_PREL_G1
6890 AArch64 MOVK instruction with most significant bits 16 to 31
6893 BFD_RELOC_AARCH64_MOVW_PREL_G1_NC
6895 AArch64 MOVK instruction with most significant bits 16 to 31
6898 BFD_RELOC_AARCH64_MOVW_PREL_G2
6900 AArch64 MOVK instruction with most significant bits 32 to 47
6903 BFD_RELOC_AARCH64_MOVW_PREL_G2_NC
6905 AArch64 MOVK instruction with most significant bits 32 to 47
6908 BFD_RELOC_AARCH64_MOVW_PREL_G3
6910 AArch64 MOVK instruction with most significant bits 47 to 63
6913 BFD_RELOC_AARCH64_LD_LO19_PCREL
6915 AArch64 Load Literal instruction, holding a 19 bit pc-relative word
6916 offset. The lowest two bits must be zero and are not stored in the
6917 instruction, giving a 21 bit signed byte offset.
6919 BFD_RELOC_AARCH64_ADR_LO21_PCREL
6921 AArch64 ADR instruction, holding a simple 21 bit pc-relative byte offset.
6923 BFD_RELOC_AARCH64_ADR_HI21_PCREL
6925 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
6926 offset, giving a 4KB aligned page base address.
6928 BFD_RELOC_AARCH64_ADR_HI21_NC_PCREL
6930 AArch64 ADRP instruction, with bits 12 to 32 of a pc-relative page
6931 offset, giving a 4KB aligned page base address, but with no overflow
6934 BFD_RELOC_AARCH64_ADD_LO12
6936 AArch64 ADD immediate instruction, holding bits 0 to 11 of the address.
6937 Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6939 BFD_RELOC_AARCH64_LDST8_LO12
6941 AArch64 8-bit load/store instruction, holding bits 0 to 11 of the
6942 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6944 BFD_RELOC_AARCH64_TSTBR14
6946 AArch64 14 bit pc-relative test bit and branch.
6947 The lowest two bits must be zero and are not stored in the instruction,
6948 giving a 16 bit signed byte offset.
6950 BFD_RELOC_AARCH64_BRANCH19
6952 AArch64 19 bit pc-relative conditional branch and compare & branch.
6953 The lowest two bits must be zero and are not stored in the instruction,
6954 giving a 21 bit signed byte offset.
6956 BFD_RELOC_AARCH64_JUMP26
6958 AArch64 26 bit pc-relative unconditional branch.
6959 The lowest two bits must be zero and are not stored in the instruction,
6960 giving a 28 bit signed byte offset.
6962 BFD_RELOC_AARCH64_CALL26
6964 AArch64 26 bit pc-relative unconditional branch and link.
6965 The lowest two bits must be zero and are not stored in the instruction,
6966 giving a 28 bit signed byte offset.
6968 BFD_RELOC_AARCH64_LDST16_LO12
6970 AArch64 16-bit load/store instruction, holding bits 0 to 11 of the
6971 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6973 BFD_RELOC_AARCH64_LDST32_LO12
6975 AArch64 32-bit load/store instruction, holding bits 0 to 11 of the
6976 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6978 BFD_RELOC_AARCH64_LDST64_LO12
6980 AArch64 64-bit load/store instruction, holding bits 0 to 11 of the
6981 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6983 BFD_RELOC_AARCH64_LDST128_LO12
6985 AArch64 128-bit load/store instruction, holding bits 0 to 11 of the
6986 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
6988 BFD_RELOC_AARCH64_GOT_LD_PREL19
6990 AArch64 Load Literal instruction, holding a 19 bit PC relative word
6991 offset of the global offset table entry for a symbol. The lowest two
6992 bits must be zero and are not stored in the instruction, giving a 21
6993 bit signed byte offset. This relocation type requires signed overflow
6996 BFD_RELOC_AARCH64_ADR_GOT_PAGE
6998 Get to the page base of the global offset table entry for a symbol as
6999 part of an ADRP instruction using a 21 bit PC relative value.Used in
7000 conjunction with BFD_RELOC_AARCH64_LD64_GOT_LO12_NC.
7002 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC
7004 Unsigned 12 bit byte offset for 64 bit load/store from the page of
7005 the GOT entry for this symbol. Used in conjunction with
7006 BFD_RELOC_AARCH64_ADR_GOT_PAGE. Valid in LP64 ABI only.
7008 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC
7010 Unsigned 12 bit byte offset for 32 bit load/store from the page of
7011 the GOT entry for this symbol. Used in conjunction with
7012 BFD_RELOC_AARCH64_ADR_GOT_PAGE. Valid in ILP32 ABI only.
7014 BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC
7016 Unsigned 16 bit byte offset for 64 bit load/store from the GOT entry
7017 for this symbol. Valid in LP64 ABI only.
7019 BFD_RELOC_AARCH64_MOVW_GOTOFF_G1
7021 Unsigned 16 bit byte higher offset for 64 bit load/store from the GOT entry
7022 for this symbol. Valid in LP64 ABI only.
7024 BFD_RELOC_AARCH64_LD64_GOTOFF_LO15
7026 Unsigned 15 bit byte offset for 64 bit load/store from the page of
7027 the GOT entry for this symbol. Valid in LP64 ABI only.
7029 BFD_RELOC_AARCH64_LD32_GOTPAGE_LO14
7031 Scaled 14 bit byte offset to the page base of the global offset table.
7033 BFD_RELOC_AARCH64_LD64_GOTPAGE_LO15
7035 Scaled 15 bit byte offset to the page base of the global offset table.
7037 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21
7039 Get to the page base of the global offset table entry for a symbols
7040 tls_index structure as part of an adrp instruction using a 21 bit PC
7041 relative value. Used in conjunction with
7042 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC.
7044 BFD_RELOC_AARCH64_TLSGD_ADR_PREL21
7046 AArch64 TLS General Dynamic
7048 BFD_RELOC_AARCH64_TLSGD_ADD_LO12_NC
7050 Unsigned 12 bit byte offset to global offset table entry for a symbols
7051 tls_index structure. Used in conjunction with
7052 BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.
7054 BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC
7056 AArch64 TLS General Dynamic relocation.
7058 BFD_RELOC_AARCH64_TLSGD_MOVW_G1
7060 AArch64 TLS General Dynamic relocation.
7062 BFD_RELOC_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21
7064 AArch64 TLS INITIAL EXEC relocation.
7066 BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC
7068 AArch64 TLS INITIAL EXEC relocation.
7070 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC
7072 AArch64 TLS INITIAL EXEC relocation.
7074 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19
7076 AArch64 TLS INITIAL EXEC relocation.
7078 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC
7080 AArch64 TLS INITIAL EXEC relocation.
7082 BFD_RELOC_AARCH64_TLSIE_MOVW_GOTTPREL_G1
7084 AArch64 TLS INITIAL EXEC relocation.
7086 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
7088 bit[23:12] of byte offset to module TLS base address.
7090 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
7092 Unsigned 12 bit byte offset to module TLS base address.
7094 BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC
7096 No overflow check version of BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12.
7098 BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC
7100 Unsigned 12 bit byte offset to global offset table entry for a symbols
7101 tls_index structure. Used in conjunction with
7102 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21.
7104 BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21
7106 GOT entry page address for AArch64 TLS Local Dynamic, used with ADRP
7109 BFD_RELOC_AARCH64_TLSLD_ADR_PREL21
7111 GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.
7113 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12
7115 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7118 BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12_NC
7120 Similar as BFD_RELOC_AARCH64_TLSLD_LDST16_DTPREL_LO12, but no overflow check.
7122 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12
7124 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7127 BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12_NC
7129 Similar as BFD_RELOC_AARCH64_TLSLD_LDST32_DTPREL_LO12, but no overflow check.
7131 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12
7133 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7136 BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12_NC
7138 Similar as BFD_RELOC_AARCH64_TLSLD_LDST64_DTPREL_LO12, but no overflow check.
7140 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12
7142 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7145 BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12_NC
7147 Similar as BFD_RELOC_AARCH64_TLSLD_LDST8_DTPREL_LO12, but no overflow check.
7149 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7151 bit[15:0] of byte offset to module TLS base address.
7153 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
7155 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
7157 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7159 bit[31:16] of byte offset to module TLS base address.
7161 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
7163 No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
7165 BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
7167 bit[47:32] of byte offset to module TLS base address.
7169 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
7171 AArch64 TLS LOCAL EXEC relocation.
7173 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1
7175 AArch64 TLS LOCAL EXEC relocation.
7177 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC
7179 AArch64 TLS LOCAL EXEC relocation.
7181 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0
7183 AArch64 TLS LOCAL EXEC relocation.
7185 BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC
7187 AArch64 TLS LOCAL EXEC relocation.
7189 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12
7191 AArch64 TLS LOCAL EXEC relocation.
7193 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12
7195 AArch64 TLS LOCAL EXEC relocation.
7197 BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC
7199 AArch64 TLS LOCAL EXEC relocation.
7201 BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12
7203 bit[11:1] of byte offset to module TLS base address, encoded in ldst
7206 BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12_NC
7208 Similar as BFD_RELOC_AARCH64_TLSLE_LDST16_TPREL_LO12, but no overflow check.
7210 BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12
7212 bit[11:2] of byte offset to module TLS base address, encoded in ldst
7215 BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12_NC
7217 Similar as BFD_RELOC_AARCH64_TLSLE_LDST32_TPREL_LO12, but no overflow check.
7219 BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12
7221 bit[11:3] of byte offset to module TLS base address, encoded in ldst
7224 BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12_NC
7226 Similar as BFD_RELOC_AARCH64_TLSLE_LDST64_TPREL_LO12, but no overflow check.
7228 BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12
7230 bit[11:0] of byte offset to module TLS base address, encoded in ldst
7233 BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12_NC
7235 Similar as BFD_RELOC_AARCH64_TLSLE_LDST8_TPREL_LO12, but no overflow check.
7237 BFD_RELOC_AARCH64_TLSDESC_LD_PREL19
7239 AArch64 TLS DESC relocation.
7241 BFD_RELOC_AARCH64_TLSDESC_ADR_PREL21
7243 AArch64 TLS DESC relocation.
7245 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21
7247 AArch64 TLS DESC relocation.
7249 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12
7251 AArch64 TLS DESC relocation.
7253 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC
7255 AArch64 TLS DESC relocation.
7257 BFD_RELOC_AARCH64_TLSDESC_ADD_LO12
7259 AArch64 TLS DESC relocation.
7261 BFD_RELOC_AARCH64_TLSDESC_OFF_G1
7263 AArch64 TLS DESC relocation.
7265 BFD_RELOC_AARCH64_TLSDESC_OFF_G0_NC
7267 AArch64 TLS DESC relocation.
7269 BFD_RELOC_AARCH64_TLSDESC_LDR
7271 AArch64 TLS DESC relocation.
7273 BFD_RELOC_AARCH64_TLSDESC_ADD
7275 AArch64 TLS DESC relocation.
7277 BFD_RELOC_AARCH64_TLSDESC_CALL
7279 AArch64 TLS DESC relocation.
7281 BFD_RELOC_AARCH64_COPY
7283 AArch64 TLS relocation.
7285 BFD_RELOC_AARCH64_GLOB_DAT
7287 AArch64 TLS relocation.
7289 BFD_RELOC_AARCH64_JUMP_SLOT
7291 AArch64 TLS relocation.
7293 BFD_RELOC_AARCH64_RELATIVE
7295 AArch64 TLS relocation.
7297 BFD_RELOC_AARCH64_TLS_DTPMOD
7299 AArch64 TLS relocation.
7301 BFD_RELOC_AARCH64_TLS_DTPREL
7303 AArch64 TLS relocation.
7305 BFD_RELOC_AARCH64_TLS_TPREL
7307 AArch64 TLS relocation.
7309 BFD_RELOC_AARCH64_TLSDESC
7311 AArch64 TLS relocation.
7313 BFD_RELOC_AARCH64_IRELATIVE
7315 AArch64 support for STT_GNU_IFUNC.
7317 BFD_RELOC_AARCH64_RELOC_END
7319 AArch64 pseudo relocation code to mark the end of the AArch64
7320 relocation enumerators that have direct mapping to ELF reloc codes.
7321 There are a few more enumerators after this one; those are mainly
7322 used by the AArch64 assembler for the internal fixup or to select
7323 one of the above enumerators.
7325 BFD_RELOC_AARCH64_GAS_INTERNAL_FIXUP
7327 AArch64 pseudo relocation code to be used internally by the AArch64
7328 assembler and not (currently) written to any object files.
7330 BFD_RELOC_AARCH64_LDST_LO12
7332 AArch64 unspecified load/store instruction, holding bits 0 to 11 of the
7333 address. Used in conjunction with BFD_RELOC_AARCH64_ADR_HI21_PCREL.
7335 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12
7337 AArch64 pseudo relocation code for TLS local dynamic mode. It's to be
7338 used internally by the AArch64 assembler and not (currently) written to
7341 BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12_NC
7343 Similar as BFD_RELOC_AARCH64_TLSLD_LDST_DTPREL_LO12, but no overflow check.
7345 BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12
7347 AArch64 pseudo relocation code for TLS local exec mode. It's to be
7348 used internally by the AArch64 assembler and not (currently) written to
7351 BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12_NC
7353 Similar as BFD_RELOC_AARCH64_TLSLE_LDST_TPREL_LO12, but no overflow check.
7355 BFD_RELOC_AARCH64_LD_GOT_LO12_NC
7357 AArch64 pseudo relocation code to be used internally by the AArch64
7358 assembler and not (currently) written to any object files.
7360 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC
7362 AArch64 pseudo relocation code to be used internally by the AArch64
7363 assembler and not (currently) written to any object files.
7365 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC
7367 AArch64 pseudo relocation code to be used internally by the AArch64
7368 assembler and not (currently) written to any object files.
7370 BFD_RELOC_TILEPRO_COPY
7372 BFD_RELOC_TILEPRO_GLOB_DAT
7374 BFD_RELOC_TILEPRO_JMP_SLOT
7376 BFD_RELOC_TILEPRO_RELATIVE
7378 BFD_RELOC_TILEPRO_BROFF_X1
7380 BFD_RELOC_TILEPRO_JOFFLONG_X1
7382 BFD_RELOC_TILEPRO_JOFFLONG_X1_PLT
7384 BFD_RELOC_TILEPRO_IMM8_X0
7386 BFD_RELOC_TILEPRO_IMM8_Y0
7388 BFD_RELOC_TILEPRO_IMM8_X1
7390 BFD_RELOC_TILEPRO_IMM8_Y1
7392 BFD_RELOC_TILEPRO_DEST_IMM8_X1
7394 BFD_RELOC_TILEPRO_MT_IMM15_X1
7396 BFD_RELOC_TILEPRO_MF_IMM15_X1
7398 BFD_RELOC_TILEPRO_IMM16_X0
7400 BFD_RELOC_TILEPRO_IMM16_X1
7402 BFD_RELOC_TILEPRO_IMM16_X0_LO
7404 BFD_RELOC_TILEPRO_IMM16_X1_LO
7406 BFD_RELOC_TILEPRO_IMM16_X0_HI
7408 BFD_RELOC_TILEPRO_IMM16_X1_HI
7410 BFD_RELOC_TILEPRO_IMM16_X0_HA
7412 BFD_RELOC_TILEPRO_IMM16_X1_HA
7414 BFD_RELOC_TILEPRO_IMM16_X0_PCREL
7416 BFD_RELOC_TILEPRO_IMM16_X1_PCREL
7418 BFD_RELOC_TILEPRO_IMM16_X0_LO_PCREL
7420 BFD_RELOC_TILEPRO_IMM16_X1_LO_PCREL
7422 BFD_RELOC_TILEPRO_IMM16_X0_HI_PCREL
7424 BFD_RELOC_TILEPRO_IMM16_X1_HI_PCREL
7426 BFD_RELOC_TILEPRO_IMM16_X0_HA_PCREL
7428 BFD_RELOC_TILEPRO_IMM16_X1_HA_PCREL
7430 BFD_RELOC_TILEPRO_IMM16_X0_GOT
7432 BFD_RELOC_TILEPRO_IMM16_X1_GOT
7434 BFD_RELOC_TILEPRO_IMM16_X0_GOT_LO
7436 BFD_RELOC_TILEPRO_IMM16_X1_GOT_LO
7438 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HI
7440 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HI
7442 BFD_RELOC_TILEPRO_IMM16_X0_GOT_HA
7444 BFD_RELOC_TILEPRO_IMM16_X1_GOT_HA
7446 BFD_RELOC_TILEPRO_MMSTART_X0
7448 BFD_RELOC_TILEPRO_MMEND_X0
7450 BFD_RELOC_TILEPRO_MMSTART_X1
7452 BFD_RELOC_TILEPRO_MMEND_X1
7454 BFD_RELOC_TILEPRO_SHAMT_X0
7456 BFD_RELOC_TILEPRO_SHAMT_X1
7458 BFD_RELOC_TILEPRO_SHAMT_Y0
7460 BFD_RELOC_TILEPRO_SHAMT_Y1
7462 BFD_RELOC_TILEPRO_TLS_GD_CALL
7464 BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD
7466 BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD
7468 BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD
7470 BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD
7472 BFD_RELOC_TILEPRO_TLS_IE_LOAD
7474 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD
7476 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD
7478 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_LO
7480 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_LO
7482 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HI
7484 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HI
7486 BFD_RELOC_TILEPRO_IMM16_X0_TLS_GD_HA
7488 BFD_RELOC_TILEPRO_IMM16_X1_TLS_GD_HA
7490 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE
7492 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE
7494 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_LO
7496 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_LO
7498 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HI
7500 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HI
7502 BFD_RELOC_TILEPRO_IMM16_X0_TLS_IE_HA
7504 BFD_RELOC_TILEPRO_IMM16_X1_TLS_IE_HA
7506 BFD_RELOC_TILEPRO_TLS_DTPMOD32
7508 BFD_RELOC_TILEPRO_TLS_DTPOFF32
7510 BFD_RELOC_TILEPRO_TLS_TPOFF32
7512 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE
7514 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE
7516 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO
7518 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO
7520 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI
7522 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI
7524 BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA
7526 BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA
7528 Tilera TILEPro Relocations.
7530 BFD_RELOC_TILEGX_HW0
7532 BFD_RELOC_TILEGX_HW1
7534 BFD_RELOC_TILEGX_HW2
7536 BFD_RELOC_TILEGX_HW3
7538 BFD_RELOC_TILEGX_HW0_LAST
7540 BFD_RELOC_TILEGX_HW1_LAST
7542 BFD_RELOC_TILEGX_HW2_LAST
7544 BFD_RELOC_TILEGX_COPY
7546 BFD_RELOC_TILEGX_GLOB_DAT
7548 BFD_RELOC_TILEGX_JMP_SLOT
7550 BFD_RELOC_TILEGX_RELATIVE
7552 BFD_RELOC_TILEGX_BROFF_X1
7554 BFD_RELOC_TILEGX_JUMPOFF_X1
7556 BFD_RELOC_TILEGX_JUMPOFF_X1_PLT
7558 BFD_RELOC_TILEGX_IMM8_X0
7560 BFD_RELOC_TILEGX_IMM8_Y0
7562 BFD_RELOC_TILEGX_IMM8_X1
7564 BFD_RELOC_TILEGX_IMM8_Y1
7566 BFD_RELOC_TILEGX_DEST_IMM8_X1
7568 BFD_RELOC_TILEGX_MT_IMM14_X1
7570 BFD_RELOC_TILEGX_MF_IMM14_X1
7572 BFD_RELOC_TILEGX_MMSTART_X0
7574 BFD_RELOC_TILEGX_MMEND_X0
7576 BFD_RELOC_TILEGX_SHAMT_X0
7578 BFD_RELOC_TILEGX_SHAMT_X1
7580 BFD_RELOC_TILEGX_SHAMT_Y0
7582 BFD_RELOC_TILEGX_SHAMT_Y1
7584 BFD_RELOC_TILEGX_IMM16_X0_HW0
7586 BFD_RELOC_TILEGX_IMM16_X1_HW0
7588 BFD_RELOC_TILEGX_IMM16_X0_HW1
7590 BFD_RELOC_TILEGX_IMM16_X1_HW1
7592 BFD_RELOC_TILEGX_IMM16_X0_HW2
7594 BFD_RELOC_TILEGX_IMM16_X1_HW2
7596 BFD_RELOC_TILEGX_IMM16_X0_HW3
7598 BFD_RELOC_TILEGX_IMM16_X1_HW3
7600 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST
7602 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST
7604 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST
7606 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST
7608 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST
7610 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST
7612 BFD_RELOC_TILEGX_IMM16_X0_HW0_PCREL
7614 BFD_RELOC_TILEGX_IMM16_X1_HW0_PCREL
7616 BFD_RELOC_TILEGX_IMM16_X0_HW1_PCREL
7618 BFD_RELOC_TILEGX_IMM16_X1_HW1_PCREL
7620 BFD_RELOC_TILEGX_IMM16_X0_HW2_PCREL
7622 BFD_RELOC_TILEGX_IMM16_X1_HW2_PCREL
7624 BFD_RELOC_TILEGX_IMM16_X0_HW3_PCREL
7626 BFD_RELOC_TILEGX_IMM16_X1_HW3_PCREL
7628 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PCREL
7630 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PCREL
7632 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PCREL
7634 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PCREL
7636 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PCREL
7638 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PCREL
7640 BFD_RELOC_TILEGX_IMM16_X0_HW0_GOT
7642 BFD_RELOC_TILEGX_IMM16_X1_HW0_GOT
7644 BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL
7646 BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL
7648 BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL
7650 BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL
7652 BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL
7654 BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL
7656 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_GOT
7658 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_GOT
7660 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_GOT
7662 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_GOT
7664 BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL
7666 BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL
7668 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_GD
7670 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_GD
7672 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE
7674 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE
7676 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE
7678 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE
7680 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE
7682 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE
7684 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_GD
7686 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_GD
7688 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_GD
7690 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_GD
7692 BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_IE
7694 BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_IE
7696 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL
7698 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL
7700 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL
7702 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL
7704 BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL
7706 BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL
7708 BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_IE
7710 BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_IE
7712 BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_IE
7714 BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_IE
7716 BFD_RELOC_TILEGX_TLS_DTPMOD64
7718 BFD_RELOC_TILEGX_TLS_DTPOFF64
7720 BFD_RELOC_TILEGX_TLS_TPOFF64
7722 BFD_RELOC_TILEGX_TLS_DTPMOD32
7724 BFD_RELOC_TILEGX_TLS_DTPOFF32
7726 BFD_RELOC_TILEGX_TLS_TPOFF32
7728 BFD_RELOC_TILEGX_TLS_GD_CALL
7730 BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD
7732 BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD
7734 BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD
7736 BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD
7738 BFD_RELOC_TILEGX_TLS_IE_LOAD
7740 BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD
7742 BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD
7744 BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD
7746 BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD
7748 Tilera TILE-Gx Relocations.
7757 BFD_RELOC_BPF_DISP16
7759 BFD_RELOC_BPF_DISP32
7761 Linux eBPF relocations.
7764 BFD_RELOC_EPIPHANY_SIMM8
7766 Adapteva EPIPHANY - 8 bit signed pc-relative displacement
7768 BFD_RELOC_EPIPHANY_SIMM24
7770 Adapteva EPIPHANY - 24 bit signed pc-relative displacement
7772 BFD_RELOC_EPIPHANY_HIGH
7774 Adapteva EPIPHANY - 16 most-significant bits of absolute address
7776 BFD_RELOC_EPIPHANY_LOW
7778 Adapteva EPIPHANY - 16 least-significant bits of absolute address
7780 BFD_RELOC_EPIPHANY_SIMM11
7782 Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
7784 BFD_RELOC_EPIPHANY_IMM11
7786 Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement)
7788 BFD_RELOC_EPIPHANY_IMM8
7790 Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
7793 BFD_RELOC_VISIUM_HI16
7795 BFD_RELOC_VISIUM_LO16
7797 BFD_RELOC_VISIUM_IM16
7799 BFD_RELOC_VISIUM_REL16
7801 BFD_RELOC_VISIUM_HI16_PCREL
7803 BFD_RELOC_VISIUM_LO16_PCREL
7805 BFD_RELOC_VISIUM_IM16_PCREL
7810 BFD_RELOC_WASM32_LEB128
7812 BFD_RELOC_WASM32_LEB128_GOT
7814 BFD_RELOC_WASM32_LEB128_GOT_CODE
7816 BFD_RELOC_WASM32_LEB128_PLT
7818 BFD_RELOC_WASM32_PLT_INDEX
7820 BFD_RELOC_WASM32_ABS32_CODE
7822 BFD_RELOC_WASM32_COPY
7824 BFD_RELOC_WASM32_CODE_POINTER
7826 BFD_RELOC_WASM32_INDEX
7828 BFD_RELOC_WASM32_PLT_SIG
7830 WebAssembly relocations.
7833 BFD_RELOC_CKCORE_NONE
7835 BFD_RELOC_CKCORE_ADDR32
7837 BFD_RELOC_CKCORE_PCREL_IMM8BY4
7839 BFD_RELOC_CKCORE_PCREL_IMM11BY2
7841 BFD_RELOC_CKCORE_PCREL_IMM4BY2
7843 BFD_RELOC_CKCORE_PCREL32
7845 BFD_RELOC_CKCORE_PCREL_JSR_IMM11BY2
7847 BFD_RELOC_CKCORE_GNU_VTINHERIT
7849 BFD_RELOC_CKCORE_GNU_VTENTRY
7851 BFD_RELOC_CKCORE_RELATIVE
7853 BFD_RELOC_CKCORE_COPY
7855 BFD_RELOC_CKCORE_GLOB_DAT
7857 BFD_RELOC_CKCORE_JUMP_SLOT
7859 BFD_RELOC_CKCORE_GOTOFF
7861 BFD_RELOC_CKCORE_GOTPC
7863 BFD_RELOC_CKCORE_GOT32
7865 BFD_RELOC_CKCORE_PLT32
7867 BFD_RELOC_CKCORE_ADDRGOT
7869 BFD_RELOC_CKCORE_ADDRPLT
7871 BFD_RELOC_CKCORE_PCREL_IMM26BY2
7873 BFD_RELOC_CKCORE_PCREL_IMM16BY2
7875 BFD_RELOC_CKCORE_PCREL_IMM16BY4
7877 BFD_RELOC_CKCORE_PCREL_IMM10BY2
7879 BFD_RELOC_CKCORE_PCREL_IMM10BY4
7881 BFD_RELOC_CKCORE_ADDR_HI16
7883 BFD_RELOC_CKCORE_ADDR_LO16
7885 BFD_RELOC_CKCORE_GOTPC_HI16
7887 BFD_RELOC_CKCORE_GOTPC_LO16
7889 BFD_RELOC_CKCORE_GOTOFF_HI16
7891 BFD_RELOC_CKCORE_GOTOFF_LO16
7893 BFD_RELOC_CKCORE_GOT12
7895 BFD_RELOC_CKCORE_GOT_HI16
7897 BFD_RELOC_CKCORE_GOT_LO16
7899 BFD_RELOC_CKCORE_PLT12
7901 BFD_RELOC_CKCORE_PLT_HI16
7903 BFD_RELOC_CKCORE_PLT_LO16
7905 BFD_RELOC_CKCORE_ADDRGOT_HI16
7907 BFD_RELOC_CKCORE_ADDRGOT_LO16
7909 BFD_RELOC_CKCORE_ADDRPLT_HI16
7911 BFD_RELOC_CKCORE_ADDRPLT_LO16
7913 BFD_RELOC_CKCORE_PCREL_JSR_IMM26BY2
7915 BFD_RELOC_CKCORE_TOFFSET_LO16
7917 BFD_RELOC_CKCORE_DOFFSET_LO16
7919 BFD_RELOC_CKCORE_PCREL_IMM18BY2
7921 BFD_RELOC_CKCORE_DOFFSET_IMM18
7923 BFD_RELOC_CKCORE_DOFFSET_IMM18BY2
7925 BFD_RELOC_CKCORE_DOFFSET_IMM18BY4
7927 BFD_RELOC_CKCORE_GOTOFF_IMM18
7929 BFD_RELOC_CKCORE_GOT_IMM18BY4
7931 BFD_RELOC_CKCORE_PLT_IMM18BY4
7933 BFD_RELOC_CKCORE_PCREL_IMM7BY4
7935 BFD_RELOC_CKCORE_TLS_LE32
7937 BFD_RELOC_CKCORE_TLS_IE32
7939 BFD_RELOC_CKCORE_TLS_GD32
7941 BFD_RELOC_CKCORE_TLS_LDM32
7943 BFD_RELOC_CKCORE_TLS_LDO32
7945 BFD_RELOC_CKCORE_TLS_DTPMOD32
7947 BFD_RELOC_CKCORE_TLS_DTPOFF32
7949 BFD_RELOC_CKCORE_TLS_TPOFF32
7951 BFD_RELOC_CKCORE_PCREL_FLRW_IMM8BY4
7953 BFD_RELOC_CKCORE_NOJSRI
7955 BFD_RELOC_CKCORE_CALLGRAPH
7957 BFD_RELOC_CKCORE_IRELATIVE
7959 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM4BY4
7961 BFD_RELOC_CKCORE_PCREL_BLOOP_IMM12BY4
7971 BFD_RELOC_LARCH_TLS_DTPMOD32
7973 BFD_RELOC_LARCH_TLS_DTPREL32
7975 BFD_RELOC_LARCH_TLS_DTPMOD64
7977 BFD_RELOC_LARCH_TLS_DTPREL64
7979 BFD_RELOC_LARCH_TLS_TPREL32
7981 BFD_RELOC_LARCH_TLS_TPREL64
7983 BFD_RELOC_LARCH_MARK_LA
7985 BFD_RELOC_LARCH_MARK_PCREL
7987 BFD_RELOC_LARCH_SOP_PUSH_PCREL
7989 BFD_RELOC_LARCH_SOP_PUSH_ABSOLUTE
7991 BFD_RELOC_LARCH_SOP_PUSH_DUP
7993 BFD_RELOC_LARCH_SOP_PUSH_GPREL
7995 BFD_RELOC_LARCH_SOP_PUSH_TLS_TPREL
7997 BFD_RELOC_LARCH_SOP_PUSH_TLS_GOT
7999 BFD_RELOC_LARCH_SOP_PUSH_TLS_GD
8001 BFD_RELOC_LARCH_SOP_PUSH_PLT_PCREL
8003 BFD_RELOC_LARCH_SOP_ASSERT
8005 BFD_RELOC_LARCH_SOP_NOT
8007 BFD_RELOC_LARCH_SOP_SUB
8009 BFD_RELOC_LARCH_SOP_SL
8011 BFD_RELOC_LARCH_SOP_SR
8013 BFD_RELOC_LARCH_SOP_ADD
8015 BFD_RELOC_LARCH_SOP_AND
8017 BFD_RELOC_LARCH_SOP_IF_ELSE
8019 BFD_RELOC_LARCH_SOP_POP_32_S_10_5
8021 BFD_RELOC_LARCH_SOP_POP_32_U_10_12
8023 BFD_RELOC_LARCH_SOP_POP_32_S_10_12
8025 BFD_RELOC_LARCH_SOP_POP_32_S_10_16
8027 BFD_RELOC_LARCH_SOP_POP_32_S_10_16_S2
8029 BFD_RELOC_LARCH_SOP_POP_32_S_5_20
8031 BFD_RELOC_LARCH_SOP_POP_32_S_0_5_10_16_S2
8033 BFD_RELOC_LARCH_SOP_POP_32_S_0_10_10_16_S2
8035 BFD_RELOC_LARCH_SOP_POP_32_U
8037 BFD_RELOC_LARCH_ADD8
8039 BFD_RELOC_LARCH_ADD16
8041 BFD_RELOC_LARCH_ADD24
8043 BFD_RELOC_LARCH_ADD32
8045 BFD_RELOC_LARCH_ADD64
8047 BFD_RELOC_LARCH_SUB8
8049 BFD_RELOC_LARCH_SUB16
8051 BFD_RELOC_LARCH_SUB24
8053 BFD_RELOC_LARCH_SUB32
8055 BFD_RELOC_LARCH_SUB64
8065 BFD_RELOC_LARCH_ABS_HI20
8067 BFD_RELOC_LARCH_ABS_LO12
8069 BFD_RELOC_LARCH_ABS64_LO20
8071 BFD_RELOC_LARCH_ABS64_HI12
8074 BFD_RELOC_LARCH_PCALA_HI20
8076 BFD_RELOC_LARCH_PCALA_LO12
8078 BFD_RELOC_LARCH_PCALA64_LO20
8080 BFD_RELOC_LARCH_PCALA64_HI12
8083 BFD_RELOC_LARCH_GOT_PC_HI20
8085 BFD_RELOC_LARCH_GOT_PC_LO12
8087 BFD_RELOC_LARCH_GOT64_PC_LO20
8089 BFD_RELOC_LARCH_GOT64_PC_HI12
8091 BFD_RELOC_LARCH_GOT_HI20
8093 BFD_RELOC_LARCH_GOT_LO12
8095 BFD_RELOC_LARCH_GOT64_LO20
8097 BFD_RELOC_LARCH_GOT64_HI12
8100 BFD_RELOC_LARCH_TLS_LE_HI20
8102 BFD_RELOC_LARCH_TLS_LE_LO12
8104 BFD_RELOC_LARCH_TLS_LE64_LO20
8106 BFD_RELOC_LARCH_TLS_LE64_HI12
8108 BFD_RELOC_LARCH_TLS_IE_PC_HI20
8110 BFD_RELOC_LARCH_TLS_IE_PC_LO12
8112 BFD_RELOC_LARCH_TLS_IE64_PC_LO20
8114 BFD_RELOC_LARCH_TLS_IE64_PC_HI12
8116 BFD_RELOC_LARCH_TLS_IE_HI20
8118 BFD_RELOC_LARCH_TLS_IE_LO12
8120 BFD_RELOC_LARCH_TLS_IE64_LO20
8122 BFD_RELOC_LARCH_TLS_IE64_HI12
8124 BFD_RELOC_LARCH_TLS_LD_PC_HI20
8126 BFD_RELOC_LARCH_TLS_LD_HI20
8128 BFD_RELOC_LARCH_TLS_GD_PC_HI20
8130 BFD_RELOC_LARCH_TLS_GD_HI20
8133 BFD_RELOC_LARCH_32_PCREL
8136 BFD_RELOC_LARCH_RELAX
8145 .typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
8150 bfd_reloc_type_lookup
8151 bfd_reloc_name_lookup
8154 reloc_howto_type *bfd_reloc_type_lookup
8155 (bfd *abfd, bfd_reloc_code_real_type code);
8156 reloc_howto_type *bfd_reloc_name_lookup
8157 (bfd *abfd, const char *reloc_name);
8160 Return a pointer to a howto structure which, when
8161 invoked, will perform the relocation @var{code} on data from the
8167 bfd_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
8169 return BFD_SEND (abfd
, reloc_type_lookup
, (abfd
, code
));
8173 bfd_reloc_name_lookup (bfd
*abfd
, const char *reloc_name
)
8175 return BFD_SEND (abfd
, reloc_name_lookup
, (abfd
, reloc_name
));
8178 static reloc_howto_type bfd_howto_32
=
8179 HOWTO (0, 00, 4, 32, false, 0, complain_overflow_dont
, 0, "VRT32", false, 0xffffffff, 0xffffffff, true);
8183 bfd_default_reloc_type_lookup
8186 reloc_howto_type *bfd_default_reloc_type_lookup
8187 (bfd *abfd, bfd_reloc_code_real_type code);
8190 Provides a default relocation lookup routine for any architecture.
8195 bfd_default_reloc_type_lookup (bfd
*abfd
, bfd_reloc_code_real_type code
)
8197 /* Very limited support is provided for relocs in generic targets
8198 such as elf32-little. FIXME: Should we always return NULL? */
8199 if (code
== BFD_RELOC_CTOR
8200 && bfd_arch_bits_per_address (abfd
) == 32)
8201 return &bfd_howto_32
;
8207 bfd_get_reloc_code_name
8210 const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
8213 Provides a printable name for the supplied relocation code.
8214 Useful mainly for printing error messages.
8218 bfd_get_reloc_code_name (bfd_reloc_code_real_type code
)
8220 if (code
> BFD_RELOC_UNUSED
)
8222 return bfd_reloc_code_real_names
[code
];
8227 bfd_generic_relax_section
8230 bool bfd_generic_relax_section
8233 struct bfd_link_info *,
8237 Provides default handling for relaxing for back ends which
8242 bfd_generic_relax_section (bfd
*abfd ATTRIBUTE_UNUSED
,
8243 asection
*section ATTRIBUTE_UNUSED
,
8244 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
,
8247 if (bfd_link_relocatable (link_info
))
8248 (*link_info
->callbacks
->einfo
)
8249 (_("%P%F: --relax and -r may not be used together\n"));
8257 bfd_generic_gc_sections
8260 bool bfd_generic_gc_sections
8261 (bfd *, struct bfd_link_info *);
8264 Provides default handling for relaxing for back ends which
8265 don't do section gc -- i.e., does nothing.
8269 bfd_generic_gc_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
8270 struct bfd_link_info
*info ATTRIBUTE_UNUSED
)
8277 bfd_generic_lookup_section_flags
8280 bool bfd_generic_lookup_section_flags
8281 (struct bfd_link_info *, struct flag_info *, asection *);
8284 Provides default handling for section flags lookup
8285 -- i.e., does nothing.
8286 Returns FALSE if the section should be omitted, otherwise TRUE.
8290 bfd_generic_lookup_section_flags (struct bfd_link_info
*info ATTRIBUTE_UNUSED
,
8291 struct flag_info
*flaginfo
,
8292 asection
*section ATTRIBUTE_UNUSED
)
8294 if (flaginfo
!= NULL
)
8296 _bfd_error_handler (_("INPUT_SECTION_FLAGS are not supported"));
8304 bfd_generic_merge_sections
8307 bool bfd_generic_merge_sections
8308 (bfd *, struct bfd_link_info *);
8311 Provides default handling for SEC_MERGE section merging for back ends
8312 which don't have SEC_MERGE support -- i.e., does nothing.
8316 bfd_generic_merge_sections (bfd
*abfd ATTRIBUTE_UNUSED
,
8317 struct bfd_link_info
*link_info ATTRIBUTE_UNUSED
)
8324 bfd_generic_get_relocated_section_contents
8327 bfd_byte *bfd_generic_get_relocated_section_contents
8329 struct bfd_link_info *link_info,
8330 struct bfd_link_order *link_order,
8336 Provides default handling of relocation effort for back ends
8337 which can't be bothered to do it efficiently.
8342 bfd_generic_get_relocated_section_contents (bfd
*abfd
,
8343 struct bfd_link_info
*link_info
,
8344 struct bfd_link_order
*link_order
,
8349 bfd
*input_bfd
= link_order
->u
.indirect
.section
->owner
;
8350 asection
*input_section
= link_order
->u
.indirect
.section
;
8352 arelent
**reloc_vector
;
8355 reloc_size
= bfd_get_reloc_upper_bound (input_bfd
, input_section
);
8359 /* Read in the section. */
8360 bfd_byte
*orig_data
= data
;
8361 if (!bfd_get_full_section_contents (input_bfd
, input_section
, &data
))
8367 if (reloc_size
== 0)
8370 reloc_vector
= (arelent
**) bfd_malloc (reloc_size
);
8371 if (reloc_vector
== NULL
)
8374 reloc_count
= bfd_canonicalize_reloc (input_bfd
,
8378 if (reloc_count
< 0)
8381 if (reloc_count
> 0)
8385 for (parent
= reloc_vector
; *parent
!= NULL
; parent
++)
8387 char *error_message
= NULL
;
8389 bfd_reloc_status_type r
;
8391 symbol
= *(*parent
)->sym_ptr_ptr
;
8392 /* PR ld/19628: A specially crafted input file
8393 can result in a NULL symbol pointer here. */
8396 link_info
->callbacks
->einfo
8397 /* xgettext:c-format */
8398 (_("%X%P: %pB(%pA): error: relocation for offset %V has no value\n"),
8399 abfd
, input_section
, (* parent
)->address
);
8403 /* Zap reloc field when the symbol is from a discarded
8404 section, ignoring any addend. Do the same when called
8405 from bfd_simple_get_relocated_section_contents for
8406 undefined symbols in debug sections. This is to keep
8407 debug info reasonably sane, in particular so that
8408 DW_FORM_ref_addr to another file's .debug_info isn't
8409 confused with an offset into the current file's
8411 if ((symbol
->section
!= NULL
&& discarded_section (symbol
->section
))
8412 || (symbol
->section
== bfd_und_section_ptr
8413 && (input_section
->flags
& SEC_DEBUGGING
) != 0
8414 && link_info
->input_bfds
== link_info
->output_bfd
))
8417 static reloc_howto_type none_howto
8418 = HOWTO (0, 0, 0, 0, false, 0, complain_overflow_dont
, NULL
,
8419 "unused", false, 0, 0, false);
8421 off
= ((*parent
)->address
8422 * bfd_octets_per_byte (input_bfd
, input_section
));
8423 _bfd_clear_contents ((*parent
)->howto
, input_bfd
,
8424 input_section
, data
, off
);
8425 (*parent
)->sym_ptr_ptr
= bfd_abs_section_ptr
->symbol_ptr_ptr
;
8426 (*parent
)->addend
= 0;
8427 (*parent
)->howto
= &none_howto
;
8431 r
= bfd_perform_relocation (input_bfd
,
8435 relocatable
? abfd
: NULL
,
8440 asection
*os
= input_section
->output_section
;
8442 /* A partial link, so keep the relocs. */
8443 os
->orelocation
[os
->reloc_count
] = *parent
;
8447 if (r
!= bfd_reloc_ok
)
8451 case bfd_reloc_undefined
:
8452 (*link_info
->callbacks
->undefined_symbol
)
8453 (link_info
, bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
8454 input_bfd
, input_section
, (*parent
)->address
, true);
8456 case bfd_reloc_dangerous
:
8457 BFD_ASSERT (error_message
!= NULL
);
8458 (*link_info
->callbacks
->reloc_dangerous
)
8459 (link_info
, error_message
,
8460 input_bfd
, input_section
, (*parent
)->address
);
8462 case bfd_reloc_overflow
:
8463 (*link_info
->callbacks
->reloc_overflow
)
8465 bfd_asymbol_name (*(*parent
)->sym_ptr_ptr
),
8466 (*parent
)->howto
->name
, (*parent
)->addend
,
8467 input_bfd
, input_section
, (*parent
)->address
);
8469 case bfd_reloc_outofrange
:
8471 This error can result when processing some partially
8472 complete binaries. Do not abort, but issue an error
8474 link_info
->callbacks
->einfo
8475 /* xgettext:c-format */
8476 (_("%X%P: %pB(%pA): relocation \"%pR\" goes out of range\n"),
8477 abfd
, input_section
, * parent
);
8480 case bfd_reloc_notsupported
:
8482 This error can result when processing a corrupt binary.
8483 Do not abort. Issue an error message instead. */
8484 link_info
->callbacks
->einfo
8485 /* xgettext:c-format */
8486 (_("%X%P: %pB(%pA): relocation \"%pR\" is not supported\n"),
8487 abfd
, input_section
, * parent
);
8491 /* PR 17512; file: 90c2a92e.
8492 Report unexpected results, without aborting. */
8493 link_info
->callbacks
->einfo
8494 /* xgettext:c-format */
8495 (_("%X%P: %pB(%pA): relocation \"%pR\" returns an unrecognized value %x\n"),
8496 abfd
, input_section
, * parent
, r
);
8504 free (reloc_vector
);
8508 free (reloc_vector
);
8509 if (orig_data
== NULL
)
8516 _bfd_generic_set_reloc
8519 void _bfd_generic_set_reloc
8523 unsigned int count);
8526 Installs a new set of internal relocations in SECTION.
8530 _bfd_generic_set_reloc (bfd
*abfd ATTRIBUTE_UNUSED
,
8535 section
->orelocation
= relptr
;
8536 section
->reloc_count
= count
;
8538 section
->flags
|= SEC_RELOC
;
8540 section
->flags
&= ~SEC_RELOC
;
8545 _bfd_unrecognized_reloc
8548 bool _bfd_unrecognized_reloc
8551 unsigned int r_type);
8554 Reports an unrecognized reloc.
8555 Written as a function in order to reduce code duplication.
8556 Returns FALSE so that it can be called from a return statement.
8560 _bfd_unrecognized_reloc (bfd
* abfd
, sec_ptr section
, unsigned int r_type
)
8562 /* xgettext:c-format */
8563 _bfd_error_handler (_("%pB: unrecognized relocation type %#x in section `%pA'"),
8564 abfd
, r_type
, section
);
8566 /* PR 21803: Suggest the most likely cause of this error. */
8567 _bfd_error_handler (_("is this version of the linker - %s - out of date ?"),
8568 BFD_VERSION_STRING
);
8570 bfd_set_error (bfd_error_bad_value
);
8575 _bfd_norelocs_bfd_reloc_type_lookup
8577 bfd_reloc_code_real_type code ATTRIBUTE_UNUSED
)
8579 return (reloc_howto_type
*) _bfd_ptr_bfd_null_error (abfd
);
8583 _bfd_norelocs_bfd_reloc_name_lookup (bfd
*abfd
,
8584 const char *reloc_name ATTRIBUTE_UNUSED
)
8586 return (reloc_howto_type
*) _bfd_ptr_bfd_null_error (abfd
);
8590 _bfd_nodynamic_canonicalize_dynamic_reloc (bfd
*abfd
,
8591 arelent
**relp ATTRIBUTE_UNUSED
,
8592 asymbol
**symp ATTRIBUTE_UNUSED
)
8594 return _bfd_long_bfd_n1_error (abfd
);