From fae746d9089e88166ddd2256b5df6f537118717b Mon Sep 17 00:00:00 2001 From: Dominic Clifton Date: Thu, 29 Dec 2022 05:37:47 +0100 Subject: [PATCH] Fix STM32H750 target support (#12091) --- src/main/drivers/flash.c | 7 +- src/main/target/STM32H750/target.h | 58 ++++++++++----- src/main/target/common_pre.h | 6 ++ support/scripts/build_spracingh7extreme.sh | 116 +++++++++++++++++++++++++++++ 4 files changed, 165 insertions(+), 22 deletions(-) create mode 100644 support/scripts/build_spracingh7extreme.sh diff --git a/src/main/drivers/flash.c b/src/main/drivers/flash.c index 4a026a946..773d9f239 100644 --- a/src/main/drivers/flash.c +++ b/src/main/drivers/flash.c @@ -117,13 +117,14 @@ static bool flashQuadSpiInit(const flashConfig_t *flashConfig) } #endif } + + if (detected) { + flashDevice.geometry.jedecId = chipID; + } } phase++; } while (phase != BAIL && !detected); - if (detected) { - flashDevice.geometry.jedecId = chipID; - } return detected; } #endif // USE_QUADSPI diff --git a/src/main/target/STM32H750/target.h b/src/main/target/STM32H750/target.h index d6a944a2e..181ded4c0 100644 --- a/src/main/target/STM32H750/target.h +++ b/src/main/target/STM32H750/target.h @@ -18,16 +18,51 @@ * If not, see . */ +/* + * This target won't actually build a target that you can boot, it is meant as + * a base target ONLY. + * + * When defining a target that uses this as a base you currently: + * + * 1) *must* define ALL the SPI instances that the target has, including their pins. + * 2) *must* define the storage subsystem used to boot, e.g. see CONFIG_IN_xxx. + * 3) *must* define all the settings required for the config storage system to + * be able to load the config at boot time BEFORE it has actually loaded a config. + * e.g. for QSPI define the QSPI instance, pins, mode, etc, + * for SDCARD define the SD card bus (SPI/SDIO), pins, etc. + * + */ + #pragma once +#ifndef TARGET_BOARD_IDENTIFIER #define TARGET_BOARD_IDENTIFIER "S750" +#endif +#ifndef USBD_PRODUCT_STRING #define USBD_PRODUCT_STRING "Betaflight STM32H750" +#endif +#if !defined(USE_I2C) +#define USE_I2C #define USE_I2C_DEVICE_1 #define USE_I2C_DEVICE_2 #define USE_I2C_DEVICE_3 #define USE_I2C_DEVICE_4 +#define I2C_FULL_RECONFIGURABILITY +#endif + +// Provide a default so that this target builds on the build server. +#if !defined(USE_SPI) +#define USE_SPI +#define USE_SPI_DEVICE_1 +#define USE_SPI_DEVICE_2 +#define USE_SPI_DEVICE_3 +#define USE_SPI_DEVICE_4 +#define USE_SPI_DEVICE_5 +#define USE_SPI_DEVICE_6 +#define SPI_FULL_RECONFIGURABILITY +#endif #define USE_UART1 #define USE_UART2 @@ -41,13 +76,6 @@ #define SERIAL_PORT_COUNT (UNIFIED_SERIAL_PORT_COUNT + 8) -#define USE_SPI_DEVICE_1 -#define USE_SPI_DEVICE_2 -#define USE_SPI_DEVICE_3 -#define USE_SPI_DEVICE_4 -#define USE_SPI_DEVICE_5 -#define USE_SPI_DEVICE_6 - #define TARGET_IO_PORTA 0xffff #define TARGET_IO_PORTB 0xffff #define TARGET_IO_PORTC 0xffff @@ -55,19 +83,8 @@ #define TARGET_IO_PORTE 0xffff #define TARGET_IO_PORTF 0xffff -#define USE_I2C -#define I2C_FULL_RECONFIGURABILITY - #define USE_BEEPER -#ifdef USE_SDCARD -#define USE_SDCARD_SPI -#define USE_SDCARD_SDIO -#endif - -#define USE_SPI -#define SPI_FULL_RECONFIGURABILITY - #define USE_VCP #define USE_SOFTSERIAL1 @@ -81,4 +98,7 @@ #define USE_ADC -#define CONFIG_IN_SDCARD +// Provide a default so that this target builds on the build server. +#if !defined(CONFIG_IN_RAM) && !defined(CONFIG_IN_SDCARD) && !defined(CONFIG_IN_EXTERNAL_FLASH) +#define CONFIG_IN_RAM +#endif diff --git a/src/main/target/common_pre.h b/src/main/target/common_pre.h index 11bc11def..935ecd0ac 100644 --- a/src/main/target/common_pre.h +++ b/src/main/target/common_pre.h @@ -238,6 +238,7 @@ extern uint8_t _dmaram_end__; #define USE_MAG #define USE_BARO +#if !defined(USE_GYRO) && !defined(USE_ACC) #define USE_ACC #define USE_GYRO @@ -261,7 +262,9 @@ extern uint8_t _dmaram_end__; #define USE_GYRO_MPU6050 #define USE_ACCGYRO_BMI160 #endif +#endif +#if !defined(USE_EXST) #define USE_FLASHFS #define USE_FLASH_TOOLS #define USE_FLASH_M25P16 @@ -270,13 +273,16 @@ extern uint8_t _dmaram_end__; #define USE_FLASH_W25M512 // 512Kb (256Kb x 2 stacked) NOR flash support #define USE_FLASH_W25M02G // 2Gb (1Gb x 2 stacked) NAND flash support #define USE_FLASH_W25Q128FV // 16MB Winbond 25Q128 +#endif #define USE_MAX7456 #define USE_RX_SPI #define USE_RX_CC2500 +#if !defined(USE_EXST) #define USE_SDCARD +#endif #if defined(STM32F405) || defined(STM32F745) || defined(STM32H7) #define USE_VTX_RTC6705 diff --git a/support/scripts/build_spracingh7extreme.sh b/support/scripts/build_spracingh7extreme.sh new file mode 100644 index 000000000..87b9b29db --- /dev/null +++ b/support/scripts/build_spracingh7extreme.sh @@ -0,0 +1,116 @@ +#!/bin/sh +set -x + +make DEBUG=INFO TARGET=STM32H750 EXTRA_FLAGS="\ +-D'TARGET_BOARD_IDENTIFIER=\"SP7E\"' \ +-D'USBD_PRODUCT_STRING=\"SPRacingH7EXTREME\"' \ +\ +-D'EEPROM_SIZE=8192' \ +-DUSE_SPRACING_PERSISTENT_RTC_WORKAROUND \ +\ +-DUSE_BUTTONS \ +-D'BUTTON_A_PIN=PE4' \ +-DBUTTON_A_PIN_INVERTED \ +-D'BUTTON_B_PIN=PE4' \ +-DBUTTON_B_PIN_INVERTED \ +\ +-DUSE_QUADSPI \ +-DUSE_QUADSPI_DEVICE_1 \ +-D'QUADSPI1_SCK_PIN=PB2' \ +-D'QUADSPI1_BK1_IO0_PIN=PD11' \ +-D'QUADSPI1_BK1_IO1_PIN=PD12' \ +-D'QUADSPI1_BK1_IO2_PIN=PE2' \ +-D'QUADSPI1_BK1_IO3_PIN=PD13' \ +-D'QUADSPI1_BK1_CS_PIN=PB10' \ +-D'QUADSPI1_BK2_IO0_PIN=PE7' \ +-D'QUADSPI1_BK2_IO1_PIN=PE8' \ +-D'QUADSPI1_BK2_IO2_PIN=PE9' \ +-D'QUADSPI1_BK2_IO3_PIN=PE10' \ +-D'QUADSPI1_BK2_CS_PIN=NONE' \ +-D'QUADSPI1_MODE=QUADSPI_MODE_BK1_ONLY' \ +-D'QUADSPI1_CS_FLAGS=(QUADSPI_BK1_CS_HARDWARE | QUADSPI_BK2_CS_NONE | QUADSPI_CS_MODE_LINKED )' \ +\ +-DUSE_SPI \ +\ +-DUSE_SPI_DEVICE_2 \ +-D'SPI2_SCK_PIN=PD3' \ +-D'SPI2_MISO_PIN=PC2' \ +-D'SPI2_MOSI_PIN=PC3' \ +-D'SPI2_NSS_PIN=PB12' \ +\ +-DUSE_SPI_DEVICE_3 \ +-D'SPI3_SCK_PIN=PB3' \ +-D'SPI3_MISO_PIN=PB4' \ +-D'SPI3_MOSI_PIN=PD6' \ +-D'SPI3_NSS_PIN=PA15' \ +\ +-DUSE_SPI_DEVICE_4 \ +-D'SPI4_SCK_PIN=PE12' \ +-D'SPI4_MISO_PIN=PE13' \ +-D'SPI4_MOSI_PIN=PE14' \ +-D'SPI4_NSS_PIN=PE11' \ +\ +-DUSE_FLASH_TOOLS \ +-DUSE_FLASH_W25N01G \ +-D'FLASH_QUADSPI_INSTANCE=QUADSPI' \ +-DCONFIG_IN_EXTERNAL_FLASH \ +\ +-DUSE_SDCARD \ +-D'SDCARD_DETECT_PIN=PD10' \ +-DSDCARD_DETECT_INVERTED \ +-D'SDIO_DEVICE=SDIODEV_1' \ +-D'SDIO_USE_4BIT=true' \ +-D'SDIO_CK_PIN=PC12' \ +-D'SDIO_CMD_PIN=PD2' \ +-D'SDIO_D0_PIN=PC8' \ +-D'SDIO_D1_PIN=PC9' \ +-D'SDIO_D2_PIN=PC10' \ +-D'SDIO_D3_PIN=PC11' \ +\ +-D'TARGET_IO_PORTA=0xffff' \ +-D'TARGET_IO_PORTB=0xffff' \ +-D'TARGET_IO_PORTC=0xffff' \ +-D'TARGET_IO_PORTD=0xffff' \ +-D'TARGET_IO_PORTE=0xffff' \ +-D'TARGET_IO_PORTF=0xffff' \ +-D'TARGET_IO_PORTG=0xffff' \ +\ +-DUSE_USB_ID \ +\ +-DUSE_I2C \ +-DUSE_I2C_DEVICE_1 \ +-D'I2C1_SCL=PB8' \ +-D'I2C1_SDA=PB9' \ +-D'I2C_DEVICE=(I2CDEV_1)' \ +\ +-DUSE_ACC \ +-DUSE_ACC_SPI_MPU6500 \ +-DUSE_GYRO \ +-DUSE_GYRO_SPI_MPU6500 \ +-DENSURE_MPU_DATA_READY_IS_LOW \ +\ +-DUSE_PID_AUDIO \ +-DVTX_RTC6705_OPTIONAL \ +\ +-D'ADC1_DMA_OPT=8' \ +-D'ADC3_DMA_OPT=9' \ +\ +-DUSE_FLASHFS \ +-DENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT \ +\ +" + +# Settings that are currently defined in target/common_pre.h for non-cloud builds that probably shouldn't be. +# There are here to illustrate that they SHOULD be included in THIS target when they are removed by default. + +#-DUSE_MAG \ +#-DUSE_MAG_HMC5883 \ +#-DUSE_MAG_QMC5883 \ +#-DUSE_BARO \ +#-DUSE_BARO_BMP388 \ +#-DUSE_TRANSPONDER \ +#-DUSE_OSD \ +#-DUSE_MAX7456 \ +#-DUSE_VTX_COMMON \ +#-DUSE_VTX_CONTROL \ +#-DUSE_VTX_RTC6705_SOFTSPI \ -- 2.11.4.GIT