From a302b5bae2f06c5edc4abb5c0e845850804efb63 Mon Sep 17 00:00:00 2001 From: mikeller Date: Sun, 24 Nov 2019 13:56:16 +1300 Subject: [PATCH] Removed ATOMIC_BARRIER check, fixed ITCM_RAM overflow. --- .travis.yml | 1 + Makefile | 19 ++++++++++++++----- make/targets_list.mk | 10 +++++++--- src/link/stm32_flash_h750_exst.ld | 7 +++++-- src/main/build/atomic.h | 7 ------- src/main/drivers/memprot_stm32h7xx.c | 2 +- src/main/sensors/boardalignment.c | 4 ++-- 7 files changed, 30 insertions(+), 20 deletions(-) diff --git a/.travis.yml b/.travis.yml index c38a0891e..23aff9c76 100644 --- a/.travis.yml +++ b/.travis.yml @@ -21,6 +21,7 @@ env: - GOAL=targets-group-2 - GOAL=targets-group-3 - GOAL=targets-group-4 + - GOAL=targets-group-5 - GOAL=targets-group-rest # - GOAL=all # - GOAL=AFROMINI diff --git a/Makefile b/Makefile index 43a18820c..4c3741cc0 100644 --- a/Makefile +++ b/Makefile @@ -235,6 +235,13 @@ CC_SPEED_OPTIMISATION := $(OPTIMISATION_BASE) $(OPTIMISE_SPEED) CC_SIZE_OPTIMISATION := $(OPTIMISATION_BASE) $(OPTIMISE_SIZE) CC_NO_OPTIMISATION := +# +# Added after GCC version update, remove once the warnings have been fixed +# +TEMPORARY_FLAGS := -Wno-stringop-truncation \ + -Wno-attributes \ + -Wno-cast-function-type + CFLAGS += $(ARCH_FLAGS) \ $(addprefix -D,$(OPTIONS)) \ $(addprefix -I,$(INCLUDE_DIRS)) \ @@ -245,10 +252,7 @@ CFLAGS += $(ARCH_FLAGS) \ -fdata-sections \ -fno-common \ -pedantic \ - -Wno-stringop-truncation \ - -Wno-attributes \ - -Wno-cast-function-type \ - -Wno-stringop-overflow \ + $(TEMPORARY_FLAGS) \ $(DEVICE_FLAGS) \ -D_GNU_SOURCE \ -DUSE_STDPERIPH_DRIVER \ @@ -462,9 +466,12 @@ targets-group-2: $(GROUP_2_TARGETS) ## targets-group-3 : build some targets targets-group-3: $(GROUP_3_TARGETS) -## targets-group-3 : build some targets +## targets-group-4 : build some targets targets-group-4: $(GROUP_4_TARGETS) +## targets-group-5 : build some targets +targets-group-5: $(GROUP_5_TARGETS) + ## targets-group-rest: build the rest of the targets (not listed in group 1, 2 or 3) targets-group-rest: $(GROUP_OTHER_TARGETS) @@ -599,12 +606,14 @@ targets: @echo "targets-group-2: $(GROUP_2_TARGETS)" @echo "targets-group-3: $(GROUP_3_TARGETS)" @echo "targets-group-4: $(GROUP_4_TARGETS)" + @echo "targets-group-5: $(GROUP_5_TARGETS)" @echo "targets-group-rest: $(GROUP_OTHER_TARGETS)" @echo "targets-group-1: $(words $(GROUP_1_TARGETS)) targets" @echo "targets-group-2: $(words $(GROUP_2_TARGETS)) targets" @echo "targets-group-3: $(words $(GROUP_3_TARGETS)) targets" @echo "targets-group-4: $(words $(GROUP_4_TARGETS)) targets" + @echo "targets-group-5: $(words $(GROUP_5_TARGETS)) targets" @echo "targets-group-rest: $(words $(GROUP_OTHER_TARGETS)) targets" @echo "total in all groups $(words $(CI_TARGETS)) targets" diff --git a/make/targets_list.mk b/make/targets_list.mk index 29310bd11..e5df6b66b 100644 --- a/make/targets_list.mk +++ b/make/targets_list.mk @@ -154,10 +154,10 @@ LEGACY_TARGETS := MATEKF405 \ TMOTORF7 \ TRANSTECF7 -CI_TARGETS := $(filter-out $(LEGACY_TARGETS), $(filter-out $(UNSUPPORTED_TARGETS), $(VALID_TARGETS))) +CI_TARGETS := $(filter-out $(LEGACY_TARGETS) $(UNSUPPORTED_TARGETS), $(VALID_TARGETS)) TARGETS_TOTAL := $(words $(CI_TARGETS)) -TARGET_GROUPS := 5 +TARGET_GROUPS := 6 TARGETS_PER_GROUP := $(shell expr $(TARGETS_TOTAL) / $(TARGET_GROUPS) ) ST := 1 @@ -176,4 +176,8 @@ ST := $(shell expr $(ET) + 1) ET := $(shell expr $(ST) + $(TARGETS_PER_GROUP)) GROUP_4_TARGETS := $(wordlist $(ST), $(ET), $(CI_TARGETS)) -GROUP_OTHER_TARGETS := $(filter-out $(GROUP_1_TARGETS) $(GROUP_2_TARGETS) $(GROUP_3_TARGETS) $(GROUP_4_TARGETS), $(CI_TARGETS)) +ST := $(shell expr $(ET) + 1) +ET := $(shell expr $(ST) + $(TARGETS_PER_GROUP)) +GROUP_5_TARGETS := $(wordlist $(ST), $(ET), $(CI_TARGETS)) + +GROUP_OTHER_TARGETS := $(filter-out $(GROUP_1_TARGETS) $(GROUP_2_TARGETS) $(GROUP_3_TARGETS) $(GROUP_4_TARGETS) $(GROUP_5_TARGETS), $(CI_TARGETS)) diff --git a/src/link/stm32_flash_h750_exst.ld b/src/link/stm32_flash_h750_exst.ld index c043a6ef7..bdae4c5a1 100644 --- a/src/link/stm32_flash_h750_exst.ld +++ b/src/link/stm32_flash_h750_exst.ld @@ -52,7 +52,7 @@ possible. */ /* see .exst section below */ -_exst_hash_size = 64; +_exst_hash_size = 64; /* Specify the memory areas */ MEMORY @@ -61,7 +61,10 @@ MEMORY DTCM_RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 128K RAM (rwx) : ORIGIN = 0x24000000, LENGTH = 64K CODE_RAM (rx) : ORIGIN = 0x24010000, LENGTH = 448K - _exst_hash_size /* hard coded start address, as required by SPRACINGH7 boot loader, don't change! */ - EXST_HASH (rx) : ORIGIN = 0x24010000 + LENGTH(CODE_RAM), LENGTH = _exst_hash_size + /*EXST_HASH (rx) : ORIGIN = 0x24010000 + LENGTH(CODE_RAM), LENGTH = _exst_hash_size*/ +/* Workaround for https://sourceware.org/bugzilla/show_bug.cgi?id=24289, + * revert after this has been fixed in the ARM gcc. */ + EXST_HASH (rx) : ORIGIN = 0x2407FFC0, LENGTH = _exst_hash_size D2_RAM (rwx) : ORIGIN = 0x30000000, LENGTH = 256K /* SRAM1 + SRAM2 */ diff --git a/src/main/build/atomic.h b/src/main/build/atomic.h index 323c0e5cb..43f5fe8e4 100644 --- a/src/main/build/atomic.h +++ b/src/main/build/atomic.h @@ -137,13 +137,6 @@ static inline uint8_t __basepriSetRetVal(uint8_t prio) // On gcc 5 and higher, this protects only memory passed as parameter (any type can be used) // this macro can be used only ONCE PER LINE, but multiple uses per block are fine -#if (__GNUC__ > 8) -# warning "Please verify that ATOMIC_BARRIER works as intended" -// increment version number if BARRIER works -// TODO - use flag to disable ATOMIC_BARRIER and use full barrier instead -// you should check that local variable scope with cleanup spans entire block -#endif - #ifndef __UNIQL # define __UNIQL_CONCAT2(x,y) x ## y # define __UNIQL_CONCAT(x,y) __UNIQL_CONCAT2(x,y) diff --git a/src/main/drivers/memprot_stm32h7xx.c b/src/main/drivers/memprot_stm32h7xx.c index 8e4fe2334..05b3a67f9 100644 --- a/src/main/drivers/memprot_stm32h7xx.c +++ b/src/main/drivers/memprot_stm32h7xx.c @@ -33,7 +33,7 @@ mpuRegion_t mpuRegions[] = { #ifdef USE_ITCM_RAM { // Mark ITCM-RAM as read-only - // "For Cortex®-M7, TCMs memories always behave as Non-cacheable, Non-shared normal memories, irrespectiveof the memory type attributes defined in the MPU for a memory region containing addresses held in the TCM" + // "For Cortex®-M7, TCMs memories always behave as Non-cacheable, Non-shared normal memories, irrespective of the memory type attributes defined in the MPU for a memory region containing addresses held in the TCM" // See AN4838 .start = 0x00000000, .end = 0, // Size defined by "size" diff --git a/src/main/sensors/boardalignment.c b/src/main/sensors/boardalignment.c index de312b070..fdefa6fec 100644 --- a/src/main/sensors/boardalignment.c +++ b/src/main/sensors/boardalignment.c @@ -64,12 +64,12 @@ void initBoardAlignment(const boardAlignment_t *boardAlignment) buildRotationMatrix(&rotationAngles, &boardRotation); } -FAST_CODE static void alignBoard(float *vec) +static FAST_CODE void alignBoard(float *vec) { applyRotation(vec, &boardRotation); } -FAST_CODE void alignSensorViaMatrix(float *dest, fp_rotationMatrix_t* sensorRotationMatrix) +FAST_CODE_NOINLINE void alignSensorViaMatrix(float *dest, fp_rotationMatrix_t* sensorRotationMatrix) { applyRotation(dest, sensorRotationMatrix); -- 2.11.4.GIT