STM32H730 - Initial ST32H730 support.

STM32H730 - Initial ST32H730 support.

The H730 is a value-line CPU, similar to the H723/H725, but with only
128kb RAM.

The FC firmware code is designed to RUN from external flash in MEMORY
MAPPED mode, via OctoSPI.  Use of ITCM/DTCM advised for core loops, like
PID control.

A bootloader is required to enable memory-mapped mode and jump to the
firmware, similar to how EXST bootloader system works.

Config storage is not part of this commit and is a problem when using a
single flash chip in memory mapped mode because the CPU can't run
read/write routines from the flash chip while writing to the flash chip.
Until flash read/write routines are updated the solution requires either
a second flash chip on an SPI interface, or the use of an SD card for
config storage.

Additional commits will support read/write of config to the code/data
storage flash chip to enable cheap and space efficient single-flash-chip
FC solutions.

Squashed commits:
STM32H730 - Workaround issue with 2GB `.elf` files being created.
STM32H730 - Reduce firmware size to 1MB.
STM32H730 - Add USB HS configuration.
STM32H730 - Add ADC internal tag mappings.
STM32H730 - Update all ADC mappings based on the referenced ST
documentation.  Add the VBAT channels.
STM32H730 - Fix DMA continuous requests.
STM32H730 - Fix ADC_INTERNAL confusion.
STM32H730/G4 - Disambiguate use of ADC_CHANNEL_INTERNAL_FIRST_ID.
STM32H730 - Fix documentation reference.
STM32H730 - Add DMA request mapping for ADC3.
STM32H730 - Explicitly set the ADC clock.
STM32H730 - Configure PLL2 speeds correctly.

* Tested with Ultrafast 64GB SanDisk SDXC card.

STM32H730 - Use 50Mhz clock for SDXC cards.

* Tested with SanDisk Ultra 64GB.  100Mhz clock gave CRC errors.

STM32H730 - Ensure USB has a lower NVIC priority than the SDMMC card
reads.

If it's higher, 0, then the SDMMC's DMA IRQ handler doesn't get called
when handing USB MSC storage reads.

STM32H730 - Support CPU name in CLI.

STM32H730 - Rebuild when linker scripts changes.