STM32F3DISCOVERY - Updating L3GD20 alignment defaults. (MJ666)
[betaflight.git] / src / main / drivers / timer_stm32f10x.c
blobf8016950f4b00b964f4b0016cc7b8c39964f705c
1 /*
2 modified version of StdPeriph function is located here.
3 TODO - what license does apply here?
4 original file was lincesed under MCD-ST Liberty SW License Agreement V2
5 http://www.st.com/software_license_agreement_liberty_v2
6 */
8 #include "stm32f10x.h"
10 /**
11 * @brief Selects the TIM Output Compare Mode.
12 * @note This function does NOT disable the selected channel before changing the Output
13 * Compare Mode.
14 * @param TIMx: where x can be 1 to 17 except 6 and 7 to select the TIM peripheral.
15 * @param TIM_Channel: specifies the TIM Channel
16 * This parameter can be one of the following values:
17 * @arg TIM_Channel_1: TIM Channel 1
18 * @arg TIM_Channel_2: TIM Channel 2
19 * @arg TIM_Channel_3: TIM Channel 3
20 * @arg TIM_Channel_4: TIM Channel 4
21 * @param TIM_OCMode: specifies the TIM Output Compare Mode.
22 * This parameter can be one of the following values:
23 * @arg TIM_OCMode_Timing
24 * @arg TIM_OCMode_Active
25 * @arg TIM_OCMode_Toggle
26 * @arg TIM_OCMode_PWM1
27 * @arg TIM_OCMode_PWM2
28 * @arg TIM_ForcedAction_Active
29 * @arg TIM_ForcedAction_InActive
30 * @retval None
33 #define CCMR_Offset ((uint16_t)0x0018)
35 void TIM_SelectOCxM_NoDisable(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode)
37 uint32_t tmp = 0;
39 /* Check the parameters */
40 assert_param(IS_TIM_LIST8_PERIPH(TIMx));
41 assert_param(IS_TIM_CHANNEL(TIM_Channel));
42 assert_param(IS_TIM_OCM(TIM_OCMode));
44 tmp = (uint32_t) TIMx;
45 tmp += CCMR_Offset;
47 if((TIM_Channel == TIM_Channel_1) ||(TIM_Channel == TIM_Channel_3))
49 tmp += (TIM_Channel>>1);
51 /* Reset the OCxM bits in the CCMRx register */
52 *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC1M);
54 /* Configure the OCxM bits in the CCMRx register */
55 *(__IO uint32_t *) tmp |= TIM_OCMode;
57 else
59 tmp += (uint16_t)(TIM_Channel - (uint16_t)4)>> (uint16_t)1;
61 /* Reset the OCxM bits in the CCMRx register */
62 *(__IO uint32_t *) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC2M);
64 /* Configure the OCxM bits in the CCMRx register */
65 *(__IO uint32_t *) tmp |= (uint16_t)(TIM_OCMode << 8);