src/main/drivers/rx/rx_cc2500.h

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 /*
  22  CC2500 SPI drivers
  23 */
  24
  25 #pragma once
  26
  27 #include <stdbool.h>
  28 #include <stdint.h>
  29
  30 #include "rx/rx_spi.h"
  31
  32 enum {
  33     CC2500_00_IOCFG2 = 0x00,   // GDO2 output pin configuration
  34     CC2500_01_IOCFG1 = 0x01,   // GDO1 output pin configuration
  35     CC2500_02_IOCFG0 = 0x02,   // GDO0 output pin configuration
  36     CC2500_03_FIFOTHR = 0x03,  // RX FIFO and TX FIFO thresholds
  37     CC2500_04_SYNC1 = 0x04,    // Sync word, high byte
  38     CC2500_05_SYNC0 = 0x05,    // Sync word, low byte
  39     CC2500_06_PKTLEN = 0x06,   // Packet length
  40     CC2500_07_PKTCTRL1 = 0x07, // Packet automation control
  41     CC2500_08_PKTCTRL0 = 0x08, // Packet automation control
  42     CC2500_09_ADDR = 0x09,     // Device address
  43     CC2500_0A_CHANNR = 0x0A,   // Channel number
  44     CC2500_0B_FSCTRL1 = 0x0B,  // Frequency synthesizer control
  45     CC2500_0C_FSCTRL0 = 0x0C,  // Frequency synthesizer control
  46     CC2500_0D_FREQ2 = 0x0D,    // Frequency control word, high byte
  47     CC2500_0E_FREQ1 = 0x0E,    // Frequency control word, middle byte
  48     CC2500_0F_FREQ0 = 0x0F,    // Frequency control word, low byte
  49     CC2500_10_MDMCFG4 = 0x10,  // Modem configuration
  50     CC2500_11_MDMCFG3 = 0x11,  // Modem configuration
  51     CC2500_12_MDMCFG2 = 0x12,  // Modem configuration
  52     CC2500_13_MDMCFG1 = 0x13,  // Modem configuration
  53     CC2500_14_MDMCFG0 = 0x14,  // Modem configuration
  54     CC2500_15_DEVIATN = 0x15,  // Modem deviation setting
  55     CC2500_16_MCSM2 = 0x16,    // Main Radio Cntrl State Machine config
  56     CC2500_17_MCSM1 = 0x17,    // Main Radio Cntrl State Machine config
  57     CC2500_18_MCSM0 = 0x18,    // Main Radio Cntrl State Machine config
  58     CC2500_19_FOCCFG = 0x19,   // Frequency Offset Compensation config
  59     CC2500_1A_BSCFG = 0x1A,    // Bit Synchronization configuration
  60     CC2500_1B_AGCCTRL2 = 0x1B, // AGC control
  61     CC2500_1C_AGCCTRL1 = 0x1C, // AGC control
  62     CC2500_1D_AGCCTRL0 = 0x1D, // AGC control
  63     CC2500_1E_WOREVT1 = 0x1E,  // High byte Event 0 timeout
  64     CC2500_1F_WOREVT0 = 0x1F,  // Low byte Event 0 timeout
  65     CC2500_20_WORCTRL = 0x20,  // Wake On Radio control
  66     CC2500_21_FREND1 = 0x21,   // Front end RX configuration
  67     CC2500_22_FREND0 = 0x22,   // Front end TX configuration
  68     CC2500_23_FSCAL3 = 0x23,   // Frequency synthesizer calibration
  69     CC2500_24_FSCAL2 = 0x24,   // Frequency synthesizer calibration
  70     CC2500_25_FSCAL1 = 0x25,   // Frequency synthesizer calibration
  71     CC2500_26_FSCAL0 = 0x26,   // Frequency synthesizer calibration
  72     CC2500_27_RCCTRL1 = 0x27,  // RC oscillator configuration
  73     CC2500_28_RCCTRL0 = 0x28,  // RC oscillator configuration
  74     CC2500_29_FSTEST = 0x29,   // Frequency synthesizer cal control
  75     CC2500_2A_PTEST = 0x2A,    // Production test
  76     CC2500_2B_AGCTEST = 0x2B,  // AGC test
  77     CC2500_2C_TEST2 = 0x2C,    // Various test settings
  78     CC2500_2D_TEST1 = 0x2D,    // Various test settings
  79     CC2500_2E_TEST0 = 0x2E,    // Various test settings
  80
  81     // Status registers
  82     CC2500_30_PARTNUM = 0x30,    // Part number
  83     CC2500_31_VERSION = 0x31,    // Current version number
  84     CC2500_32_FREQEST = 0x32,    // Frequency offset estimate
  85     CC2500_33_LQI = 0x33,        // Demodulator estimate for link quality
  86     CC2500_34_RSSI = 0x34,       // Received signal strength indication
  87     CC2500_35_MARCSTATE = 0x35,  // Control state machine state
  88     CC2500_36_WORTIME1 = 0x36,   // High byte of WOR timer
  89     CC2500_37_WORTIME0 = 0x37,   // Low byte of WOR timer
  90     CC2500_38_PKTSTATUS = 0x38,  // Current GDOx status and packet status
  91     CC2500_39_VCO_VC_DAC = 0x39, // Current setting from PLL cal module
  92     CC2500_3A_TXBYTES = 0x3A,    // Underflow and # of bytes in TXFIFO
  93     CC2500_3B_RXBYTES = 0x3B,    // Overflow and # of bytes in RXFIFO
  94
  95     // Multi byte memory locations
  96     CC2500_3E_PATABLE = 0x3E,
  97     CC2500_3F_TXFIFO = 0x3F,
  98     CC2500_3F_RXFIFO = 0x3F
  99 };
 100
 101 // Definitions for burst/single access to registers
 102 #define CC2500_WRITE_SINGLE 0x00
 103 #define CC2500_WRITE_BURST 0x40
 104 #define CC2500_READ_SINGLE 0x80
 105 #define CC2500_READ_BURST 0xC0
 106
 107 // Strobe commands
 108 #define CC2500_SRES 0x30 // Reset chip.
 109 #define CC2500_SFSTXON                                                         \
 110     0x31 // Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1).
 111          // If in RX/TX: Go to a wait state where only the synthesizer is
 112          // running (for quick RX / TX turnaround).
 113 #define CC2500_SXOFF 0x32 // Turn off crystal oscillator.
 114 #define CC2500_SCAL 0x33  // Calibrate frequency synthesizer and turn it off
 115                           // (enables quick start).
 116 #define CC2500_SRX                                                             \
 117     0x34 // Enable RX. Perform calibration first if coming from IDLE and
 118          // MCSM0.FS_AUTOCAL=1.
 119 #define CC2500_STX                                                             \
 120     0x35 // In IDLE state: Enable TX. Perform calibration first if
 121          // MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled:
 122          // Only go to TX if channel is clear.
 123 #define CC2500_SIDLE                                                           \
 124     0x36 // Exit RX / TX, turn off frequency synthesizer and exit
 125          // Wake-On-Radio mode if applicable.
 126 #define CC2500_SAFC 0x37 // Perform AFC adjustment of the frequency synthesizer
 127 #define CC2500_SWOR 0x38 // Start automatic RX polling sequence (Wake-on-Radio)
 128 #define CC2500_SPWD 0x39 // Enter power down mode when CSn goes high.
 129 #define CC2500_SFRX 0x3A // Flush the RX FIFO buffer.
 130 #define CC2500_SFTX 0x3B // Flush the TX FIFO buffer.
 131 #define CC2500_SWORRST 0x3C // Reset real time clock.
 132 #define CC2500_SNOP                                                            \
 133     0x3D // No operation. May be used to pad strobe commands to two
 134          // bytes for simpler software.
 135 //----------------------------------------------------------------------------------
 136 // Chip Status Byte
 137 //----------------------------------------------------------------------------------
 138
 139 // Bit fields in the chip status byte
 140 #define CC2500_STATUS_CHIP_RDYn_BM 0x80
 141 #define CC2500_STATUS_STATE_BM 0x70
 142 #define CC2500_STATUS_FIFO_BYTES_AVAILABLE_BM 0x0F
 143
 144 // Chip states
 145 #define CC2500_STATE_IDLE 0x00
 146 #define CC2500_STATE_RX 0x10
 147 #define CC2500_STATE_TX 0x20
 148 #define CC2500_STATE_FSTXON 0x30
 149 #define CC2500_STATE_CALIBRATE 0x40
 150 #define CC2500_STATE_SETTLING 0x50
 151 #define CC2500_STATE_RX_OVERFLOW 0x60
 152 #define CC2500_STATE_TX_UNDERFLOW 0x70
 153
 154 //----------------------------------------------------------------------------------
 155 // Other register bit fields
 156 //----------------------------------------------------------------------------------
 157 #define CC2500_LQI_CRC_OK_BM 0x80
 158 #define CC2500_LQI_EST_BM 0x7F
 159
 160 void cc2500ReadFifo(uint8_t *dpbuffer, uint8_t len);
 161 void cc2500WriteFifo(uint8_t *dpbuffer, uint8_t len);
 162
 163 void cc2500ReadRegisterMulti(uint8_t address, uint8_t *data,
 164                                  uint8_t length);
 165 void cc2500WriteRegisterMulti(uint8_t address, uint8_t *data,
 166                                   uint8_t length);
 167
 168 uint8_t cc2500ReadReg(uint8_t reg);
 169 void cc2500Strobe(uint8_t address);
 170 void cc2500WriteReg(uint8_t address, uint8_t data);
 171 void cc2500SetPower(uint8_t power);
 172 uint8_t cc2500Reset(void);