From 9422a041919f64def89fab9a1542521ad3b632dc Mon Sep 17 00:00:00 2001 From: schulz Date: Wed, 30 Jan 2019 20:00:58 +0000 Subject: [PATCH] use AROS_LE* macros git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@55611 fb15a70f-31f2-0310-bbcc-cdcc74a49acc --- arch/arm-native/soc/broadcom/2708/gpio/gpio_init.c | 11 ++++++----- arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c | 11 ++++++----- 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/arch/arm-native/soc/broadcom/2708/gpio/gpio_init.c b/arch/arm-native/soc/broadcom/2708/gpio/gpio_init.c index aa7a229fad..91a933bca0 100644 --- a/arch/arm-native/soc/broadcom/2708/gpio/gpio_init.c +++ b/arch/arm-native/soc/broadcom/2708/gpio/gpio_init.c @@ -1,11 +1,12 @@ /* - Copyright © 2015, The AROS Development Team. All rights reserved. + Copyright � 2015, The AROS Development Team. All rights reserved. $Id$ */ #define DEBUG 0 #include +#include #include #include #include @@ -29,7 +30,7 @@ static int gpio_init(struct GPIOBase *GPIOBase) InitSemaphore(&GPIOBase->gpio_Sem); D(bug("[GPIO] %s: Initialised Semaphore @ 0x%p\n", __PRETTY_FUNCTION__, &GPIOBase->gpio_Sem)); - + retval = TRUE; } return retval; @@ -48,7 +49,7 @@ AROS_LH2(void, GPIOSet, D(bug("[GPIO] %s(#%d,%d)\n", __PRETTY_FUNCTION__, pin, val)); if (GPIOBase->gpio_periiobase && (pin <= 53)) - { + { reg = val? GPSET0: GPCLR0; reg += (pin >> 5) << 2; /* (pin / 32) << 2 */ @@ -56,7 +57,7 @@ AROS_LH2(void, GPIOSet, ObtainSemaphore(&GPIOBase->gpio_Sem); - *(volatile unsigned int *)reg = bit; + *(volatile unsigned int *)reg = AROS_LONG2LE(bit); ReleaseSemaphore(&GPIOBase->gpio_Sem); } @@ -88,7 +89,7 @@ AROS_LH2(void, GPIOSetFunc, ObtainSemaphore(&GPIOBase->gpio_Sem); - *(volatile unsigned int *)reg = func; + *(volatile unsigned int *)reg = AROS_LONG2LE(func); ReleaseSemaphore(&GPIOBase->gpio_Sem); } diff --git a/arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c b/arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c index e3537701f0..6c367ebf78 100644 --- a/arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c +++ b/arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c @@ -5,6 +5,7 @@ #define DEBUG 0 +#include #include #include #include @@ -39,7 +40,7 @@ AROS_LH1(unsigned int, MBoxStatus, D(bug("[MBox] MBoxStatus(0x%p)\n", mb)); - return *((volatile unsigned int *)(mb + VCMB_STATUS)); + return AROS_LE2LONG(*((volatile unsigned int *)(mb + VCMB_STATUS))); AROS_LIBFUNC_EXIT } @@ -74,8 +75,8 @@ AROS_LH2(volatile unsigned int *, MBoxRead, } asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) ); - msg = *((volatile unsigned int *)(mb + VCMB_READ)); - + msg = AROS_LE2LONG(*((volatile unsigned int *)(mb + VCMB_READ))); + asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) ); ReleaseSemaphore(&MBoxBase->mbox_Sem); @@ -100,7 +101,7 @@ AROS_LH3(void, MBoxWrite, D(bug("[MBOX] MBoxWrite(chan %d @ 0x%p, msg @ 0x%p)\n", chan, mb, msg)); if ((((unsigned int)msg & VCMB_CHAN_MASK) == 0) && (chan <= VCMB_CHAN_MAX)) - { + { ULONG length = ((ULONG *)msg)[0]; void *phys_addr = CachePreDMA(msg, &length, DMA_ReadFromRAM); @@ -115,7 +116,7 @@ AROS_LH3(void, MBoxWrite, asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) ); - *((volatile unsigned int *)(mb + VCMB_WRITE)) = ((unsigned int)phys_addr | chan); + *((volatile unsigned int *)(mb + VCMB_WRITE)) = AROS_LONG2LE(((unsigned int)phys_addr | chan)); ReleaseSemaphore(&MBoxBase->mbox_Sem); } -- 2.11.4.GIT