From 89cd862325d6ef7a4f5cdf1499e5ac4c0c56acc3 Mon Sep 17 00:00:00 2001
From: jmcmullan <jmcmullan@fb15a70f-31f2-0310-bbcc-cdcc74a49acc>
Date: Mon, 17 Sep 2012 04:25:43 +0000
Subject: [PATCH] pciusb.device: Move EHCI to HALT state before attempting a
 reset

Signed-off-by: Jason S. McMullan <jason.mcmullan@gmail.com>

git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@45819 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
---
 rom/usb/pciusb/ehcichip.c | 28 ++++++++++++++++++++++++++--
 1 file changed, 26 insertions(+), 2 deletions(-)

diff --git a/rom/usb/pciusb/ehcichip.c b/rom/usb/pciusb/ehcichip.c
index 5e6469e677..ac166b4c12 100644
--- a/rom/usb/pciusb/ehcichip.c
+++ b/rom/usb/pciusb/ehcichip.c
@@ -1242,6 +1242,7 @@ BOOL ehciInit(struct PCIController *hc, struct PCIUnit *hu) {
     ULONG extcapoffset;
     ULONG legsup;
     ULONG timeout;
+    ULONG tmp;
 
     ULONG cnt;
 
@@ -1438,8 +1439,31 @@ BOOL ehciInit(struct PCIController *hc, struct PCIUnit *hu) {
         KPRINTF(10, ("RegBase = 0x%p\n", hc->hc_RegBase));
 
         KPRINTF(10, ("Resetting EHCI HC\n"));
-        CONSTWRITEREG32_LE(hc->hc_RegBase, EHCI_USBCMD, EHUF_HCRESET|(1UL<<EHUS_INTTHRESHOLD));
-        uhwDelayMS(10, hu);
+        KPRINTF(10, ("EHCI CMD: 0x%08x STS: 0x%08x\n", READREG32_LE(hc->hc_RegBase, EHCI_USBCMD), READREG32_LE(hc->hc_RegBase, EHCI_USBSTATUS)));
+        /* Step 1: Stop the HC */
+        tmp = READREG32_LE(hc->hc_RegBase, EHCI_USBCMD);
+        tmp &= ~EHUF_RUNSTOP;
+        CONSTWRITEREG32_LE(hc->hc_RegBase, EHCI_USBCMD, tmp);
+
+        /* Step 2. Wait for the controller to halt */
+        cnt = 100;
+        do
+        {
+            uhwDelayMS(10, hu);
+            if(READREG32_LE(hc->hc_RegBase, EHCI_USBSTATUS) & EHSF_HCHALTED)
+            {
+                break;
+            }
+        } while (cnt--);
+        if (cnt == 0)
+        {
+            KPRINTF(200, ("EHCI: Timeout waiting for controller to halt\n"));
+        }
+
+        /* Step 3. Reset the controller */
+        WRITEREG32_LE(hc->hc_RegBase, EHCI_USBCMD, tmp | EHUF_HCRESET);
+
+        /* Step 4. Wait for the reset bit to clear */
         cnt = 100;
         do
         {
-- 
2.11.4.GIT