From 6b0f26ca040907055ff19cd798a7fc54fe78378d Mon Sep 17 00:00:00 2001
From: NicJA <NicJA@fb15a70f-31f2-0310-bbcc-cdcc74a49acc>
Date: Tue, 19 Feb 2013 22:26:02 +0000
Subject: [PATCH] start trying to probe cpu details.

git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@46656 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
---
 arch/arm-raspi/processor/mmakefile.src           |  1 -
 arch/arm-raspi/processor/processor_arch_intern.h |  2 +-
 arch/arm-raspi/processor/processor_init.c        |  5 +-
 arch/arm-raspi/processor/processor_util.c        | 65 +++++++++++++++++++++++-
 4 files changed, 68 insertions(+), 5 deletions(-)

diff --git a/arch/arm-raspi/processor/mmakefile.src b/arch/arm-raspi/processor/mmakefile.src
index f249eef005..7dd5f42d28 100644
--- a/arch/arm-raspi/processor/mmakefile.src
+++ b/arch/arm-raspi/processor/mmakefile.src
@@ -10,7 +10,6 @@ FILES := \
     processor_util \
     processor_frequency
 
-
 %build_archspecific mainmmake=kernel-processor maindir=rom/processor \
     arch=raspi-arm files=$(FILES)
 
diff --git a/arch/arm-raspi/processor/processor_arch_intern.h b/arch/arm-raspi/processor/processor_arch_intern.h
index 245da1abc4..1c58b70a64 100644
--- a/arch/arm-raspi/processor/processor_arch_intern.h
+++ b/arch/arm-raspi/processor/processor_arch_intern.h
@@ -10,7 +10,7 @@
 
 struct ARMProcessorInformation
 {
-    TEXT    VendorID[13]; /* 12 + \0 */
+    char    *VendorID;
     ULONG   Vendor;
     TEXT    BrandStringBuffer[48];
     STRPTR  BrandString;
diff --git a/arch/arm-raspi/processor/processor_init.c b/arch/arm-raspi/processor/processor_init.c
index 2413a1e828..87798a77a3 100644
--- a/arch/arm-raspi/processor/processor_init.c
+++ b/arch/arm-raspi/processor/processor_init.c
@@ -35,7 +35,10 @@ LONG Processor_Init(struct ProcessorBase * ProcessorBase)
 
     /* Boot CPU is number 0. Fill in its data. */
     ReadProcessorInformation(sysprocs[0]);
-    
+
+    D(bug("[processor.ARM] %s: Vendor %d '%s', Family %d\n", __PRETTY_FUNCTION__, sysprocs[0]->Vendor, sysprocs[0]->VendorID, sysprocs[0]->Family));
+    D(bug("[processor.ARM] %s: L1DataC %d, L1InstrC %d\n", __PRETTY_FUNCTION__, sysprocs[0]->L1DataCacheSize, sysprocs[0]->L1InstructionCacheSize));
+
     return TRUE;
 }
 
diff --git a/arch/arm-raspi/processor/processor_util.c b/arch/arm-raspi/processor/processor_util.c
index 4f1e16180d..eb41eedabb 100644
--- a/arch/arm-raspi/processor/processor_util.c
+++ b/arch/arm-raspi/processor/processor_util.c
@@ -11,9 +11,70 @@
 
 #include "processor_arch_intern.h"
 
+static const char *vendors[] =
+{
+    "Unknown",
+    "ARM",
+    "DEC",
+    "Motorola",
+    "Texas Instruments",
+    "Qualcomm",
+    "Marvell",
+    "Intel",
+    NULL
+};
+
+
 VOID ReadProcessorInformation(struct ARMProcessorInformation * info)
 {
-    D(bug("[processor.ARM] :%s()\n", __PRETTY_FUNCTION__));
+    register unsigned int scp_reg;
+    APTR ssp;
 
-}
+    D(bug("[processor.ARM] %s()\n", __PRETTY_FUNCTION__));
+
+    ssp = SuperState();
+
+    D(bug("[processor.ARM] %s: Probing CPU ..\n", __PRETTY_FUNCTION__));
+
+    asm volatile("mrc p15, 0, %[scp_reg], c0, c0, 0" : [scp_reg] "=X" (scp_reg) );
 
+    info->Vendor = (scp_reg >> 24) & 0x7F;
+    info->Family = (scp_reg >> 16) & 0xF;
+
+    asm volatile("mrc p15, 0, %[scp_reg], c0, c0, 1" : [scp_reg] "=X" (scp_reg) );
+
+    info->L1DataCacheSize = (scp_reg >> 18) & 0xF;
+    info->L1InstructionCacheSize = (scp_reg >> 6) & 0xF;
+
+    D(bug("[processor.ARM] %s: .. Done\n", __PRETTY_FUNCTION__));
+
+    UserState(ssp);
+
+    switch (info->Vendor) {
+        case 'A':
+            info->VendorID = vendors[1];
+            break;
+        case 'D':
+            info->VendorID = vendors[2];
+            break;
+        case 'M':
+            info->VendorID = vendors[3];
+            break;
+        case 'T':
+            info->VendorID = vendors[4];
+            break;
+        case 'Q':
+            info->VendorID = vendors[5];
+            break;
+        case 'V':
+            info->VendorID = vendors[6];
+            break;
+        case 'i':
+            info->VendorID = vendors[7];
+            break;
+        default:
+            info->VendorID = vendors[0];
+            break;
+    }
+    D(bug("[processor.ARM] %s: CPU Details Read\n", __PRETTY_FUNCTION__));
+}
-- 
2.11.4.GIT