From 395b40cb22df1e35e028c4356dda664f5c414f60 Mon Sep 17 00:00:00 2001 From: NicJA Date: Mon, 20 Mar 2017 16:01:09 +0000 Subject: [PATCH] small tidy up. keep acpi open for the scope of the class, since we will need it again, and move its base into the static data. use the acpica provided table signature. rename some pc specific functions so they have more suitable names. git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@54201 fb15a70f-31f2-0310-bbcc-cdcc74a49acc --- arch/all-pc/hidds/pcipc/driverclass.c | 61 ++++++++++++++++++----------------- arch/all-pc/hidds/pcipc/pci.h | 36 ++++++++++++--------- arch/all-pc/hidds/pcipc/pciconf2.c | 18 +++++------ 3 files changed, 61 insertions(+), 54 deletions(-) diff --git a/arch/all-pc/hidds/pcipc/driverclass.c b/arch/all-pc/hidds/pcipc/driverclass.c index e4942873cf..af7313bb3f 100644 --- a/arch/all-pc/hidds/pcipc/driverclass.c +++ b/arch/all-pc/hidds/pcipc/driverclass.c @@ -19,6 +19,9 @@ #include #include +#include +#include + #include "pci.h" #undef HiddPCIDriverAttrBase @@ -29,9 +32,6 @@ #define HiddAttrBase (PSD(cl)->hiddAB) #define HiddPCIDeviceAttrBase (PSD(cl)->hidd_PCIDeviceAB) -/* ACPICABase is optional */ -struct Library *ACPICABase; - /* We overload the New method in order to introduce the Hidd Name and HardwareName attributes. @@ -41,9 +41,9 @@ OOP_Object *PCPCI__Root__New(OOP_Class *cl, OOP_Object *o, struct pRoot_New *msg struct pRoot_New mymsg; struct TagItem mytags[] = { - { aHidd_Name , (IPTR)"PCINative" }, - { aHidd_HardwareName, (IPTR)"IA32 native direct access PCI driver" }, - { TAG_DONE , 0 } + { aHidd_Name, (IPTR)"pcipc.hidd" }, + { aHidd_HardwareName, (IPTR)"IA32 native direct access PCI driver" }, + { TAG_DONE, 0 } }; mymsg.mID = msg->mID; @@ -63,9 +63,9 @@ IPTR PCPCI__Hidd_PCIDriver__HasExtendedConfig(OOP_Class *cl, OOP_Object *o, { IPTR mmio = 0; - if(PSD(cl)->mcfg_tbl) { + if(PSD(cl)->pcipc_acpiMcfgTbl) { - const ACPI_TABLE_MCFG *mcfg_tbl = (APTR)PSD(cl)->mcfg_tbl; + const ACPI_TABLE_MCFG *mcfg_tbl = (APTR)PSD(cl)->pcipc_acpiMcfgTbl; const ACPI_MCFG_ALLOCATION *mcfg_alloc = (APTR)mcfg_tbl + sizeof(ACPI_TABLE_MCFG); do { @@ -188,43 +188,39 @@ void PCPCI__Hidd_PCIDriver__WriteConfigLong(OOP_Class *cl, OOP_Object *o, } } +#undef _psd + /* Class initialization and destruction */ static int PCPCI_InitClass(LIBBASETYPEPTR LIBBASE) { + struct pcipc_staticdata *_psd = &LIBBASE->psd; + struct pHidd_PCI_AddHardwareDriver msg, *pmsg = &msg; OOP_Object *pci; - - D(bug("[PCI.PC] Driver initialization\n")); - struct pHidd_PCI_AddHardwareDriver msg,*pmsg=&msg; + D(bug("[PCI.PC] Driver initialization\n")); - /* - We only (try to) fetch the mcfg_table, no need to keep ACPI library open. - */ + /* Open ACPI and cache the pointer to the MCFG table.. */ ACPICABase = OpenLibrary("acpica.library", 0); - if(ACPICABase) { - if(AcpiGetTable("MCFG", 1, (ACPI_TABLE_HEADER **)&LIBBASE->psd.mcfg_tbl) != AE_OK) { - LIBBASE->psd.mcfg_tbl = NULL; - } - CloseLibrary(ACPICABase); - } + if (ACPICABase) + AcpiGetTable(ACPI_SIG_MCFG, 1, (ACPI_TABLE_HEADER **)&_psd->pcipc_acpiMcfgTbl); - LIBBASE->psd.hiddPCIDriverAB = OOP_ObtainAttrBase(IID_Hidd_PCIDriver); - LIBBASE->psd.hiddAB = OOP_ObtainAttrBase(IID_Hidd); - LIBBASE->psd.hidd_PCIDeviceAB = OOP_ObtainAttrBase(IID_Hidd_PCIDevice); - if (LIBBASE->psd.hiddPCIDriverAB == 0 || LIBBASE->psd.hiddAB == 0 || LIBBASE->psd.hidd_PCIDeviceAB == 0) + _psd->hiddPCIDriverAB = OOP_ObtainAttrBase(IID_Hidd_PCIDriver); + _psd->hiddAB = OOP_ObtainAttrBase(IID_Hidd); + _psd->hidd_PCIDeviceAB = OOP_ObtainAttrBase(IID_Hidd_PCIDevice); + if (_psd->hiddPCIDriverAB == 0 || _psd->hiddAB == 0 || _psd->hidd_PCIDeviceAB == 0) { D(bug("[PCI.PC] ObtainAttrBases failed\n")); return FALSE; } - /* By default we use mechanism 1 */ - LIBBASE->psd.ReadConfigLong = ReadConfig1Long; - LIBBASE->psd.WriteConfigLong = WriteConfig1Long; + /* Default to using config mechanism 1 */ + _psd->ReadConfigLong = ReadConfig1Long; + _psd->WriteConfigLong = WriteConfig1Long; - ProbePCI(&LIBBASE->psd); + PCIPC_ProbeConfMech(&LIBBASE->psd); - msg.driverClass = LIBBASE->psd.driverClass; + msg.driverClass = _psd->driverClass; msg.mID = OOP_GetMethodID(IID_Hidd_PCI, moHidd_PCI_AddHardwareDriver); D(bug("[PCI.PC] Registering Driver with PCI base class..\n")); @@ -239,12 +235,17 @@ static int PCPCI_InitClass(LIBBASETYPEPTR LIBBASE) static int PCPCI_ExpungeClass(LIBBASETYPEPTR LIBBASE) { + struct pcipc_staticdata *_psd = &LIBBASE->psd; + D(bug("[PCI.PC] Class destruction\n")); OOP_ReleaseAttrBase(IID_Hidd_PCIDevice); OOP_ReleaseAttrBase(IID_Hidd_PCIDriver); OOP_ReleaseAttrBase(IID_Hidd); - + + if (ACPICABase) + CloseLibrary(ACPICABase); + return TRUE; } diff --git a/arch/all-pc/hidds/pcipc/pci.h b/arch/all-pc/hidds/pcipc/pci.h index bcab26c222..8c9b195562 100644 --- a/arch/all-pc/hidds/pcipc/pci.h +++ b/arch/all-pc/hidds/pcipc/pci.h @@ -27,29 +27,38 @@ #define LEGACY_SUPPORT #endif -struct pci_staticdata +struct pcipc_staticdata { - OOP_AttrBase hiddPCIDriverAB; - OOP_AttrBase hiddAB; + OOP_AttrBase hiddPCIDriverAB; + OOP_AttrBase hiddAB; - OOP_AttrBase hidd_PCIDeviceAB; + OOP_AttrBase hidd_PCIDeviceAB; - OOP_Class *driverClass; + OOP_Class *driverClass; /* Low-level sub-methods */ - ULONG (*ReadConfigLong)(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg); - void (*WriteConfigLong)(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg, ULONG val); + ULONG (*ReadConfigLong)(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg); + void (*WriteConfigLong)(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg, ULONG val); - ACPI_TABLE_MCFG *mcfg_tbl; + /* ACPI related */ + struct Library *pcipc_acpiBase; + ACPI_TABLE_MCFG *pcipc_acpiMcfgTbl; }; struct pcibase { struct Library LibNode; - struct pci_staticdata psd; + struct pcipc_staticdata psd; }; +#define BASE(lib) ((struct pcibase*)(lib)) +#define PSD(cl) (&((struct pcibase*)cl->UserData)->psd) +#define _psd PSD(cl) + +#undef ACPICABase +#define ACPICABase (_psd->pcipc_acpiBase) + /* PCI configuration mechanism 1 registers */ #define PCI_AddressPort 0x0cf8 #define PCI_DataPort 0x0cfc @@ -78,9 +87,6 @@ struct pcibase #define PCI_VENDOR_INTEL 0x8086 #define PCI_VENDOR_COMPAQ 0x0e11 -#define BASE(lib) ((struct pcibase*)(lib)) - -#define PSD(cl) (&((struct pcibase*)cl->UserData)->psd) typedef union _pcicfg { @@ -89,7 +95,7 @@ typedef union _pcicfg UBYTE ub[4]; } pcicfg; -static inline UWORD ReadConfigWord(struct pci_staticdata *psd, UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg) +static inline UWORD ReadConfigWord(struct pcipc_staticdata *psd, UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg) { pcicfg temp; @@ -102,11 +108,11 @@ void WriteConfig1Long(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg, ULONG val); #ifdef LEGACY_SUPPORT -void ProbePCI(struct pci_staticdata *psd); +void PCIPC_ProbeConfMech(struct pcipc_staticdata *psd); #else -#define ProbePCI(x) +#define PCIPC_ProbeConfMech(x) #endif diff --git a/arch/all-pc/hidds/pcipc/pciconf2.c b/arch/all-pc/hidds/pcipc/pciconf2.c index 51ad617ab3..15128e03ec 100644 --- a/arch/all-pc/hidds/pcipc/pciconf2.c +++ b/arch/all-pc/hidds/pcipc/pciconf2.c @@ -50,7 +50,7 @@ static void WriteConfig2Long(UBYTE bus, UBYTE dev, UBYTE sub, UWORD reg, ULONG v } } -static inline BOOL SanityCheck(struct pci_staticdata *psd) +static inline BOOL SanityCheck(struct pcipc_staticdata *psd) { UWORD temp; @@ -63,7 +63,7 @@ static inline BOOL SanityCheck(struct pci_staticdata *psd) return FALSE; } -static BOOL ProbeMech1(struct pci_staticdata *psd) +static BOOL PCIPC_ProbeMech1Conf(struct pcipc_staticdata *psd) { ULONG temp = inl(PCI_AddressPort); ULONG val; @@ -86,15 +86,15 @@ static BOOL ProbeMech1(struct pci_staticdata *psd) return FALSE; } -void ProbePCI(struct pci_staticdata *psd) +void PCIPC_ProbeConfMech(struct pcipc_staticdata *psd) { /* - * All new board support only mechanism 1. So we probe for it first. - * We do it because on some machines (MacMini) PCI_MechSelect is - * used by chipset as a reset register (and perhaps some other proprietary control). - * Writing 0x01 to it makes machine cold reboot not working. + * All newer boards support atleast mechanism 1. + * We probe for it first, because on some machines (e.g. MacMini), PCI_MechSelect is + * used by the chipset as a reset register (and perhaps some other proprietary control). + * Writing 0x01 to it makes the machine's cold reboot mechanism stop working. */ - if (ProbeMech1(psd)) + if (PCIPC_ProbeMech1Conf(psd)) return; /* @@ -102,7 +102,7 @@ void ProbePCI(struct pci_staticdata *psd) * Perhaps it's Intel Neptune or alike board. We can try to switch it to Mech1. */ outb(0x01, PCI_MechSelect); - if (ProbeMech1(psd)) + if (PCIPC_ProbeMech1Conf(psd)) return; /* Completely no support. Try mechanism 2. */ -- 2.11.4.GIT