From 258d2d4417a9d9622d3de676ff93332ba3885049 Mon Sep 17 00:00:00 2001 From: sonic Date: Sat, 19 Jan 2013 17:39:07 +0000 Subject: [PATCH] Detab git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@46341 fb15a70f-31f2-0310-bbcc-cdcc74a49acc --- rom/hidds/hidd.pci/pcideviceclass.c | 946 ++++++++++++++++++------------------ rom/hidds/hidd.pci/pcidriverclass.c | 50 +- 2 files changed, 498 insertions(+), 498 deletions(-) diff --git a/rom/hidds/hidd.pci/pcideviceclass.c b/rom/hidds/hidd.pci/pcideviceclass.c index 66b48b8bac..e60e339d0f 100644 --- a/rom/hidds/hidd.pci/pcideviceclass.c +++ b/rom/hidds/hidd.pci/pcideviceclass.c @@ -1,5 +1,5 @@ /* - Copyright © 2004-2012, The AROS Development Team. All rights reserved. + Copyright © 2004-2013, The AROS Development Team. All rights reserved. $Id$ Desc: PCI device class @@ -20,9 +20,9 @@ #include #undef HiddPCIDeviceAttrBase -#define HiddPCIDeviceAttrBase (PSD(cl)->hiddPCIDeviceAB) +#define HiddPCIDeviceAttrBase (PSD(cl)->hiddPCIDeviceAB) #undef HiddPCIDriverAttrBase -#define HiddPCIDriverAttrBase (PSD(cl)->hiddPCIDriverAB) +#define HiddPCIDriverAttrBase (PSD(cl)->hiddPCIDriverAB) static void setLong(OOP_Class *cl, OOP_Object *o, ULONG reg, ULONG value) { @@ -198,126 +198,126 @@ OOP_Object *PCIDev__Root__New(OOP_Class *cl, OOP_Object *o, struct pRoot_New *ms o = (OOP_Object *)OOP_DoSuperMethod(cl, o, (OOP_Msg) msg); if (o) { - struct TagItem *tag, *tags; - tDeviceData *dev = (tDeviceData *)OOP_INST_DATA(cl, o); - OOP_Object *driver = NULL; - - tags=(struct TagItem *)msg->attrList; - - /* - Get all information passed by pci class calling OOP_NewObject() - */ - while((tag = NextTagItem(&tags))) - { - ULONG idx; - - if (IS_PCIDEV_ATTR(tag->ti_Tag, idx)) - { - switch(idx) - { - case aoHidd_PCIDevice_Driver: - dev->driver = (OOP_Object*)tag->ti_Data; - driver = dev->driver; - break; - - case aoHidd_PCIDevice_Bus: - dev->bus = tag->ti_Data; - break; - - case aoHidd_PCIDevice_Dev: - dev->dev = tag->ti_Data; - break; - - case aoHidd_PCIDevice_Sub: - dev->sub = tag->ti_Data; - break; - } - } - } - - /* - If driver is passed (*HAS TO* be passed) acquire some unchangeable - information regarding given device - */ - if (driver) - { - UBYTE ht; - - /* - Get the header type in order to determine whether it is a - device or bridge - */ - ht = getByte(cl, o, PCICS_HEADERTYPE) & PCIHT_MASK; - dev->isBridge = 0; - if (ht == PCIHT_BRIDGE) - { - dev->isBridge = 1; - dev->subbus = getByte(cl, o, PCIBR_SUBBUS); - } - - /* Get all constant ID's */ - dev->VendorID = getWord(cl, o, PCICS_VENDOR); - dev->ProductID = getWord(cl, o, PCICS_PRODUCT); - - dev->RevisionID = getByte(cl, o, PCICS_REVISION); - dev->Interface = getByte(cl, o, PCICS_PROGIF); - dev->SubClass = getByte(cl, o, PCICS_SUBCLASS); - dev->Class = getByte(cl, o, PCICS_CLASS); - - dev->SubsysVID = getWord(cl, o, PCICS_SUBVENDOR); - dev->SubsystemID = getWord(cl, o, PCICS_SUBSYSTEM); - - dev->IRQLine = getByte(cl, o, PCICS_INT_PIN); - - if (dev->IRQLine) - { - dev->INTLine = getByte(cl, o, PCICS_INT_LINE); - } - else dev->INTLine = 0; - - dev->HeaderType = ht; - - getPCIClassDesc(dev->Class, dev->SubClass, dev->Interface, - &dev->strClass, &dev->strSubClass, &dev->strInterface); - - /* Satisfy BUG watchers ;) */ - D(bug("[PCIDevice] %02x.%02x.%x = %04.4lx:%04.4lx (%s %s %s)\n", - dev->bus, dev->dev, dev->sub, - dev->VendorID, dev->ProductID, - dev->strClass, dev->strSubClass, dev->strInterface)); - D(bug("[PCIDevice] > IRQ %u INT %u\n", dev->IRQLine, dev->INTLine)); + struct TagItem *tag, *tags; + tDeviceData *dev = (tDeviceData *)OOP_INST_DATA(cl, o); + OOP_Object *driver = NULL; + + tags=(struct TagItem *)msg->attrList; + + /* + Get all information passed by pci class calling OOP_NewObject() + */ + while((tag = NextTagItem(&tags))) + { + ULONG idx; + + if (IS_PCIDEV_ATTR(tag->ti_Tag, idx)) + { + switch(idx) + { + case aoHidd_PCIDevice_Driver: + dev->driver = (OOP_Object*)tag->ti_Data; + driver = dev->driver; + break; + + case aoHidd_PCIDevice_Bus: + dev->bus = tag->ti_Data; + break; + + case aoHidd_PCIDevice_Dev: + dev->dev = tag->ti_Data; + break; + + case aoHidd_PCIDevice_Sub: + dev->sub = tag->ti_Data; + break; + } + } + } + + /* + If driver is passed (*HAS TO* be passed) acquire some unchangeable + information regarding given device + */ + if (driver) + { + UBYTE ht; + + /* + Get the header type in order to determine whether it is a + device or bridge + */ + ht = getByte(cl, o, PCICS_HEADERTYPE) & PCIHT_MASK; + dev->isBridge = 0; + if (ht == PCIHT_BRIDGE) + { + dev->isBridge = 1; + dev->subbus = getByte(cl, o, PCIBR_SUBBUS); + } + + /* Get all constant ID's */ + dev->VendorID = getWord(cl, o, PCICS_VENDOR); + dev->ProductID = getWord(cl, o, PCICS_PRODUCT); + + dev->RevisionID = getByte(cl, o, PCICS_REVISION); + dev->Interface = getByte(cl, o, PCICS_PROGIF); + dev->SubClass = getByte(cl, o, PCICS_SUBCLASS); + dev->Class = getByte(cl, o, PCICS_CLASS); + + dev->SubsysVID = getWord(cl, o, PCICS_SUBVENDOR); + dev->SubsystemID = getWord(cl, o, PCICS_SUBSYSTEM); + + dev->IRQLine = getByte(cl, o, PCICS_INT_PIN); + + if (dev->IRQLine) + { + dev->INTLine = getByte(cl, o, PCICS_INT_LINE); + } + else dev->INTLine = 0; + + dev->HeaderType = ht; + + getPCIClassDesc(dev->Class, dev->SubClass, dev->Interface, + &dev->strClass, &dev->strSubClass, &dev->strInterface); + + /* Satisfy BUG watchers ;) */ + D(bug("[PCIDevice] %02x.%02x.%x = %04.4lx:%04.4lx (%s %s %s)\n", + dev->bus, dev->dev, dev->sub, + dev->VendorID, dev->ProductID, + dev->strClass, dev->strSubClass, dev->strInterface)); + D(bug("[PCIDevice] > IRQ %u INT %u\n", dev->IRQLine, dev->INTLine)); // print out a warning to the user in case the interrupt line is not assigned by BIOS if (dev->INTLine == 255 && !dev->isBridge) bug("[PCIDevice] WARNING: Interrupt line is not assigned! Device may freeze or malfunction at use!\n"); - /* Read two first base addresses */ - for (i = 0; i < 2; i++) - { - dev->BaseReg[i].addr = getLong(cl, o, PCICS_BAR0 + (i << 2)); - dev->BaseReg[i].size = sizePCIBaseReg(driver, PSD(cl), dev->bus, - dev->dev, dev->sub, i); - } - - /* Address and size of ROM */ - dev->RomBase = getLong(cl, o, PCICS_EXPROM_BASE); - dev->RomSize = sizePCIBaseReg(driver, PSD(cl), dev->bus, - dev->dev, dev->sub, (PCICS_EXPROM_BASE - PCICS_BAR0) >> 2); - - /* - Bridges specify only first two base addresses. If not bridge, - check the rest now - */ - if (! dev->isBridge) - { - for (i = 2; i < 6; i++) - { - dev->BaseReg[i].addr = getLong(cl, o, PCICS_BAR0 + (i << 2)); - dev->BaseReg[i].size = sizePCIBaseReg(driver, PSD(cl), dev->bus, - dev->dev, dev->sub, i); - } - } - } + /* Read two first base addresses */ + for (i = 0; i < 2; i++) + { + dev->BaseReg[i].addr = getLong(cl, o, PCICS_BAR0 + (i << 2)); + dev->BaseReg[i].size = sizePCIBaseReg(driver, PSD(cl), dev->bus, + dev->dev, dev->sub, i); + } + + /* Address and size of ROM */ + dev->RomBase = getLong(cl, o, PCICS_EXPROM_BASE); + dev->RomSize = sizePCIBaseReg(driver, PSD(cl), dev->bus, + dev->dev, dev->sub, (PCICS_EXPROM_BASE - PCICS_BAR0) >> 2); + + /* + Bridges specify only first two base addresses. If not bridge, + check the rest now + */ + if (! dev->isBridge) + { + for (i = 2; i < 6; i++) + { + dev->BaseReg[i].addr = getLong(cl, o, PCICS_BAR0 + (i << 2)); + dev->BaseReg[i].size = sizePCIBaseReg(driver, PSD(cl), dev->bus, + dev->dev, dev->sub, i); + } + } + } } return o; @@ -334,72 +334,72 @@ static void dispatch_generic(OOP_Class *cl, OOP_Object *o, struct pRoot_Get *msg idx = msg->attrID - HiddPCIDeviceAttrBase; - switch(idx) - { - case aoHidd_PCIDevice_Driver: - *msg->storage = (IPTR)dev->driver; - break; - - case aoHidd_PCIDevice_Bus: - *msg->storage = (IPTR)dev->bus; - break; - - case aoHidd_PCIDevice_Dev: - *msg->storage = (IPTR)dev->dev; - break; - - case aoHidd_PCIDevice_Sub: - *msg->storage = (IPTR)dev->sub; - break; - - case aoHidd_PCIDevice_VendorID: - *msg->storage = (IPTR)dev->VendorID; - break; - - case aoHidd_PCIDevice_ProductID: - *msg->storage = (IPTR)dev->ProductID; - break; - - case aoHidd_PCIDevice_RevisionID: - *msg->storage = (IPTR)dev->RevisionID; - break; - - case aoHidd_PCIDevice_Interface: - *msg->storage = (IPTR)dev->Interface; - break; - - case aoHidd_PCIDevice_Class: - *msg->storage = (IPTR)dev->Class; - break; - - case aoHidd_PCIDevice_SubClass: - *msg->storage = (IPTR)dev->SubClass; - break; - - case aoHidd_PCIDevice_SubsystemVendorID: - *msg->storage = (IPTR)dev->SubsysVID; - break; - - case aoHidd_PCIDevice_SubsystemID: - *msg->storage = (IPTR)dev->SubsystemID; - break; - - case aoHidd_PCIDevice_INTLine: - *msg->storage = (IPTR)dev->INTLine; - break; - - case aoHidd_PCIDevice_IRQLine: - *msg->storage = (IPTR)dev->IRQLine; - break; - - case aoHidd_PCIDevice_RomBase: - *msg->storage = (IPTR)dev->RomBase; - break; - - case aoHidd_PCIDevice_RomSize: - *msg->storage = (IPTR)dev->RomSize; - break; - } + switch(idx) + { + case aoHidd_PCIDevice_Driver: + *msg->storage = (IPTR)dev->driver; + break; + + case aoHidd_PCIDevice_Bus: + *msg->storage = (IPTR)dev->bus; + break; + + case aoHidd_PCIDevice_Dev: + *msg->storage = (IPTR)dev->dev; + break; + + case aoHidd_PCIDevice_Sub: + *msg->storage = (IPTR)dev->sub; + break; + + case aoHidd_PCIDevice_VendorID: + *msg->storage = (IPTR)dev->VendorID; + break; + + case aoHidd_PCIDevice_ProductID: + *msg->storage = (IPTR)dev->ProductID; + break; + + case aoHidd_PCIDevice_RevisionID: + *msg->storage = (IPTR)dev->RevisionID; + break; + + case aoHidd_PCIDevice_Interface: + *msg->storage = (IPTR)dev->Interface; + break; + + case aoHidd_PCIDevice_Class: + *msg->storage = (IPTR)dev->Class; + break; + + case aoHidd_PCIDevice_SubClass: + *msg->storage = (IPTR)dev->SubClass; + break; + + case aoHidd_PCIDevice_SubsystemVendorID: + *msg->storage = (IPTR)dev->SubsysVID; + break; + + case aoHidd_PCIDevice_SubsystemID: + *msg->storage = (IPTR)dev->SubsystemID; + break; + + case aoHidd_PCIDevice_INTLine: + *msg->storage = (IPTR)dev->INTLine; + break; + + case aoHidd_PCIDevice_IRQLine: + *msg->storage = (IPTR)dev->IRQLine; + break; + + case aoHidd_PCIDevice_RomBase: + *msg->storage = (IPTR)dev->RomBase; + break; + + case aoHidd_PCIDevice_RomSize: + *msg->storage = (IPTR)dev->RomSize; + break; + } } static void dispatch_base(OOP_Class *cl, OOP_Object *o, struct pRoot_Get *msg) @@ -412,12 +412,12 @@ static void dispatch_base(OOP_Class *cl, OOP_Object *o, struct pRoot_Get *msg) switch(idx) { - case aoHidd_PCIDevice_Base0: id = 0; break; - case aoHidd_PCIDevice_Base1: id = 1; break; - case aoHidd_PCIDevice_Base2: id = 2; break; - case aoHidd_PCIDevice_Base3: id = 3; break; - case aoHidd_PCIDevice_Base4: id = 4; break; - case aoHidd_PCIDevice_Base5: id = 5; break; + case aoHidd_PCIDevice_Base0: id = 0; break; + case aoHidd_PCIDevice_Base1: id = 1; break; + case aoHidd_PCIDevice_Base2: id = 2; break; + case aoHidd_PCIDevice_Base3: id = 3; break; + case aoHidd_PCIDevice_Base4: id = 4; break; + case aoHidd_PCIDevice_Base5: id = 5; break; } /* Do not allow reading of more than two base addresses in case of PCI-PCI bridges */ @@ -427,9 +427,9 @@ static void dispatch_base(OOP_Class *cl, OOP_Object *o, struct pRoot_Get *msg) if ((dev->BaseReg[id].addr & PCIBAR_MASK_TYPE)==PCIBAR_TYPE_IO) { IPTR IOBase = 0; - *msg->storage &= PCIBAR_MASK_IO; - OOP_GetAttr(dev->driver, aHidd_PCIDriver_IOBase, &IOBase); - *msg->storage += IOBase; + *msg->storage &= PCIBAR_MASK_IO; + OOP_GetAttr(dev->driver, aHidd_PCIDriver_IOBase, &IOBase); + *msg->storage += IOBase; } else { @@ -447,12 +447,12 @@ static void dispatch_type(OOP_Class *cl, OOP_Object *o, struct pRoot_Get *msg) switch(idx) { - case aoHidd_PCIDevice_Type0: id = 0; break; - case aoHidd_PCIDevice_Type1: id = 1; break; - case aoHidd_PCIDevice_Type2: id = 2; break; - case aoHidd_PCIDevice_Type3: id = 3; break; - case aoHidd_PCIDevice_Type4: id = 4; break; - case aoHidd_PCIDevice_Type5: id = 5; break; + case aoHidd_PCIDevice_Type0: id = 0; break; + case aoHidd_PCIDevice_Type1: id = 1; break; + case aoHidd_PCIDevice_Type2: id = 2; break; + case aoHidd_PCIDevice_Type3: id = 3; break; + case aoHidd_PCIDevice_Type4: id = 4; break; + case aoHidd_PCIDevice_Type5: id = 5; break; } /* Do not allow reading of more than two base addresses in case of PCI-PCI bridges */ @@ -461,7 +461,7 @@ static void dispatch_type(OOP_Class *cl, OOP_Object *o, struct pRoot_Get *msg) *msg->storage = (IPTR)dev->BaseReg[id].addr; if ((dev->BaseReg[id].addr & PCIBAR_MASK_TYPE)==PCIBAR_TYPE_IO) { - *msg->storage &= ~PCIBAR_MASK_IO; + *msg->storage &= ~PCIBAR_MASK_IO; } else { @@ -479,12 +479,12 @@ static void dispatch_size(OOP_Class *cl, OOP_Object *o, struct pRoot_Get *msg) switch(idx) { - case aoHidd_PCIDevice_Size0: id = 0; break; - case aoHidd_PCIDevice_Size1: id = 1; break; - case aoHidd_PCIDevice_Size2: id = 2; break; - case aoHidd_PCIDevice_Size3: id = 3; break; - case aoHidd_PCIDevice_Size4: id = 4; break; - case aoHidd_PCIDevice_Size5: id = 5; break; + case aoHidd_PCIDevice_Size0: id = 0; break; + case aoHidd_PCIDevice_Size1: id = 1; break; + case aoHidd_PCIDevice_Size2: id = 2; break; + case aoHidd_PCIDevice_Size3: id = 3; break; + case aoHidd_PCIDevice_Size4: id = 4; break; + case aoHidd_PCIDevice_Size5: id = 5; break; } /* Do not allow reading of more than two base addresses in case of PCI-PCI bridges */ @@ -509,45 +509,45 @@ static void dispatch_pci2pcibridge(OOP_Class *cl, OOP_Object *o, struct pRoot_Ge switch(idx) { - case aoHidd_PCIDevice_isBridge: - *msg->storage = dev->isBridge; - break; - - case aoHidd_PCIDevice_SubBus: - *msg->storage = dev->subbus; - break; - - case aoHidd_PCIDevice_MemoryBase: - *msg->storage = getWord(cl, o, PCIBR_MEMBASE) << 16; - break; - - case aoHidd_PCIDevice_MemoryLimit: - *msg->storage = getWord(cl, o, PCIBR_MEMLIMIT) << 16; - break; - - case aoHidd_PCIDevice_PrefetchableBase: - *msg->storage = getWord(cl, o, PCIBR_PREFETCHBASE) << 16; - break; - - case aoHidd_PCIDevice_PrefetchableLimit: - *msg->storage = getWord(cl, o, PCIBR_PREFETCHLIMIT) << 16; - break; - - case aoHidd_PCIDevice_IOBase: - *msg->storage = getByte(cl, o, PCIBR_IOBASE) << 8; - break; - - case aoHidd_PCIDevice_IOLimit: - *msg->storage = getByte(cl, o, PCIBR_IOLIMIT) << 8; - break; - - case aoHidd_PCIDevice_ISAEnable: - *msg->storage = (control & PCICTRLF_ISAENABLE) == PCICTRLF_ISAENABLE; - break; - - case aoHidd_PCIDevice_VGAEnable: - *msg->storage = (control & PCICTRLF_VGAENABLE) == PCICTRLF_VGAENABLE; - break; + case aoHidd_PCIDevice_isBridge: + *msg->storage = dev->isBridge; + break; + + case aoHidd_PCIDevice_SubBus: + *msg->storage = dev->subbus; + break; + + case aoHidd_PCIDevice_MemoryBase: + *msg->storage = getWord(cl, o, PCIBR_MEMBASE) << 16; + break; + + case aoHidd_PCIDevice_MemoryLimit: + *msg->storage = getWord(cl, o, PCIBR_MEMLIMIT) << 16; + break; + + case aoHidd_PCIDevice_PrefetchableBase: + *msg->storage = getWord(cl, o, PCIBR_PREFETCHBASE) << 16; + break; + + case aoHidd_PCIDevice_PrefetchableLimit: + *msg->storage = getWord(cl, o, PCIBR_PREFETCHLIMIT) << 16; + break; + + case aoHidd_PCIDevice_IOBase: + *msg->storage = getByte(cl, o, PCIBR_IOBASE) << 8; + break; + + case aoHidd_PCIDevice_IOLimit: + *msg->storage = getByte(cl, o, PCIBR_IOLIMIT) << 8; + break; + + case aoHidd_PCIDevice_ISAEnable: + *msg->storage = (control & PCICTRLF_ISAENABLE) == PCICTRLF_ISAENABLE; + break; + + case aoHidd_PCIDevice_VGAEnable: + *msg->storage = (control & PCICTRLF_VGAENABLE) == PCICTRLF_VGAENABLE; + break; } } @@ -587,50 +587,50 @@ typedef void (*dispatcher_t)(OOP_Class *, OOP_Object *, struct pRoot_Get *); static const dispatcher_t Dispatcher[num_Hidd_PCIDevice_Attrs] = { - [aoHidd_PCIDevice_Driver] = dispatch_generic, - [aoHidd_PCIDevice_Bus] = dispatch_generic, - [aoHidd_PCIDevice_Dev] = dispatch_generic, - [aoHidd_PCIDevice_Sub] = dispatch_generic, - [aoHidd_PCIDevice_VendorID] = dispatch_generic, + [aoHidd_PCIDevice_Driver] = dispatch_generic, + [aoHidd_PCIDevice_Bus] = dispatch_generic, + [aoHidd_PCIDevice_Dev] = dispatch_generic, + [aoHidd_PCIDevice_Sub] = dispatch_generic, + [aoHidd_PCIDevice_VendorID] = dispatch_generic, [aoHidd_PCIDevice_ProductID] = dispatch_generic, [aoHidd_PCIDevice_RevisionID] = dispatch_generic, [aoHidd_PCIDevice_Interface] = dispatch_generic, - [aoHidd_PCIDevice_Class] = dispatch_generic, - [aoHidd_PCIDevice_SubClass] = dispatch_generic, + [aoHidd_PCIDevice_Class] = dispatch_generic, + [aoHidd_PCIDevice_SubClass] = dispatch_generic, [aoHidd_PCIDevice_SubsystemVendorID] = dispatch_generic, [aoHidd_PCIDevice_SubsystemID] = dispatch_generic, - [aoHidd_PCIDevice_INTLine] = dispatch_generic, - [aoHidd_PCIDevice_IRQLine] = dispatch_generic, - [aoHidd_PCIDevice_RomBase] = dispatch_generic, - [aoHidd_PCIDevice_RomSize] = dispatch_generic, - [aoHidd_PCIDevice_Base0] = dispatch_base, - [aoHidd_PCIDevice_Base1] = dispatch_base, - [aoHidd_PCIDevice_Base2] = dispatch_base, - [aoHidd_PCIDevice_Base3] = dispatch_base, - [aoHidd_PCIDevice_Base4] = dispatch_base, - [aoHidd_PCIDevice_Base5] = dispatch_base, - [aoHidd_PCIDevice_Size0] = dispatch_size, - [aoHidd_PCIDevice_Size1] = dispatch_size, - [aoHidd_PCIDevice_Size2] = dispatch_size, - [aoHidd_PCIDevice_Size3] = dispatch_size, - [aoHidd_PCIDevice_Size4] = dispatch_size, - [aoHidd_PCIDevice_Size5] = dispatch_size, - [aoHidd_PCIDevice_Type0] = dispatch_type, - [aoHidd_PCIDevice_Type1] = dispatch_type, - [aoHidd_PCIDevice_Type2] = dispatch_type, - [aoHidd_PCIDevice_Type3] = dispatch_type, - [aoHidd_PCIDevice_Type4] = dispatch_type, - [aoHidd_PCIDevice_Type5] = dispatch_type, + [aoHidd_PCIDevice_INTLine] = dispatch_generic, + [aoHidd_PCIDevice_IRQLine] = dispatch_generic, + [aoHidd_PCIDevice_RomBase] = dispatch_generic, + [aoHidd_PCIDevice_RomSize] = dispatch_generic, + [aoHidd_PCIDevice_Base0] = dispatch_base, + [aoHidd_PCIDevice_Base1] = dispatch_base, + [aoHidd_PCIDevice_Base2] = dispatch_base, + [aoHidd_PCIDevice_Base3] = dispatch_base, + [aoHidd_PCIDevice_Base4] = dispatch_base, + [aoHidd_PCIDevice_Base5] = dispatch_base, + [aoHidd_PCIDevice_Size0] = dispatch_size, + [aoHidd_PCIDevice_Size1] = dispatch_size, + [aoHidd_PCIDevice_Size2] = dispatch_size, + [aoHidd_PCIDevice_Size3] = dispatch_size, + [aoHidd_PCIDevice_Size4] = dispatch_size, + [aoHidd_PCIDevice_Size5] = dispatch_size, + [aoHidd_PCIDevice_Type0] = dispatch_type, + [aoHidd_PCIDevice_Type1] = dispatch_type, + [aoHidd_PCIDevice_Type2] = dispatch_type, + [aoHidd_PCIDevice_Type3] = dispatch_type, + [aoHidd_PCIDevice_Type4] = dispatch_type, + [aoHidd_PCIDevice_Type5] = dispatch_type, /* Bridge attributes */ - [aoHidd_PCIDevice_isBridge] = dispatch_pci2pcibridge, - [aoHidd_PCIDevice_SubBus] = dispatch_pci2pcibridge, + [aoHidd_PCIDevice_isBridge] = dispatch_pci2pcibridge, + [aoHidd_PCIDevice_SubBus] = dispatch_pci2pcibridge, [aoHidd_PCIDevice_MemoryBase] = dispatch_pci2pcibridge, [aoHidd_PCIDevice_MemoryLimit] = dispatch_pci2pcibridge, [aoHidd_PCIDevice_PrefetchableBase] = dispatch_pci2pcibridge, [aoHidd_PCIDevice_PrefetchableLimit] = dispatch_pci2pcibridge, - [aoHidd_PCIDevice_IOBase] = dispatch_pci2pcibridge, - [aoHidd_PCIDevice_IOLimit] = dispatch_pci2pcibridge, + [aoHidd_PCIDevice_IOBase] = dispatch_pci2pcibridge, + [aoHidd_PCIDevice_IOLimit] = dispatch_pci2pcibridge, [aoHidd_PCIDevice_ISAEnable] = dispatch_pci2pcibridge, [aoHidd_PCIDevice_VGAEnable] = dispatch_pci2pcibridge, @@ -661,77 +661,77 @@ void PCIDev__Root__Get(OOP_Class *cl, OOP_Object *o, struct pRoot_Get *msg) if (IS_PCIDEV_ATTR(msg->attrID, idx)) { - if (Dispatcher[idx] != NULL) - Dispatcher[idx](cl, o, msg); - else switch(idx) - { - case aoHidd_PCIDevice_isMEM: - *msg->storage = ( - (getWord(cl, o, PCICS_COMMAND) & - PCICMF_MEMDECODE) - == PCICMF_MEMDECODE); - break; - - case aoHidd_PCIDevice_isIO: - *msg->storage = ( - (getWord(cl, o, PCICS_COMMAND) & - PCICMF_IODECODE) - == PCICMF_IODECODE); - break; - - case aoHidd_PCIDevice_isMaster: - *msg->storage = ( - (getWord(cl, o, PCICS_COMMAND) & - PCICMF_BUSMASTER) - == PCICMF_BUSMASTER); - break; - - case aoHidd_PCIDevice_paletteSnoop: - *msg->storage = ( - (getWord(cl, o, PCICS_COMMAND) & - PCICMF_VGASNOOP) - == PCICMF_VGASNOOP); - break; - - case aoHidd_PCIDevice_is66MHz: - *msg->storage = ( - (getWord(cl, o, PCICS_STATUS) & - PCISTF_66MHZ) - == PCISTF_66MHZ); - break; - - case aoHidd_PCIDevice_ClassDesc: - *msg->storage = (IPTR)dev->strClass; - break; - - case aoHidd_PCIDevice_SubClassDesc: - *msg->storage = (IPTR)dev->strSubClass; - break; - - case aoHidd_PCIDevice_InterfaceDesc: - *msg->storage = (IPTR)dev->strInterface; - break; + if (Dispatcher[idx] != NULL) + Dispatcher[idx](cl, o, msg); + else switch(idx) + { + case aoHidd_PCIDevice_isMEM: + *msg->storage = ( + (getWord(cl, o, PCICS_COMMAND) & + PCICMF_MEMDECODE) + == PCICMF_MEMDECODE); + break; + + case aoHidd_PCIDevice_isIO: + *msg->storage = ( + (getWord(cl, o, PCICS_COMMAND) & + PCICMF_IODECODE) + == PCICMF_IODECODE); + break; + + case aoHidd_PCIDevice_isMaster: + *msg->storage = ( + (getWord(cl, o, PCICS_COMMAND) & + PCICMF_BUSMASTER) + == PCICMF_BUSMASTER); + break; + + case aoHidd_PCIDevice_paletteSnoop: + *msg->storage = ( + (getWord(cl, o, PCICS_COMMAND) & + PCICMF_VGASNOOP) + == PCICMF_VGASNOOP); + break; + + case aoHidd_PCIDevice_is66MHz: + *msg->storage = ( + (getWord(cl, o, PCICS_STATUS) & + PCISTF_66MHZ) + == PCISTF_66MHZ); + break; + + case aoHidd_PCIDevice_ClassDesc: + *msg->storage = (IPTR)dev->strClass; + break; + + case aoHidd_PCIDevice_SubClassDesc: + *msg->storage = (IPTR)dev->strSubClass; + break; + + case aoHidd_PCIDevice_InterfaceDesc: + *msg->storage = (IPTR)dev->strInterface; + break; case aoHidd_PCIDevice_IRQStatus: - *msg->storage = ( - (getWord(cl, o, PCICS_STATUS) & - PCISTF_INTERRUPT_STATUS) - == PCISTF_INTERRUPT_STATUS); - break; + *msg->storage = ( + (getWord(cl, o, PCICS_STATUS) & + PCISTF_INTERRUPT_STATUS) + == PCISTF_INTERRUPT_STATUS); + break; case aoHidd_PCIDevice_CapabilitiesPresent: - *msg->storage = ( - (getWord(cl, o, PCICS_STATUS) & - PCISTF_CAPABILITIES) - == PCISTF_CAPABILITIES); - break; - - default: - OOP_DoSuperMethod(cl, o, (OOP_Msg) msg); - break; - } + *msg->storage = ( + (getWord(cl, o, PCICS_STATUS) & + PCISTF_CAPABILITIES) + == PCISTF_CAPABILITIES); + break; + + default: + OOP_DoSuperMethod(cl, o, (OOP_Msg) msg); + break; + } } else { - OOP_DoSuperMethod(cl, o, (OOP_Msg) msg); + OOP_DoSuperMethod(cl, o, (OOP_Msg) msg); } } @@ -745,135 +745,135 @@ void PCIDev__Root__Set(OOP_Class *cl, OOP_Object *o, struct pRoot_Set *msg) while ((tag = NextTagItem(&tags))) { - if (IS_PCIDEV_ATTR(tag->ti_Tag, idx)) - { - switch(idx) - { - case aoHidd_PCIDevice_Base0: - setLong(cl, o, PCICS_BAR0, tag->ti_Data); - dev->BaseReg[0].addr = getLong(cl, o, PCICS_BAR0); - break; - - case aoHidd_PCIDevice_Base1: - setLong(cl, o, PCICS_BAR1, tag->ti_Data); - dev->BaseReg[1].addr = getLong(cl, o, PCICS_BAR1); - break; - - case aoHidd_PCIDevice_Base2: - if (!dev->isBridge) - { - setLong(cl, o, PCICS_BAR2, tag->ti_Data); - dev->BaseReg[2].addr = getLong(cl, o, PCICS_BAR2); - } - break; - - case aoHidd_PCIDevice_Base3: - if (!dev->isBridge) - { - setLong(cl, o, PCICS_BAR3, tag->ti_Data); - dev->BaseReg[3].addr = getLong(cl, o, PCICS_BAR3); - } - break; - - case aoHidd_PCIDevice_Base4: - if (!dev->isBridge) - { - setLong(cl, o, PCICS_BAR4, tag->ti_Data); - dev->BaseReg[4].addr = getLong(cl, o, PCICS_BAR4); - } - break; - - case aoHidd_PCIDevice_Base5: - if (!dev->isBridge) - { - setLong(cl, o, PCICS_BAR5, tag->ti_Data); - dev->BaseReg[5].addr = getLong(cl, o, PCICS_BAR5); - } - break; - - case aoHidd_PCIDevice_RomBase: - setLong(cl, o, PCICS_EXPROM_BASE, tag->ti_Data); - dev->RomBase = getLong(cl, o, PCICS_EXPROM_BASE); - break; - - case aoHidd_PCIDevice_MemoryBase: - if (dev->isBridge) setWord(cl, o, PCIBR_MEMBASE, tag->ti_Data >> 16); break; - - case aoHidd_PCIDevice_MemoryLimit: - if (dev->isBridge) setWord(cl, o, PCIBR_MEMLIMIT, tag->ti_Data >> 16); break; + if (IS_PCIDEV_ATTR(tag->ti_Tag, idx)) + { + switch(idx) + { + case aoHidd_PCIDevice_Base0: + setLong(cl, o, PCICS_BAR0, tag->ti_Data); + dev->BaseReg[0].addr = getLong(cl, o, PCICS_BAR0); + break; + + case aoHidd_PCIDevice_Base1: + setLong(cl, o, PCICS_BAR1, tag->ti_Data); + dev->BaseReg[1].addr = getLong(cl, o, PCICS_BAR1); + break; + + case aoHidd_PCIDevice_Base2: + if (!dev->isBridge) + { + setLong(cl, o, PCICS_BAR2, tag->ti_Data); + dev->BaseReg[2].addr = getLong(cl, o, PCICS_BAR2); + } + break; + + case aoHidd_PCIDevice_Base3: + if (!dev->isBridge) + { + setLong(cl, o, PCICS_BAR3, tag->ti_Data); + dev->BaseReg[3].addr = getLong(cl, o, PCICS_BAR3); + } + break; + + case aoHidd_PCIDevice_Base4: + if (!dev->isBridge) + { + setLong(cl, o, PCICS_BAR4, tag->ti_Data); + dev->BaseReg[4].addr = getLong(cl, o, PCICS_BAR4); + } + break; + + case aoHidd_PCIDevice_Base5: + if (!dev->isBridge) + { + setLong(cl, o, PCICS_BAR5, tag->ti_Data); + dev->BaseReg[5].addr = getLong(cl, o, PCICS_BAR5); + } + break; + + case aoHidd_PCIDevice_RomBase: + setLong(cl, o, PCICS_EXPROM_BASE, tag->ti_Data); + dev->RomBase = getLong(cl, o, PCICS_EXPROM_BASE); + break; + + case aoHidd_PCIDevice_MemoryBase: + if (dev->isBridge) setWord(cl, o, PCIBR_MEMBASE, tag->ti_Data >> 16); break; + + case aoHidd_PCIDevice_MemoryLimit: + if (dev->isBridge) setWord(cl, o, PCIBR_MEMLIMIT, tag->ti_Data >> 16); break; - case aoHidd_PCIDevice_PrefetchableBase: - if (dev->isBridge) setWord(cl, o, PCIBR_PREFETCHBASE, tag->ti_Data >> 16); break; - - case aoHidd_PCIDevice_PrefetchableLimit: - if (dev->isBridge) setWord(cl, o, PCIBR_PREFETCHLIMIT, tag->ti_Data >> 16); break; - - case aoHidd_PCIDevice_IOBase: - if (dev->isBridge) setByte(cl, o, PCIBR_IOBASE, tag->ti_Data >> 8); break; - - case aoHidd_PCIDevice_IOLimit: - if (dev->isBridge) setByte(cl, o, PCIBR_IOLIMIT, tag->ti_Data >> 8); break; - - case aoHidd_PCIDevice_isIO: - { - UWORD command = getWord(cl, o, PCICS_COMMAND) & ~PCICMF_IODECODE; - if (tag->ti_Data) - command |= PCICMF_IODECODE; - setWord(cl, o, PCICS_COMMAND, command); - } - break; - - case aoHidd_PCIDevice_isMEM: - { - UWORD command = getWord(cl, o, PCICS_COMMAND) & ~PCICMF_MEMDECODE; - if (tag->ti_Data) - command |= PCICMF_MEMDECODE; - setWord(cl, o, PCICS_COMMAND, command); - } - break; - - case aoHidd_PCIDevice_isMaster: - { - UWORD command = getWord(cl, o, PCICS_COMMAND) & ~PCICMF_BUSMASTER; - if (tag->ti_Data) - command |= PCICMF_BUSMASTER; - setWord(cl, o, PCICS_COMMAND, command); - } - break; - - case aoHidd_PCIDevice_paletteSnoop: - { - UWORD command = getWord(cl, o, PCICS_COMMAND) & ~PCICMF_VGASNOOP; - if (tag->ti_Data) - command |= PCICMF_VGASNOOP; - setWord(cl, o, PCICS_COMMAND, command); - } - break; - - case aoHidd_PCIDevice_ISAEnable: - if (dev->isBridge) - { - UWORD control = getWord(cl, o, PCIBR_CONTROL) & ~PCICTRLF_ISAENABLE; - if (tag->ti_Data) - control |= PCICTRLF_ISAENABLE; - setWord(cl, o, PCIBR_CONTROL, control); - } - break; - - case aoHidd_PCIDevice_VGAEnable: - if (dev->isBridge) - { - UWORD control = getWord(cl, o, PCIBR_CONTROL) & ~PCICTRLF_VGAENABLE; - if (tag->ti_Data) - control |= PCICTRLF_VGAENABLE; - setWord(cl, o, PCIBR_CONTROL, control); - } - break; - - default: - bug("[PCIDevice] Trying to set nonsettable attribute %d!\n", idx); - break; - } - } + case aoHidd_PCIDevice_PrefetchableBase: + if (dev->isBridge) setWord(cl, o, PCIBR_PREFETCHBASE, tag->ti_Data >> 16); break; + + case aoHidd_PCIDevice_PrefetchableLimit: + if (dev->isBridge) setWord(cl, o, PCIBR_PREFETCHLIMIT, tag->ti_Data >> 16); break; + + case aoHidd_PCIDevice_IOBase: + if (dev->isBridge) setByte(cl, o, PCIBR_IOBASE, tag->ti_Data >> 8); break; + + case aoHidd_PCIDevice_IOLimit: + if (dev->isBridge) setByte(cl, o, PCIBR_IOLIMIT, tag->ti_Data >> 8); break; + + case aoHidd_PCIDevice_isIO: + { + UWORD command = getWord(cl, o, PCICS_COMMAND) & ~PCICMF_IODECODE; + if (tag->ti_Data) + command |= PCICMF_IODECODE; + setWord(cl, o, PCICS_COMMAND, command); + } + break; + + case aoHidd_PCIDevice_isMEM: + { + UWORD command = getWord(cl, o, PCICS_COMMAND) & ~PCICMF_MEMDECODE; + if (tag->ti_Data) + command |= PCICMF_MEMDECODE; + setWord(cl, o, PCICS_COMMAND, command); + } + break; + + case aoHidd_PCIDevice_isMaster: + { + UWORD command = getWord(cl, o, PCICS_COMMAND) & ~PCICMF_BUSMASTER; + if (tag->ti_Data) + command |= PCICMF_BUSMASTER; + setWord(cl, o, PCICS_COMMAND, command); + } + break; + + case aoHidd_PCIDevice_paletteSnoop: + { + UWORD command = getWord(cl, o, PCICS_COMMAND) & ~PCICMF_VGASNOOP; + if (tag->ti_Data) + command |= PCICMF_VGASNOOP; + setWord(cl, o, PCICS_COMMAND, command); + } + break; + + case aoHidd_PCIDevice_ISAEnable: + if (dev->isBridge) + { + UWORD control = getWord(cl, o, PCIBR_CONTROL) & ~PCICTRLF_ISAENABLE; + if (tag->ti_Data) + control |= PCICTRLF_ISAENABLE; + setWord(cl, o, PCIBR_CONTROL, control); + } + break; + + case aoHidd_PCIDevice_VGAEnable: + if (dev->isBridge) + { + UWORD control = getWord(cl, o, PCIBR_CONTROL) & ~PCICTRLF_VGAENABLE; + if (tag->ti_Data) + control |= PCICTRLF_VGAENABLE; + setWord(cl, o, PCIBR_CONTROL, control); + } + break; + + default: + bug("[PCIDevice] Trying to set nonsettable attribute %d!\n", idx); + break; + } + } } } diff --git a/rom/hidds/hidd.pci/pcidriverclass.c b/rom/hidds/hidd.pci/pcidriverclass.c index 4e7ecc3d9a..6525477699 100644 --- a/rom/hidds/hidd.pci/pcidriverclass.c +++ b/rom/hidds/hidd.pci/pcidriverclass.c @@ -1,5 +1,5 @@ /* - Copyright © 2004-2011, The AROS Development Team. All rights reserved. + Copyright © 2004-2013, The AROS Development Team. All rights reserved. $Id$ Desc: Base PCI driver class @@ -23,7 +23,7 @@ #include "pci.h" #undef HiddPCIDriverAttrBase -#define HiddPCIDriverAttrBase (PSD(cl)->hiddPCIDriverAB) +#define HiddPCIDriverAttrBase (PSD(cl)->hiddPCIDriverAB) #define HiddAttrBase (PSD(cl)->hiddAB) OOP_Object *PCIDrv__Root__New(OOP_Class *cl, OOP_Object *o, struct pRoot_New *msg) @@ -85,8 +85,8 @@ UBYTE PCIDrv__Hidd_PCIDriver__ReadConfigByte(OOP_Class *cl, OOP_Object *o, struct pHidd_PCIDriver_ReadConfigLong mymsg; /* - First, read whole ConfigWord from PCI config space, using defined - method + First, read whole ConfigWord from PCI config space, using defined + method */ mymsg.mID = PSD(cl)->mid_RL; mymsg.bus = msg->bus; @@ -193,7 +193,7 @@ APTR PCIDrv__Hidd_PCIDriver__CPUtoPCI(OOP_Class *cl, OOP_Object *o, if (instance->DirectBus) { - return (APTR)msg->address; + return (APTR)msg->address; } else return (APTR)0xffffffff; } @@ -207,7 +207,7 @@ APTR PCIDrv__Hidd_PCIDriver__PCItoCPU(OOP_Class *cl, OOP_Object *o, if (instance->DirectBus) { - return (APTR)msg->address; + return (APTR)msg->address; } else return (APTR)0xffffffff; } @@ -223,11 +223,11 @@ APTR PCIDrv__Hidd_PCIDriver__MapPCI(OOP_Class *cl, OOP_Object *o, if (instance->DirectBus) { - struct pHidd_PCIDriver_PCItoCPU mmsg, *pmmsg=&mmsg; - mmsg.mID = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_PCItoCPU); - mmsg.address = msg->PCIAddress; - - return ((APTR)OOP_DoMethod(o, (OOP_Msg)pmmsg)); + struct pHidd_PCIDriver_PCItoCPU mmsg, *pmmsg=&mmsg; + mmsg.mID = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_PCItoCPU); + mmsg.address = msg->PCIAddress; + + return ((APTR)OOP_DoMethod(o, (OOP_Msg)pmmsg)); } else return (APTR)0xffffffff; } @@ -276,24 +276,24 @@ VOID PCIDrv__Root__Get(OOP_Class *cl, OOP_Object *o, if (IS_PCIDRV_ATTR(msg->attrID, idx)) { - switch(idx) - { - case aoHidd_PCIDriver_DirectBus: - *msg->storage = (IPTR)instance->DirectBus; - break; + switch(idx) + { + case aoHidd_PCIDriver_DirectBus: + *msg->storage = (IPTR)instance->DirectBus; + break; case aoHidd_PCIDriver_IOBase: - *msg->storage = (IPTR)instance->IOBase; - break; - - default: - OOP_DoSuperMethod(cl, o, (OOP_Msg) msg); - break; - } + *msg->storage = (IPTR)instance->IOBase; + break; + + default: + OOP_DoSuperMethod(cl, o, (OOP_Msg) msg); + break; + } } else { - OOP_DoSuperMethod(cl, o, (OOP_Msg) msg); + OOP_DoSuperMethod(cl, o, (OOP_Msg) msg); } } @@ -306,7 +306,7 @@ static int PCIDrv_InitMIDs(LIBBASETYPEPTR LIBBASE) * We do have driver class. Now we can get some MethodID's, * so that whole PCI subsystem works slightly faster ;) */ - + LIBBASE->psd.mid_RB = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_ReadConfigByte); LIBBASE->psd.mid_RW = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_ReadConfigWord); LIBBASE->psd.mid_RL = OOP_GetMethodID(IID_Hidd_PCIDriver, moHidd_PCIDriver_ReadConfigLong); -- 2.11.4.GIT