From 20d8b0c42b90affef854b09a3139332ea4637252 Mon Sep 17 00:00:00 2001 From: jmcmullan Date: Wed, 22 Aug 2012 04:02:56 +0000 Subject: [PATCH] arch/ppc-sam440: Move all the UIC code into uic.c Signed-off-by: Jason S. McMullan git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@45636 fb15a70f-31f2-0310-bbcc-cdcc74a49acc --- arch/ppc-sam440/kernel/intr.c | 40 +---------------- arch/ppc-sam440/kernel/kernel_intern.h | 6 ++- arch/ppc-sam440/kernel/syscall.c | 44 +------------------ arch/ppc-sam440/kernel/uic.c | 78 +++++++++++++++++++++++++++++++++- 4 files changed, 86 insertions(+), 82 deletions(-) diff --git a/arch/ppc-sam440/kernel/intr.c b/arch/ppc-sam440/kernel/intr.c index be9babc3b9..dcd682f549 100644 --- a/arch/ppc-sam440/kernel/intr.c +++ b/arch/ppc-sam440/kernel/intr.c @@ -52,43 +52,7 @@ void intr_init() wrspr(IVOR14, ((uint32_t)&__EXCEPTION_14_Prolog) & 0x0000fff0); wrspr(IVOR15, ((uint32_t)&__cEXCEPTION_15_Prolog) & 0x0000fff0); - /* Disable external interrupts completely */ - if (krnIsPPC460(rdspr(PVR))) { - uic_er[0] = INTR_UIC0_CASCADE; - wrdcr(UIC0_ER, uic_er[0]); - wrdcr(UIC0_PR, INTR_UIC0_POLARITY); - wrdcr(UIC0_CR, INTR_UIC0_CRITICAL); - wrdcr(UIC0_TR, INTR_UIC0_TRIGGER); - wrdcr(UIC0_SR, 0xffffffff); - wrdcr(UIC0_VCR, 0); - - uic_er[1] = 0; - wrdcr(UIC1_ER, uic_er[0]); - wrdcr(UIC1_PR, INTR_UIC1_POLARITY); - wrdcr(UIC1_CR, INTR_UIC1_CRITICAL); - wrdcr(UIC1_TR, INTR_UIC1_TRIGGER); - wrdcr(UIC1_SR, 0xffffffff); - wrdcr(UIC1_VCR, 0); - - uic_er[2] = 0; - wrdcr(UIC2_ER, uic_er[2]); - wrdcr(UIC2_PR, INTR_UIC2_POLARITY); - wrdcr(UIC2_CR, INTR_UIC2_CRITICAL); - wrdcr(UIC2_TR, INTR_UIC2_TRIGGER); - wrdcr(UIC2_SR, 0xffffffff); - wrdcr(UIC2_VCR, 0); - - uic_er[3] = 0; - wrdcr(UIC3_ER, uic_er[3]); - wrdcr(UIC3_PR, INTR_UIC3_POLARITY); - wrdcr(UIC3_CR, INTR_UIC3_CRITICAL); - wrdcr(UIC3_TR, INTR_UIC3_TRIGGER); - wrdcr(UIC3_SR, 0xffffffff); - wrdcr(UIC3_VCR, 0); - } else { - wrdcr(UIC0_ER, 0); - wrdcr(UIC1_ER, 0); - } + uic_init(); } #define EXCEPTION_STACK_SIZE 4096 @@ -154,7 +118,7 @@ static inline CONST_STRPTR symbolfor(struct Library *DebugBase, IPTR addr) { ret #endif -void dumpregs(context_t *ctx, int exception) +void dumpregs(context_t *ctx, uint8_t exception) { uint32_t *sp; ULONG *p; diff --git a/arch/ppc-sam440/kernel/kernel_intern.h b/arch/ppc-sam440/kernel/kernel_intern.h index f987e84061..fd8d86927b 100644 --- a/arch/ppc-sam440/kernel/kernel_intern.h +++ b/arch/ppc-sam440/kernel/kernel_intern.h @@ -104,13 +104,17 @@ struct TagItem *krnFindTagItem(Tag tagValue, struct TagItem *tagList); struct TagItem *krnNextTagItem(struct TagItem **tagListPtr); void core_ExitInterrupt(context_t *ctx); -void dumpregs(context_t *ctx, int exception); +void dumpregs(context_t *ctx, uint8_t exception); void mmu_init(struct TagItem *tags); void intr_init(); extern ULONG uic_er[4]; +void uic_init(void); +void uic_enable(int irq); +void uic_disable(int irq); + static inline void ExitInterrupt(context_t *ctx) { /* As per the documentation of core_ExitInterrupt, diff --git a/arch/ppc-sam440/kernel/syscall.c b/arch/ppc-sam440/kernel/syscall.c index ab5567f9dc..a41fa8810b 100644 --- a/arch/ppc-sam440/kernel/syscall.c +++ b/arch/ppc-sam440/kernel/syscall.c @@ -55,46 +55,6 @@ static void _write_config_word(int reg, uint16_t val) _write_config_long(reg, temp.ul); } -/* - * Interrupt controller functions. Actually have the following prototypes: - * - * void enable_irq(uint8_t num); - * void disable_irq(uint8_t num); - */ - -/* Master copy of UICn_ER */ -ULONG uic_er[4]; - -static inline void enable_irq(int irq) -{ - ULONG mask = (0x80000000 >> (irq & 0x1f)); - - uic_er[irq >> 5] |= mask; - - switch (irq >> 5) { - case 0: wrdcr(UIC0_ER, uic_er[0]); break; - case 1: wrdcr(UIC1_ER, uic_er[1]); break; - case 2: wrdcr(UIC2_ER, uic_er[2]); break; - case 3: wrdcr(UIC3_ER, uic_er[3]); break; - default: break; - } -} - -static inline void disable_irq(int irq) -{ - ULONG mask = (0x80000000 >> (irq & 0x1f)); - - uic_er[irq >> 5] &= ~mask; - - switch (irq >> 5) { - case 0: wrdcr(UIC0_ER, uic_er[0]); break; - case 1: wrdcr(UIC1_ER, uic_er[1]); break; - case 2: wrdcr(UIC2_ER, uic_er[2]); break; - case 3: wrdcr(UIC3_ER, uic_er[3]); break; - default: break; - } -} - void syscall_handler(context_t *ctx, uint8_t exception) { struct KernelBase *KernelBase = getKernelBase(); @@ -114,11 +74,11 @@ void syscall_handler(context_t *ctx, uint8_t exception) break; case SC_IRQ_ENABLE: - enable_irq(ctx->cpu.gpr[4]); + uic_enable(ctx->cpu.gpr[4]); break; case SC_IRQ_DISABLE: - disable_irq(ctx->cpu.gpr[4]); + uic_disable(ctx->cpu.gpr[4]); break; case SC_SUPERSTATE: diff --git a/arch/ppc-sam440/kernel/uic.c b/arch/ppc-sam440/kernel/uic.c index 19d381d388..4b191f85be 100644 --- a/arch/ppc-sam440/kernel/uic.c +++ b/arch/ppc-sam440/kernel/uic.c @@ -1,4 +1,3 @@ - #include #include #include @@ -9,6 +8,83 @@ #include "kernel_globals.h" #include "kernel_intr.h" +/* + * Interrupt controller functions + */ + +ULONG uic_er[4]; + +void uic_enable(int irq) +{ + ULONG mask = (0x80000000 >> (irq & 0x1f)); + + uic_er[irq >> 5] |= mask; + + switch (irq >> 5) { + case 0: wrdcr(UIC0_ER, uic_er[0]); break; + case 1: wrdcr(UIC1_ER, uic_er[1]); break; + case 2: wrdcr(UIC2_ER, uic_er[2]); break; + case 3: wrdcr(UIC3_ER, uic_er[3]); break; + default: break; + } +} + +void uic_disable(int irq) +{ + ULONG mask = (0x80000000 >> (irq & 0x1f)); + + uic_er[irq >> 5] &= ~mask; + + switch (irq >> 5) { + case 0: wrdcr(UIC0_ER, uic_er[0]); break; + case 1: wrdcr(UIC1_ER, uic_er[1]); break; + case 2: wrdcr(UIC2_ER, uic_er[2]); break; + case 3: wrdcr(UIC3_ER, uic_er[3]); break; + default: break; + } +} + +void uic_init(void) +{ + /* Disable external interrupts completely */ + if (krnIsPPC460(rdspr(PVR))) { + uic_er[0] = INTR_UIC0_CASCADE; + wrdcr(UIC0_ER, uic_er[0]); + wrdcr(UIC0_PR, INTR_UIC0_POLARITY); + wrdcr(UIC0_CR, INTR_UIC0_CRITICAL); + wrdcr(UIC0_TR, INTR_UIC0_TRIGGER); + wrdcr(UIC0_SR, 0xffffffff); + wrdcr(UIC0_VCR, 0); + + uic_er[1] = 0; + wrdcr(UIC1_ER, uic_er[1]); + wrdcr(UIC1_PR, INTR_UIC1_POLARITY); + wrdcr(UIC1_CR, INTR_UIC1_CRITICAL); + wrdcr(UIC1_TR, INTR_UIC1_TRIGGER); + wrdcr(UIC1_SR, 0xffffffff); + wrdcr(UIC1_VCR, 0); + + uic_er[2] = 0; + wrdcr(UIC2_ER, uic_er[2]); + wrdcr(UIC2_PR, INTR_UIC2_POLARITY); + wrdcr(UIC2_CR, INTR_UIC2_CRITICAL); + wrdcr(UIC2_TR, INTR_UIC2_TRIGGER); + wrdcr(UIC2_SR, 0xffffffff); + wrdcr(UIC2_VCR, 0); + + uic_er[3] = 0; + wrdcr(UIC3_ER, uic_er[3]); + wrdcr(UIC3_PR, INTR_UIC3_POLARITY); + wrdcr(UIC3_CR, INTR_UIC3_CRITICAL); + wrdcr(UIC3_TR, INTR_UIC3_TRIGGER); + wrdcr(UIC3_SR, 0xffffffff); + wrdcr(UIC3_VCR, 0); + } else { + wrdcr(UIC0_ER, 0); + wrdcr(UIC1_ER, 0); + } +} + void uic_handler(context_t *ctx, uint8_t exception) { struct KernelBase *KernelBase = getKernelBase(); -- 2.11.4.GIT