From 082bb17888a3bfa44077457c83f23268c0028dff Mon Sep 17 00:00:00 2001 From: NicJA Date: Tue, 21 Apr 2015 21:23:55 +0000 Subject: [PATCH] reshuffle the arch specific cpu init parts to the correct location(s) git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@50446 fb15a70f-31f2-0310-bbcc-cdcc74a49acc --- arch/arm-native/kernel/kernel_arm.h | 2 +- arch/arm-native/kernel/kernel_cpu.c | 46 ++------------------------- arch/arm-native/kernel/kernel_intern.h | 4 --- arch/arm-native/kernel/platform_bcm2708.c | 52 ++++++++++++++++++++++++++++--- arch/arm-native/kernel/platform_init.c | 2 +- 5 files changed, 51 insertions(+), 55 deletions(-) diff --git a/arch/arm-native/kernel/kernel_arm.h b/arch/arm-native/kernel/kernel_arm.h index 622db0e292..53154836b6 100644 --- a/arch/arm-native/kernel/kernel_arm.h +++ b/arch/arm-native/kernel/kernel_arm.h @@ -8,7 +8,7 @@ struct ARM_Implementation IPTR ARMI_Family; IPTR ARMI_Platform; APTR ARMI_PeripheralBase; - void (*ARMI_Init) (APTR); // takes a pointer to KernelBase as input + void (*ARMI_Init) (APTR, APTR); // takes pointers to KernelBase & SysBase as input APTR (*ARMI_InitTimer) (APTR); // takes a pointer to KernelBase as input, and returns struct IntrNode void (*ARMI_Delay) (int); unsigned int (*ARMI_GetTime) (void); diff --git a/arch/arm-native/kernel/kernel_cpu.c b/arch/arm-native/kernel/kernel_cpu.c index dd121f45e0..aa61e0f7ab 100644 --- a/arch/arm-native/kernel/kernel_cpu.c +++ b/arch/arm-native/kernel/kernel_cpu.c @@ -10,8 +10,6 @@ #include -#include - #include "etask.h" #include "kernel_intern.h" @@ -47,16 +45,14 @@ asm( " ldr sp, mpcore_data \n" " ldr pc, mpcore_code \n" +" .globl mpcore_pde \n" "mpcore_pde: .word 0 \n" "mpcore_code: .word 0 \n" "mpcore_data: .word 0 \n" +" .globl mpcore_end \n" "mpcore_end: " ); -extern mpcore_trampoline(); -extern uint32_t mpcore_end; -extern uint32_t mpcore_pde; - void cpu_Register() { uint32_t tmp; @@ -83,10 +79,6 @@ void cpu_Delay(int usecs) for (delay = 0; delay < usecs; delay++) asm volatile ("mov r0, r0\n"); } -void arm_flush_cache(uint32_t addr, uint32_t length); - -uint32_t tmp_stacks_smp[4*1024]; - void cpu_Probe(struct ARM_Implementation *krnARMImpl) { uint32_t tmp; @@ -96,47 +88,13 @@ void cpu_Probe(struct ARM_Implementation *krnARMImpl) { krnARMImpl->ARMI_Family = 7; - if (krnARMImpl->ARMI_Delay) - { // Read the Multiprocessor Affinity Register (MPIDR) asm volatile ("mrc p15, 0, %0, c0, c0, 5" : "=r" (tmp)); if (tmp & (2 << 30)) { - void *trampoline_src = mpcore_trampoline; - void *trampoline_dst = (void *)0x2000; - uint32_t trampoline_length = (uintptr_t)&mpcore_end - (uintptr_t)mpcore_trampoline; - uint32_t trampoline_data_offset = (uintptr_t)&mpcore_pde - (uintptr_t)mpcore_trampoline; - - bug("[KRN] Multicore system\n"); - - bug("[KRN] Copy SMP trampoline from %p to %p (%d bytes)\n", trampoline_src, trampoline_dst, trampoline_length); - bcopy(trampoline_src, trampoline_dst, trampoline_length); - bug("[KRN] Patching data for trampoline at offset %d\n", trampoline_data_offset); - asm volatile ("mrc p15, 0, %0, c2, c0, 0":"=r"(tmp)); - ((uint32_t *)(trampoline_dst + trampoline_data_offset))[0] = tmp; // pde - ((uint32_t *)(trampoline_dst + trampoline_data_offset))[1] = (uint32_t)cpu_Register; - bug("[KRN] Waking up cores\n"); - - ((uint32_t *)(trampoline_dst + trampoline_data_offset))[2] = &tmp_stacks_smp[4*1024-16]; - arm_flush_cache((uint32_t)trampoline_dst, 512); - *((uint32_t *)(0x4000008c + 0x10)) = trampoline_dst; - cpu_Delay(10000000); - - ((uint32_t *)(trampoline_dst + trampoline_data_offset))[2] = &tmp_stacks_smp[3*1024-16]; - arm_flush_cache((uint32_t)trampoline_dst, 512); - *((uint32_t *)(0x4000008c + 0x20)) = trampoline_dst; - - cpu_Delay(10000000); - - ((uint32_t *)(trampoline_dst + trampoline_data_offset))[2] = &tmp_stacks_smp[2*1024-16]; - arm_flush_cache((uint32_t)trampoline_dst, 512); - *((uint32_t *)(0x4000008c + 0x30)) = trampoline_dst; - cpu_Delay(10000000); - - } } } else diff --git a/arch/arm-native/kernel/kernel_intern.h b/arch/arm-native/kernel/kernel_intern.h index b24b341744..9389a4b814 100644 --- a/arch/arm-native/kernel/kernel_intern.h +++ b/arch/arm-native/kernel/kernel_intern.h @@ -20,10 +20,6 @@ #undef KernelBase struct KernelBase; -/* Use system timer 3 for our scheduling heartbeat */ -#define VBLANK_TIMER 3 -#define VBLANK_INTERVAL (1000000 / 50) - #define KERNEL_PHYS_BASE 0x07800000 #define KERNEL_VIRT_BASE 0xff800000 diff --git a/arch/arm-native/kernel/platform_bcm2708.c b/arch/arm-native/kernel/platform_bcm2708.c index 376a3fb32a..3105c36470 100644 --- a/arch/arm-native/kernel/platform_bcm2708.c +++ b/arch/arm-native/kernel/platform_bcm2708.c @@ -14,7 +14,10 @@ #include #include +#include + #include "kernel_intern.h" +#include "kernel_debug.h" #include "kernel_cpu.h" #include "kernel_interrupts.h" #include "kernel_intr.h" @@ -29,23 +32,58 @@ #define IRQ_BANK1 0x00000100 #define IRQ_BANK2 0x00000200 +#define D(x) #define DIRQ(x) +extern mpcore_trampoline(); +extern uint32_t mpcore_end; +extern uint32_t mpcore_pde; + extern void cpu_Register(void); +extern void arm_flush_cache(uint32_t addr, uint32_t length); -static void bcm2708_init(APTR _kernelBase) +static void bcm2708_init(APTR _kernelBase, APTR _sysBase) { + struct ExecBase *SysBase = (struct ExecBase *)_sysBase; struct KernelBase *KernelBase = (struct KernelBase *)_kernelBase; + + D(bug("[KRN:BCM2708] %s()\n", __PRETTY_FUNCTION__)); + if (__arm_arosintern.ARMI_PeripheralBase == (APTR)BCM2836_PERIPHYSBASE) { + void *trampoline_src = mpcore_trampoline; + void *trampoline_dst = (void *)0x2000; + uint32_t trampoline_length = (uintptr_t)&mpcore_end - (uintptr_t)mpcore_trampoline; + uint32_t trampoline_data_offset = (uintptr_t)&mpcore_pde - (uintptr_t)mpcore_trampoline; int core; + uint32_t *core_stack; + uint32_t tmp; + + bug("[KRN:BCM2708] Initialising Multicore System\n"); + D(bug("[KRN:BCM2708] %s: Copy SMP trampoline from %p to %p (%d bytes)\n", __PRETTY_FUNCTION__, trampoline_src, trampoline_dst, trampoline_length)); + + bcopy(trampoline_src, trampoline_dst, trampoline_length); + + D(bug("[KRN:BCM2708] %s: Patching data for trampoline at offset %d\n", __PRETTY_FUNCTION__, trampoline_data_offset)); + + asm volatile ("mrc p15, 0, %0, c2, c0, 0":"=r"(tmp)); + ((uint32_t *)(trampoline_dst + trampoline_data_offset))[0] = tmp; // pde + ((uint32_t *)(trampoline_dst + trampoline_data_offset))[1] = (uint32_t)cpu_Register; + for (core = 1; core < 4; core ++) { - *((volatile unsigned int *)(0x4000008C + (0x10 * core))) = (unsigned int)KrnVirtualToPhysical(cpu_Register); - } + core_stack = (uint32_t *)AllocMem(1024, MEMF_CLEAR); /* MEMF_PRIVATE */ + ((uint32_t *)(trampoline_dst + trampoline_data_offset))[2] = &core_stack[1024-16]; + + D(bug("[KRN:BCM2708] %s: Attempting to wake core #%d\n", __PRETTY_FUNCTION__, core)); + D(bug("[KRN:BCM2708] %s: core #%d stack @ 0x%p : 0x%p)\n", __PRETTY_FUNCTION__, core, core_stack, ((uint32_t *)(trampoline_dst + trampoline_data_offset))[2])); - if (__arm_arosintern.ARMI_Delay) - __arm_arosintern.ARMI_Delay(1500); + arm_flush_cache((uint32_t)trampoline_dst, 512); + *((uint32_t *)(0x4000008c + (0x10 * core))) = trampoline_dst; + + if (__arm_arosintern.ARMI_Delay) + __arm_arosintern.ARMI_Delay(10000000); + } } } @@ -171,6 +209,10 @@ static void bcm2708_toggle_led(int LED, int state) } } +/* Use system timer 3 for our scheduling heartbeat */ +#define VBLANK_TIMER 3 +#define VBLANK_INTERVAL (1000000 / 50) + static void bcm2708_gputimer_handler(unsigned int timerno, void *unused1) { unsigned int stc; diff --git a/arch/arm-native/kernel/platform_init.c b/arch/arm-native/kernel/platform_init.c index 01643c47c9..ba94ed6844 100644 --- a/arch/arm-native/kernel/platform_init.c +++ b/arch/arm-native/kernel/platform_init.c @@ -81,7 +81,7 @@ static int platform_PostInit(struct KernelBase *KernelBase) D(bug("[Kernel] platform_PostInit: Performing Post Init..\n")); if (__arm_arosintern.ARMI_Init) - __arm_arosintern.ARMI_Init(KernelBase); + __arm_arosintern.ARMI_Init(KernelBase, SysBase); D(bug("[Kernel] platform_PostInit: Registering Heartbeat timer..\n")); -- 2.11.4.GIT