| commit | b3aa69a29b123a952c5082c37b723919e0694742 | |
| author | DizzyOfCRN <DizzyOfCRN@fb15a70f-31f2-0310-bbcc-cdcc74a49acc> | |
| Thu, 20 Mar 2014 17:38:53 +0000 (20 17:38 +0000) | ||
| committer | DizzyOfCRN <DizzyOfCRN@fb15a70f-31f2-0310-bbcc-cdcc74a49acc> | |
| Thu, 20 Mar 2014 17:38:53 +0000 (20 17:38 +0000) | ||
| tree | 8dc8449da7b0177ad92ff3a62a0c353764a050ce | treesnapshot (tar.gz zip) |
| parent | c40136df15995eec0d9dfee6ba7aca644d258a87 | commitdiff |
- Disassembly showed that safeguarding CACR-register against non existing cp numbers did not work as intended, GCC assembled code to first read the register content, apply clear to upper unused bits and then placed the cp fields :(
git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@48873 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@48873 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
| arch/arm-all/include/asm/cp15.h | diffblobblamehistory |