Some XHCI operational register defines, enough to halt and reset controller
commit7af2c4a0d0a760925f27b2cbc5d40ce691556d26
authorDizzyOfCRN <DizzyOfCRN@fb15a70f-31f2-0310-bbcc-cdcc74a49acc>
Fri, 3 Dec 2010 23:38:42 +0000 (3 23:38 +0000)
committerDizzyOfCRN <DizzyOfCRN@fb15a70f-31f2-0310-bbcc-cdcc74a49acc>
Fri, 3 Dec 2010 23:38:42 +0000 (3 23:38 +0000)
treed816c9dec3a15b1c859b5a17cd39227c45a70161
parentc03a4a4cceada97772f9b6bf0343548cc2ed318f
Some XHCI operational register defines, enough to halt and reset controller

git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@35890 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
rom/usb/pciusb/xhcichip.h