arch/m68k-all/exec/cachecontrol.c

   1 /*
   2     Copyright © 1995-2011, The AROS Development Team. All rights reserved.
   3     $Id: cachecontrol.c $
   4
   5     Desc: CacheControl() - Global control of the system caches.
   6     Lang: english
   7 */
   8
   9 #include <exec/types.h>
  10 #include <exec/execbase.h>
  11 #include <aros/libcall.h>
  12
  13 extern void AROS_SLIB_ENTRY(CacheControl_00,Exec,108)(void);
  14 extern void AROS_SLIB_ENTRY(CacheControl_20,Exec,108)(void);
  15 extern void AROS_SLIB_ENTRY(CacheControl_40,Exec,108)(void);
  16
  17 /*****************************************************************************
  18
  19     NAME */
  20 #include <proto/exec.h>
  21
  22         AROS_LH2(ULONG, CacheControl,
  23
  24 /*  SYNOPSIS */
  25         AROS_LHA(ULONG, cacheBits, D0),
  26         AROS_LHA(ULONG, cacheMask, D1),
  27
  28 /*  LOCATION */
  29         struct ExecBase *, SysBase, 108, Exec)
  30
  31 /*  FUNCTION
  32         This function will provide global control of all the processor
  33         instruction and data caches. It is not possible to have per
  34         task control.
  35
  36         The actions undertaken by this function are very CPU dependant,
  37         however the actions performed will match the specified options
  38         as close as is possible.
  39
  40         The commands currently defined in the include file exec/execbase.h
  41         are closely related to the cache control register of the Motorola
  42         MC68030 CPU.
  43
  44     INPUTS
  45         cacheBits   -   The new state of the bits
  46         cacheMask   -   A mask of the bits you wish to change.
  47
  48     RESULT
  49         oldBits     -   The complete value of the cache control bits
  50                         prior to the call of this function.
  51
  52         Your requested actions will have been performed. As a side effect
  53         this function will also cause the caches to be cleared.
  54
  55     NOTES
  56         On CPU's without a separate instruction and data cache, these will
  57         be considered as equal.
  58
  59     EXAMPLE
  60
  61     BUGS
  62
  63     SEE ALSO
  64         CacheClearE(), CacheClearU()
  65
  66     INTERNALS
  67         This function requires replacing in $(KERNEL), or possibly
  68         even $(ARCH) in some cases.
  69
  70 ******************************************************************************/
  71 {
  72     AROS_LIBFUNC_INIT
  73     void (*func)(void);
  74
  75     Disable();
  76     if (SysBase->AttnFlags & AFF_68040) {
  77         /* 68040/68060 support */
  78         func = AROS_SLIB_ENTRY(CacheControl_40, Exec, 108);
  79     } else if (SysBase->AttnFlags & AFF_68020) {
  80         /* 68020/68030 support */
  81         func = AROS_SLIB_ENTRY(CacheControl_20, Exec, 108);
  82     } else {
  83         /* Everybody else (68000, 68010) */
  84         func = AROS_SLIB_ENTRY(CacheControl_00, Exec, 108);
  85     }
  86     SetFunction((struct Library *)SysBase, -LIB_VECTSIZE * 108, func);
  87     Enable();
  88
  89     return CacheControl(cacheBits, cacheMask);
  90
  91     AROS_LIBFUNC_EXIT
  92 } /* CacheControl */