rom/usb/pciusb/pciusb.h

   1 #ifndef PCIUSB_H
   2 #define PCIUSB_H
   3
   4 /*
   5  *----------------------------------------------------------------------------
   6  *                         Includes for pciusb.device
   7  *----------------------------------------------------------------------------
   8  *                   By Chris Hodges <chrisly@platon42.de>
   9  */
  10
  11 #include LC_LIBDEFS_FILE
  12
  13 #include <aros/libcall.h>
  14 #include <aros/asmcall.h>
  15 #include <aros/symbolsets.h>
  16
  17 #include <exec/types.h>
  18 #include <exec/lists.h>
  19 #include <exec/memory.h>
  20 #include <exec/libraries.h>
  21 #include <exec/interrupts.h>
  22 #include <exec/semaphores.h>
  23 #include <exec/execbase.h>
  24 #include <exec/devices.h>
  25 #include <exec/io.h>
  26 #include <exec/ports.h>
  27 #include <exec/errors.h>
  28 #include <exec/resident.h>
  29 #include <exec/initializers.h>
  30 #include <dos/dos.h>
  31
  32 #include <devices/timer.h>
  33 #include <utility/utility.h>
  34
  35 #include <devices/usbhardware.h>
  36 #include <devices/newstyle.h>
  37
  38 #include <oop/oop.h>
  39 #include <hidd/irq.h>
  40
  41 #include "debug.h"
  42
  43 /* Reply the iorequest with success */
  44 #define RC_OK         0
  45
  46 /* Magic cookie, don't set error fields & don't reply the ioreq */
  47 #define RC_DONTREPLY  -1
  48
  49 #define MAX_ROOT_PORTS   16
  50 #define MAX_USB3_PORTS   255
  51
  52 #define PCI_CLASS_SERIAL_USB 0x0c03
  53
  54 /* The unit node - private */
  55 struct PCIUnit
  56 {
  57     struct Unit           hu_Unit;
  58     LONG                  hu_UnitNo;
  59
  60     struct PCIDevice     *hu_Device;         /* Uplink */
  61
  62     struct MsgPort       *hu_MsgPort;
  63     struct timerequest   *hu_TimerReq;       /* Timer I/O Request */
  64
  65     struct timerequest    hu_LateIOReq;      /* Timer I/O Request */
  66     struct MsgPort        hu_LateMsgPort;
  67
  68     struct timerequest    hu_NakTimeoutReq;
  69     struct MsgPort        hu_NakTimeoutMsgPort;
  70     struct Interrupt      hu_NakTimeoutInt;
  71
  72     BOOL                  hu_UnitAllocated;  /* Unit opened */
  73
  74     ULONG                 hu_DevID;          /* Device ID (BusID+DevNo) */
  75     struct List           hu_Controllers;    /* List of controllers */
  76     UWORD                 hu_RootHub11Ports;
  77     UWORD                 hu_RootHub20Ports;
  78     UWORD                 hu_RootHubPorts;
  79     UWORD                 hu_RootHubAddr;    /* Root Hub Address */
  80     UWORD                 hu_RootPortChanges; /* Merged root hub changes */
  81     ULONG                 hu_FrameCounter;   /* Common frame counter */
  82     struct List           hu_RHIOQueue;      /* Root Hub Pending IO Requests */
  83
  84     struct PCIController *hu_PortMap11[MAX_ROOT_PORTS]; /* Maps from Global Port to USB 1.1 controller */
  85     struct PCIController *hu_PortMap20[MAX_ROOT_PORTS]; /* Maps from Global Port to USB 2.0 controller */
  86     UBYTE                 hu_PortNum11[MAX_ROOT_PORTS]; /* Maps from Global Port to USB 1.1 companion controller port */
  87     UBYTE                 hu_EhciOwned[MAX_ROOT_PORTS]; /* TRUE, if currently owned by EHCI */
  88     UBYTE                 hu_ProductName[80]; /* for Query device */
  89     struct PCIController *hu_DevControllers[128]; /* maps from Device address to controller */
  90     struct IOUsbHWReq    *hu_DevBusyReq[128*16*2]; /* pointer to io assigned to the Endpoint */
  91     ULONG                 hu_NakTimeoutFrame[128*16*2]; /* Nak Timeout framenumber */
  92     UBYTE                 hu_DevDataToggle[128*16*2]; /* Data toggle bit for endpoints */
  93 };
  94
  95 #define HCITYPE_UHCI     0x00
  96 #define HCITYPE_OHCI     0x10
  97 #define HCITYPE_EHCI     0x20
  98
  99 struct PCIController
 100 {
 101     struct Node           hc_Node;
 102     struct PCIDevice     *hc_Device;        /* Uplink */
 103     struct PCIUnit       *hc_Unit;          /* Uplink */
 104
 105     OOP_Object           *hc_PCIDeviceObject;
 106     OOP_Object           *hc_PCIDriverObject;
 107     ULONG                 hc_DevID;
 108     UWORD                 hc_FunctionNum;
 109     UWORD                 hc_HCIType;
 110     UWORD                 hc_NumPorts;
 111     UWORD                 hc_Flags;         /* See below */
 112
 113     volatile APTR         hc_RegBase;
 114
 115     APTR                  hc_PCIMem;
 116     ULONG                 hc_PCIMemSize;
 117     IPTR                  hc_PCIVirtualAdjust;
 118     IPTR                  hc_PCIIntLine;
 119     HIDDT_IRQ_Handler     hc_PCIIntHandler;
 120     ULONG                 hc_PCIIntEnMask;
 121
 122     ULONG                *hc_UhciFrameList;
 123     struct UhciQH        *hc_UhciQHPool;
 124     struct UhciTD        *hc_UhciTDPool;
 125
 126     struct UhciQH        *hc_UhciCtrlQH;
 127     struct UhciQH        *hc_UhciBulkQH;
 128     struct UhciQH        *hc_UhciIntQH[9];
 129     struct UhciTD        *hc_UhciIsoTD;
 130     struct UhciQH        *hc_UhciTermQH;
 131
 132     ULONG                 hc_EhciUsbCmd;
 133     ULONG                *hc_EhciFrameList;
 134     struct EhciQH        *hc_EhciQHPool;
 135     struct EhciTD        *hc_EhciTDPool;
 136
 137     struct EhciQH        *hc_EhciAsyncQH;
 138     struct EhciQH        *hc_EhciIntQH[11];
 139     struct EhciQH        *hc_EhciTermQH;
 140     volatile BOOL         hc_AsyncAdvanced;
 141     struct EhciQH        *hc_EhciAsyncFreeQH;
 142     struct EhciTD        *hc_ShortPktEndTD;
 143
 144     struct OhciED        *hc_OhciCtrlHeadED;
 145     struct OhciED        *hc_OhciCtrlTailED;
 146     struct OhciED        *hc_OhciBulkHeadED;
 147     struct OhciED        *hc_OhciBulkTailED;
 148     struct OhciED        *hc_OhciIntED[5];
 149     struct OhciED        *hc_OhciTermED;
 150     struct OhciTD        *hc_OhciTermTD;
 151     struct OhciHCCA      *hc_OhciHCCA;
 152     struct OhciED        *hc_OhciEDPool;
 153     struct OhciTD        *hc_OhciTDPool;
 154     struct OhciED        *hc_OhciAsyncFreeED;
 155     ULONG                 hc_OhciDoneQueue;
 156     struct List           hc_OhciRetireQueue;
 157
 158     ULONG                 hc_FrameCounter;
 159     struct List           hc_TDQueue;
 160     struct List           hc_AbortQueue;
 161     struct List           hc_PeriodicTDQueue;
 162     struct List           hc_CtrlXFerQueue;
 163     struct List           hc_IntXFerQueue;
 164     struct List           hc_IsoXFerQueue;
 165     struct List           hc_BulkXFerQueue;
 166
 167     struct Interrupt      hc_CompleteInt;
 168     struct Interrupt      hc_ResetInt;
 169
 170     UBYTE                 hc_PortNum20[MAX_ROOT_PORTS];     /* Global Port number the local controller port corresponds with */
 171
 172     UWORD                 hc_PortChangeMap[MAX_ROOT_PORTS]; /* Port Change Map */
 173
 174     BOOL                  hc_complexrouting;
 175     ULONG                 hc_portroute;
 176
 177 };
 178
 179 /* hc_Flags */
 180 #define HCF_ALLOCATED   0x0001  /* PCI board allocated           */
 181 #define HCF_ONLINE      0x0002  /* Online                        */
 182 #define HCF_STOP_BULK   0x0004  /* Bulk transfers stopped        */
 183 #define HCF_STOP_CTRL   0x0008  /* Control transfers stopped     */
 184 #define HCF_ABORT       0x0010  /* Aborted requests available    */
 185
 186 /* The device node - private
 187 */
 188 struct PCIDevice
 189 {
 190     struct Library      hd_Library;       /* standard */
 191     UWORD               hd_Flags;         /* various flags */
 192
 193     struct UtilityBase *hd_UtilityBase;   /* for tags etc */
 194
 195     struct List         hd_TempHCIList;
 196     OOP_Object         *hd_PCIHidd;
 197     OOP_Object         *hd_IRQHidd;
 198     OOP_AttrBase        hd_HiddAB;
 199     OOP_AttrBase        hd_HiddPCIDeviceAB;
 200
 201     BOOL                hd_ScanDone;      /* PCI scan done? */
 202     APTR                hd_MemPool;       /* Memory Pool */
 203
 204         struct List         hd_Units;         /* List of units */
 205 };
 206
 207 /* hd_Flags */
 208 #define HDF_FORCEPOWER  0x01
 209
 210 #endif /* PCIUSB_H */