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MINI2440: Added support for SST flash in CFI mode
[u-boot-openmoko/mini2440.git] / drivers / mtd / cfi_flash.c
blob5fa3b8e04dd1f3237cd3c89fc0ac5ba8f9a22a0d
1 /*
2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
4 *
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 *
8 * Copyright (C) 2004
9 * Ed Okerson
10 *
11 * Copyright (C) 2006
12 * Tolunay Orkun <listmember@orkun.us>
13 *
14 * See file CREDITS for list of people who contributed to this
15 * project.
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
26 *
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * MA 02111-1307 USA
31 *
32 */
33
34 /* The DEBUG define must be before common to enable debugging */
35 /* #define DEBUG */
36
37 #include <common.h>
38 #include <asm/processor.h>
39 #include <asm/io.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
42 #ifdef CFG_FLASH_CFI_DRIVER
43
44 /*
45 * This file implements a Common Flash Interface (CFI) driver for
46 * U-Boot.
47 *
48 * The width of the port and the width of the chips are determined at
49 * initialization. These widths are used to calculate the address for
50 * access CFI data structures.
51 *
52 * References
53 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
54 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
55 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
56 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
57 * AMD CFI Specification, Release 2.0 December 1, 2001
58 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
59 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
60 *
61 * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
62 * reading and writing ... (yes there is such a Hardware).
63 */
64
65 #ifndef CFG_FLASH_BANKS_LIST
66 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
67 #endif
68
69 #define FLASH_CMD_CFI 0x98
70 #define FLASH_CMD_READ_ID 0x90
71 #define FLASH_CMD_RESET 0xff
72 #define FLASH_CMD_BLOCK_ERASE 0x20
73 #define FLASH_CMD_ERASE_CONFIRM 0xD0
74 #define FLASH_CMD_WRITE 0x40
75 #define FLASH_CMD_PROTECT 0x60
76 #define FLASH_CMD_PROTECT_SET 0x01
77 #define FLASH_CMD_PROTECT_CLEAR 0xD0
78 #define FLASH_CMD_CLEAR_STATUS 0x50
79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
80 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
81
82 #define FLASH_STATUS_DONE 0x80
83 #define FLASH_STATUS_ESS 0x40
84 #define FLASH_STATUS_ECLBS 0x20
85 #define FLASH_STATUS_PSLBS 0x10
86 #define FLASH_STATUS_VPENS 0x08
87 #define FLASH_STATUS_PSS 0x04
88 #define FLASH_STATUS_DPS 0x02
89 #define FLASH_STATUS_R 0x01
90 #define FLASH_STATUS_PROTECT 0x01
91
92 #define AMD_CMD_RESET 0xF0
93 #define AMD_CMD_WRITE 0xA0
94 #define AMD_CMD_ERASE_START 0x80
95 #define AMD_CMD_ERASE_SECTOR 0x30
96 #define AMD_CMD_UNLOCK_START 0xAA
97 #define AMD_CMD_UNLOCK_ACK 0x55
98 #define AMD_CMD_WRITE_TO_BUFFER 0x25
99 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
100
101 #define AMD_STATUS_TOGGLE 0x40
102 #define AMD_STATUS_ERROR 0x20
103
104 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
105 #define FLASH_OFFSET_DEVICE_ID 0x01
106 #define FLASH_OFFSET_DEVICE_ID2 0x0E
107 #define FLASH_OFFSET_DEVICE_ID3 0x0F
108 #define FLASH_OFFSET_CFI 0x55
109 #define FLASH_OFFSET_CFI_ALT 0x555
110 #define FLASH_OFFSET_CFI_RESP 0x10
111 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
112 /* extended query table primary address */
113 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
114 #define FLASH_OFFSET_WTOUT 0x1F
115 #define FLASH_OFFSET_WBTOUT 0x20
116 #define FLASH_OFFSET_ETOUT 0x21
117 #define FLASH_OFFSET_CETOUT 0x22
118 #define FLASH_OFFSET_WMAX_TOUT 0x23
119 #define FLASH_OFFSET_WBMAX_TOUT 0x24
120 #define FLASH_OFFSET_EMAX_TOUT 0x25
121 #define FLASH_OFFSET_CEMAX_TOUT 0x26
122 #define FLASH_OFFSET_SIZE 0x27
123 #define FLASH_OFFSET_INTERFACE 0x28
124 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
125 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
126 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
127 #define FLASH_OFFSET_PROTECT 0x02
128 #define FLASH_OFFSET_USER_PROTECTION 0x85
129 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
130
131 #define CFI_CMDSET_NONE 0
132 #define CFI_CMDSET_INTEL_EXTENDED 1
133 #define CFI_CMDSET_AMD_STANDARD 2
134 #define CFI_CMDSET_INTEL_STANDARD 3
135 #define CFI_CMDSET_AMD_EXTENDED 4
136 #define CFI_CMDSET_MITSU_STANDARD 256
137 #define CFI_CMDSET_MITSU_EXTENDED 257
138 #define CFI_CMDSET_SST 258
139 #define CFI_CMDSET_SST_NEW 0x701
140
141 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
142 # undef FLASH_CMD_RESET
143 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
144 #endif
145
146 typedef union {
147 unsigned char c;
148 unsigned short w;
149 unsigned long l;
150 unsigned long long ll;
151 } cfiword_t;
152
153 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
154
155 #if CONFIG_MINI2440
156 /* no need to try the other offsets on the mini */
157 static uint flash_offset_cfi[1] = { 0x5555 };
158 #else
159 static uint flash_offset_cfi[3] = {
160 FLASH_OFFSET_CFI,
161 FLASH_OFFSET_CFI_ALT,
162 0x5555 };
163 #endif
164
165 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
166 #ifdef CFG_MAX_FLASH_BANKS_DETECT
167 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
168 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
169 #else
170 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
171 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
172 #endif
173
174 /*
175 * Check if chip width is defined. If not, start detecting with 8bit.
176 */
177 #ifndef CFG_FLASH_CFI_WIDTH
178 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
179 #endif
180
181 typedef unsigned long flash_sect_t;
182
183 /* CFI standard query structure */
184 struct cfi_qry {
185 u8 qry[3];
186 u16 p_id;
187 u16 p_adr;
188 u16 a_id;
189 u16 a_adr;
190 u8 vcc_min;
191 u8 vcc_max;
192 u8 vpp_min;
193 u8 vpp_max;
194 u8 word_write_timeout_typ;
195 u8 buf_write_timeout_typ;
196 u8 block_erase_timeout_typ;
197 u8 chip_erase_timeout_typ;
198 u8 word_write_timeout_max;
199 u8 buf_write_timeout_max;
200 u8 block_erase_timeout_max;
201 u8 chip_erase_timeout_max;
202 u8 dev_size;
203 u16 interface_desc;
204 u16 max_buf_write_size;
205 u8 num_erase_regions;
206 u32 erase_region_info[NUM_ERASE_REGIONS];
207 } __attribute__((packed));
208
209 struct cfi_pri_hdr {
210 u8 pri[3];
211 u8 major_version;
212 u8 minor_version;
213 } __attribute__((packed));
214
215 static void flash_write8(u8 value, void *addr)
216 {
217 __raw_writeb(value, addr);
218 }
219
220 static void flash_write16(u16 value, void *addr)
221 {
222 __raw_writew(value, addr);
223 }
224
225 static void flash_write32(u32 value, void *addr)
226 {
227 __raw_writel(value, addr);
228 }
229
230 static void flash_write64(u64 value, void *addr)
231 {
232 /* No architectures currently implement __raw_writeq() */
233 *(volatile u64 *)addr = value;
234 }
235
236 static u8 flash_read8(void *addr)
237 {
238 return __raw_readb(addr);
239 }
240
241 static u16 flash_read16(void *addr)
242 {
243 return __raw_readw(addr);
244 }
245
246 static u32 flash_read32(void *addr)
247 {
248 return __raw_readl(addr);
249 }
250
251 static u64 __flash_read64(void *addr)
252 {
253 /* No architectures currently implement __raw_readq() */
254 return *(volatile u64 *)addr;
255 }
256
257 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
258
259 /*-----------------------------------------------------------------------
260 */
261 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
262 static flash_info_t *flash_get_info(ulong base)
263 {
264 int i;
265 flash_info_t * info = 0;
266
267 for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
268 info = & flash_info[i];
269 if (info->size && info->start[0] <= base &&
270 base <= info->start[0] + info->size - 1)
271 break;
272 }
273
274 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
275 }
276 #endif
277
278 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
279 {
280 if (sect != (info->sector_count - 1))
281 return info->start[sect + 1] - info->start[sect];
282 else
283 return info->start[0] + info->size - info->start[sect];
284 }
285
286 /*-----------------------------------------------------------------------
287 * create an address based on the offset and the port width
288 */
289 static inline void *
290 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
291 {
292 unsigned int byte_offset = offset * info->portwidth;
293
294 return map_physmem(info->start[sect] + byte_offset,
295 flash_sector_size(info, sect) - byte_offset,
296 MAP_NOCACHE);
297 }
298
299 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
300 unsigned int offset, void *addr)
301 {
302 unsigned int byte_offset = offset * info->portwidth;
303
304 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
305 }
306
307 /*-----------------------------------------------------------------------
308 * make a proper sized command based on the port and chip widths
309 */
310 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
311 {
312 int i;
313 uchar *cp = (uchar *) cmdbuf;
314
315 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
316 for (i = info->portwidth; i > 0; i--)
317 #else
318 for (i = 1; i <= info->portwidth; i++)
319 #endif
320 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
321 }
322
323 #ifdef DEBUG
324 /*-----------------------------------------------------------------------
325 * Debug support
326 */
327 static void print_longlong (char *str, unsigned long long data)
328 {
329 int i;
330 char *cp;
331
332 cp = (unsigned char *) &data;
333 for (i = 0; i < 8; i++)
334 sprintf (&str[i * 2], "%2.2x", *cp++);
335 }
336
337 static void flash_printqry (struct cfi_qry *qry)
338 {
339 u8 *p = (u8 *)qry;
340 int x, y;
341
342 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
343 debug("%02x : ", x);
344 for (y = 0; y < 16; y++)
345 debug("%2.2x ", p[x + y]);
346 debug(" ");
347 for (y = 0; y < 16; y++) {
348 unsigned char c = p[x + y];
349 if (c >= 0x20 && c <= 0x7e)
350 debug("%c", c);
351 else
352 debug(".");
353 }
354 debug("\n");
355 }
356 }
357 #endif
358
359
360 /*-----------------------------------------------------------------------
361 * read a character at a port width address
362 */
363 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
364 {
365 uchar *cp;
366 uchar retval;
367
368 cp = flash_map (info, 0, offset);
369 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
370 retval = flash_read8(cp);
371 #else
372 retval = flash_read8(cp + info->portwidth - 1);
373 #endif
374 flash_unmap (info, 0, offset, cp);
375 return retval;
376 }
377
378 /*-----------------------------------------------------------------------
379 * read a word at a port width address, assume 16bit bus
380 */
381 static inline ushort flash_read_word (flash_info_t * info, uint offset)
382 {
383 ushort *addr, retval;
384
385 addr = flash_map (info, 0, offset);
386 retval = flash_read16 (addr);
387 flash_unmap (info, 0, offset, addr);
388 return retval;
389 }
390
391
392 /*-----------------------------------------------------------------------
393 * read a long word by picking the least significant byte of each maximum
394 * port size word. Swap for ppc format.
395 */
396 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
397 uint offset)
398 {
399 uchar *addr;
400 ulong retval;
401
402 #ifdef DEBUG
403 int x;
404 #endif
405 addr = flash_map (info, sect, offset);
406
407 #ifdef DEBUG
408 debug ("long addr is at %p info->portwidth = %d\n", addr,
409 info->portwidth);
410 for (x = 0; x < 4 * info->portwidth; x++) {
411 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
412 }
413 #endif
414 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
415 retval = ((flash_read8(addr) << 16) |
416 (flash_read8(addr + info->portwidth) << 24) |
417 (flash_read8(addr + 2 * info->portwidth)) |
418 (flash_read8(addr + 3 * info->portwidth) << 8));
419 #else
420 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
421 (flash_read8(addr + info->portwidth - 1) << 16) |
422 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
423 (flash_read8(addr + 3 * info->portwidth - 1)));
424 #endif
425 flash_unmap(info, sect, offset, addr);
426
427 return retval;
428 }
429
430 /*
431 * Write a proper sized command to the correct address
432 */
433 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
434 uint offset, uchar cmd)
435 {
436
437 void *addr;
438 cfiword_t cword;
439
440 addr = flash_map (info, sect, offset);
441 flash_make_cmd (info, cmd, &cword);
442 switch (info->portwidth) {
443 case FLASH_CFI_8BIT:
444 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
445 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
446 flash_write8(cword.c, addr);
447 break;
448 case FLASH_CFI_16BIT:
449 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
450 cmd, cword.w,
451 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
452 flash_write16(cword.w, addr);
453 break;
454 case FLASH_CFI_32BIT:
455 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
456 cmd, cword.l,
457 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
458 flash_write32(cword.l, addr);
459 break;
460 case FLASH_CFI_64BIT:
461 #ifdef DEBUG
462 {
463 char str[20];
464
465 print_longlong (str, cword.ll);
466
467 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
468 addr, cmd, str,
469 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
470 }
471 #endif
472 flash_write64(cword.ll, addr);
473 break;
474 }
475
476 /* Ensure all the instructions are fully finished */
477 sync();
478
479 flash_unmap(info, sect, offset, addr);
480 }
481
482 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
483 {
484 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
485 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
486 }
487
488 /*-----------------------------------------------------------------------
489 */
490 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
491 uint offset, uchar cmd)
492 {
493 void *addr;
494 cfiword_t cword;
495 int retval;
496
497 addr = flash_map (info, sect, offset);
498 flash_make_cmd (info, cmd, &cword);
499
500 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
501 switch (info->portwidth) {
502 case FLASH_CFI_8BIT:
503 debug ("is= %x %x\n", flash_read8(addr), cword.c);
504 retval = (flash_read8(addr) == cword.c);
505 break;
506 case FLASH_CFI_16BIT:
507 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
508 retval = (flash_read16(addr) == cword.w);
509 break;
510 case FLASH_CFI_32BIT:
511 debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l);
512 retval = (flash_read32(addr) == cword.l);
513 break;
514 case FLASH_CFI_64BIT:
515 #ifdef DEBUG
516 {
517 char str1[20];
518 char str2[20];
519
520 print_longlong (str1, flash_read64(addr));
521 print_longlong (str2, cword.ll);
522 debug ("is= %s %s\n", str1, str2);
523 }
524 #endif
525 retval = (flash_read64(addr) == cword.ll);
526 break;
527 default:
528 retval = 0;
529 break;
530 }
531 flash_unmap(info, sect, offset, addr);
532
533 return retval;
534 }
535
536 /*-----------------------------------------------------------------------
537 */
538 static int flash_isset (flash_info_t * info, flash_sect_t sect,
539 uint offset, uchar cmd)
540 {
541 void *addr;
542 cfiword_t cword;
543 int retval;
544
545 addr = flash_map (info, sect, offset);
546 flash_make_cmd (info, cmd, &cword);
547 switch (info->portwidth) {
548 case FLASH_CFI_8BIT:
549 retval = ((flash_read8(addr) & cword.c) == cword.c);
550 break;
551 case FLASH_CFI_16BIT:
552 retval = ((flash_read16(addr) & cword.w) == cword.w);
553 break;
554 case FLASH_CFI_32BIT:
555 retval = ((flash_read32(addr) & cword.l) == cword.l);
556 break;
557 case FLASH_CFI_64BIT:
558 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
559 break;
560 default:
561 retval = 0;
562 break;
563 }
564 flash_unmap(info, sect, offset, addr);
565
566 return retval;
567 }
568
569 /*-----------------------------------------------------------------------
570 */
571 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
572 uint offset, uchar cmd)
573 {
574 void *addr;
575 cfiword_t cword;
576 int retval;
577
578 addr = flash_map (info, sect, offset);
579 flash_make_cmd (info, cmd, &cword);
580 switch (info->portwidth) {
581 case FLASH_CFI_8BIT:
582 retval = ((flash_read8(addr) & cword.c) !=
583 (flash_read8(addr) & cword.c));
584 break;
585 case FLASH_CFI_16BIT:
586 retval = ((flash_read16(addr) & cword.w) !=
587 (flash_read16(addr) & cword.w));
588 break;
589 case FLASH_CFI_32BIT:
590 retval = ((flash_read32(addr) & cword.l) !=
591 (flash_read32(addr) & cword.l));
592 break;
593 case FLASH_CFI_64BIT:
594 retval = ((flash_read64(addr) & cword.ll) !=
595 (flash_read64(addr) & cword.ll));
596 break;
597 default:
598 retval = 0;
599 break;
600 }
601 flash_unmap(info, sect, offset, addr);
602
603 return retval;
604 }
605
606 /*
607 * flash_is_busy - check to see if the flash is busy
608 *
609 * This routine checks the status of the chip and returns true if the
610 * chip is busy.
611 */
612 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
613 {
614 int retval;
615
616 switch (info->vendor) {
617 case CFI_CMDSET_INTEL_STANDARD:
618 case CFI_CMDSET_INTEL_EXTENDED:
619 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
620 break;
621 case CFI_CMDSET_AMD_STANDARD:
622 case CFI_CMDSET_AMD_EXTENDED:
623 case CFI_CMDSET_SST_NEW:
624 #ifdef CONFIG_FLASH_CFI_LEGACY
625 case CFI_CMDSET_AMD_LEGACY:
626 #endif
627 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
628 break;
629 default:
630 retval = 0;
631 }
632 debug ("flash_is_busy: %d\n", retval);
633 return retval;
634 }
635
636 /*-----------------------------------------------------------------------
637 * wait for XSR.7 to be set. Time out with an error if it does not.
638 * This routine does not set the flash to read-array mode.
639 */
640 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
641 ulong tout, char *prompt)
642 {
643 ulong start;
644
645 #if CFG_HZ != 1000
646 tout *= CFG_HZ/1000;
647 #endif
648
649 /* Wait for command completion */
650 start = get_timer (0);
651 while (flash_is_busy (info, sector)) {
652 if (get_timer (start) > tout) {
653 printf ("Flash %s timeout at address %lx data %lx\n",
654 prompt, info->start[sector],
655 flash_read_long (info, sector, 0));
656 flash_write_cmd (info, sector, 0, info->cmd_reset);
657 return ERR_TIMOUT;
658 }
659 udelay (1); /* also triggers watchdog */
660 }
661 return ERR_OK;
662 }
663
664 /*-----------------------------------------------------------------------
665 * Wait for XSR.7 to be set, if it times out print an error, otherwise
666 * do a full status check.
667 *
668 * This routine sets the flash to read-array mode.
669 */
670 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
671 ulong tout, char *prompt)
672 {
673 int retcode;
674
675 retcode = flash_status_check (info, sector, tout, prompt);
676 switch (info->vendor) {
677 case CFI_CMDSET_INTEL_EXTENDED:
678 case CFI_CMDSET_INTEL_STANDARD:
679 if ((retcode == ERR_OK)
680 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
681 retcode = ERR_INVAL;
682 printf ("Flash %s error at address %lx\n", prompt,
683 info->start[sector]);
684 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
685 FLASH_STATUS_PSLBS)) {
686 puts ("Command Sequence Error.\n");
687 } else if (flash_isset (info, sector, 0,
688 FLASH_STATUS_ECLBS)) {
689 puts ("Block Erase Error.\n");
690 retcode = ERR_NOT_ERASED;
691 } else if (flash_isset (info, sector, 0,
692 FLASH_STATUS_PSLBS)) {
693 puts ("Locking Error\n");
694 }
695 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
696 puts ("Block locked.\n");
697 retcode = ERR_PROTECTED;
698 }
699 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
700 puts ("Vpp Low Error.\n");
701 }
702 flash_write_cmd (info, sector, 0, info->cmd_reset);
703 break;
704 default:
705 break;
706 }
707 return retcode;
708 }
709
710 /*-----------------------------------------------------------------------
711 */
712 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
713 {
714 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
715 unsigned short w;
716 unsigned int l;
717 unsigned long long ll;
718 #endif
719
720 switch (info->portwidth) {
721 case FLASH_CFI_8BIT:
722 cword->c = c;
723 break;
724 case FLASH_CFI_16BIT:
725 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
726 w = c;
727 w <<= 8;
728 cword->w = (cword->w >> 8) | w;
729 #else
730 cword->w = (cword->w << 8) | c;
731 #endif
732 break;
733 case FLASH_CFI_32BIT:
734 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
735 l = c;
736 l <<= 24;
737 cword->l = (cword->l >> 8) | l;
738 #else
739 cword->l = (cword->l << 8) | c;
740 #endif
741 break;
742 case FLASH_CFI_64BIT:
743 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
744 ll = c;
745 ll <<= 56;
746 cword->ll = (cword->ll >> 8) | ll;
747 #else
748 cword->ll = (cword->ll << 8) | c;
749 #endif
750 break;
751 }
752 }
753
754 /* loop through the sectors from the highest address when the passed
755 * address is greater or equal to the sector address we have a match
756 */
757 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
758 {
759 flash_sect_t sector;
760
761 for (sector = info->sector_count - 1; sector >= 0; sector--) {
762 if (addr >= info->start[sector])
763 break;
764 }
765 return sector;
766 }
767
768 /*-----------------------------------------------------------------------
769 */
770 static int flash_write_cfiword (flash_info_t * info, ulong dest,
771 cfiword_t cword)
772 {
773 void *dstaddr;
774 int flag;
775
776 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
777
778 /* Check if Flash is (sufficiently) erased */
779 switch (info->portwidth) {
780 case FLASH_CFI_8BIT:
781 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
782 break;
783 case FLASH_CFI_16BIT:
784 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
785 break;
786 case FLASH_CFI_32BIT:
787 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
788 break;
789 case FLASH_CFI_64BIT:
790 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
791 break;
792 default:
793 flag = 0;
794 break;
795 }
796 if (!flag) {
797 unmap_physmem(dstaddr, info->portwidth);
798 return ERR_NOT_ERASED;
799 }
800
801 /* Disable interrupts which might cause a timeout here */
802 flag = disable_interrupts ();
803
804 switch (info->vendor) {
805 case CFI_CMDSET_INTEL_EXTENDED:
806 case CFI_CMDSET_INTEL_STANDARD:
807 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
808 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
809 break;
810 case CFI_CMDSET_AMD_EXTENDED:
811 case CFI_CMDSET_AMD_STANDARD:
812 case CFI_CMDSET_SST_NEW:
813 #ifdef CONFIG_FLASH_CFI_LEGACY
814 case CFI_CMDSET_AMD_LEGACY:
815 #endif
816 flash_unlock_seq (info, 0);
817 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
818 break;
819 }
820
821 switch (info->portwidth) {
822 case FLASH_CFI_8BIT:
823 flash_write8(cword.c, dstaddr);
824 break;
825 case FLASH_CFI_16BIT:
826 flash_write16(cword.w, dstaddr);
827 break;
828 case FLASH_CFI_32BIT:
829 flash_write32(cword.l, dstaddr);
830 break;
831 case FLASH_CFI_64BIT:
832 flash_write64(cword.ll, dstaddr);
833 break;
834 }
835
836 /* re-enable interrupts if necessary */
837 if (flag)
838 enable_interrupts ();
839
840 unmap_physmem(dstaddr, info->portwidth);
841
842 return flash_full_status_check (info, find_sector (info, dest),
843 info->write_tout, "write");
844 }
845
846 #ifdef CFG_FLASH_USE_BUFFER_WRITE
847
848 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
849 int len)
850 {
851 flash_sect_t sector;
852 int cnt;
853 int retcode;
854 void *src = cp;
855 void *dst = map_physmem(dest, len, MAP_NOCACHE);
856 void *dst2 = dst;
857 int flag = 0;
858
859 switch (info->portwidth) {
860 case FLASH_CFI_8BIT:
861 cnt = len;
862 break;
863 case FLASH_CFI_16BIT:
864 cnt = len >> 1;
865 break;
866 case FLASH_CFI_32BIT:
867 cnt = len >> 2;
868 break;
869 case FLASH_CFI_64BIT:
870 cnt = len >> 3;
871 break;
872 default:
873 retcode = ERR_INVAL;
874 goto out_unmap;
875 }
876
877 while ((cnt-- > 0) && (flag == 0)) {
878 switch (info->portwidth) {
879 case FLASH_CFI_8BIT:
880 flag = ((flash_read8(dst2) & flash_read8(src)) ==
881 flash_read8(src));
882 src += 1, dst2 += 1;
883 break;
884 case FLASH_CFI_16BIT:
885 flag = ((flash_read16(dst2) & flash_read16(src)) ==
886 flash_read16(src));
887 src += 2, dst2 += 2;
888 break;
889 case FLASH_CFI_32BIT:
890 flag = ((flash_read32(dst2) & flash_read32(src)) ==
891 flash_read32(src));
892 src += 4, dst2 += 4;
893 break;
894 case FLASH_CFI_64BIT:
895 flag = ((flash_read64(dst2) & flash_read64(src)) ==
896 flash_read64(src));
897 src += 8, dst2 += 8;
898 break;
899 }
900 }
901 if (!flag) {
902 retcode = ERR_NOT_ERASED;
903 goto out_unmap;
904 }
905
906 src = cp;
907 sector = find_sector (info, dest);
908
909 switch (info->vendor) {
910 case CFI_CMDSET_INTEL_STANDARD:
911 case CFI_CMDSET_INTEL_EXTENDED:
912 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
913 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
914 retcode = flash_status_check (info, sector,
915 info->buffer_write_tout,
916 "write to buffer");
917 if (retcode == ERR_OK) {
918 /* reduce the number of loops by the width of
919 * the port */
920 switch (info->portwidth) {
921 case FLASH_CFI_8BIT:
922 cnt = len;
923 break;
924 case FLASH_CFI_16BIT:
925 cnt = len >> 1;
926 break;
927 case FLASH_CFI_32BIT:
928 cnt = len >> 2;
929 break;
930 case FLASH_CFI_64BIT:
931 cnt = len >> 3;
932 break;
933 default:
934 retcode = ERR_INVAL;
935 goto out_unmap;
936 }
937 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
938 while (cnt-- > 0) {
939 switch (info->portwidth) {
940 case FLASH_CFI_8BIT:
941 flash_write8(flash_read8(src), dst);
942 src += 1, dst += 1;
943 break;
944 case FLASH_CFI_16BIT:
945 flash_write16(flash_read16(src), dst);
946 src += 2, dst += 2;
947 break;
948 case FLASH_CFI_32BIT:
949 flash_write32(flash_read32(src), dst);
950 src += 4, dst += 4;
951 break;
952 case FLASH_CFI_64BIT:
953 flash_write64(flash_read64(src), dst);
954 src += 8, dst += 8;
955 break;
956 default:
957 retcode = ERR_INVAL;
958 goto out_unmap;
959 }
960 }
961 flash_write_cmd (info, sector, 0,
962 FLASH_CMD_WRITE_BUFFER_CONFIRM);
963 retcode = flash_full_status_check (
964 info, sector, info->buffer_write_tout,
965 "buffer write");
966 }
967
968 break;
969
970 case CFI_CMDSET_AMD_STANDARD:
971 case CFI_CMDSET_AMD_EXTENDED:
972 case CFI_CMDSET_SST_NEW:
973 flash_unlock_seq(info,0);
974 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
975
976 switch (info->portwidth) {
977 case FLASH_CFI_8BIT:
978 cnt = len;
979 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
980 while (cnt-- > 0) {
981 flash_write8(flash_read8(src), dst);
982 src += 1, dst += 1;
983 }
984 break;
985 case FLASH_CFI_16BIT:
986 cnt = len >> 1;
987 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
988 while (cnt-- > 0) {
989 flash_write16(flash_read16(src), dst);
990 src += 2, dst += 2;
991 }
992 break;
993 case FLASH_CFI_32BIT:
994 cnt = len >> 2;
995 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
996 while (cnt-- > 0) {
997 flash_write32(flash_read32(src), dst);
998 src += 4, dst += 4;
999 }
1000 break;
1001 case FLASH_CFI_64BIT:
1002 cnt = len >> 3;
1003 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1004 while (cnt-- > 0) {
1005 flash_write64(flash_read64(src), dst);
1006 src += 8, dst += 8;
1007 }
1008 break;
1009 default:
1010 retcode = ERR_INVAL;
1011 goto out_unmap;
1012 }
1013
1014 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1015 retcode = flash_full_status_check (info, sector,
1016 info->buffer_write_tout,
1017 "buffer write");
1018 break;
1019
1020 default:
1021 debug ("Unknown Command Set\n");
1022 retcode = ERR_INVAL;
1023 break;
1024 }
1025
1026 out_unmap:
1027 unmap_physmem(dst, len);
1028 return retcode;
1029 }
1030 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1031
1032
1033 /*-----------------------------------------------------------------------
1034 */
1035 int flash_erase (flash_info_t * info, int s_first, int s_last)
1036 {
1037 int rcode = 0;
1038 int prot;
1039 flash_sect_t sect;
1040
1041 if (info->flash_id != FLASH_MAN_CFI) {
1042 puts ("Can't erase unknown flash type - aborted\n");
1043 return 1;
1044 }
1045 if ((s_first < 0) || (s_first > s_last)) {
1046 puts ("- no sectors to erase\n");
1047 return 1;
1048 }
1049
1050 prot = 0;
1051 for (sect = s_first; sect <= s_last; ++sect) {
1052 if (info->protect[sect]) {
1053 prot++;
1054 }
1055 }
1056 if (prot) {
1057 printf ("- Warning: %d protected sectors will not be erased!\n",
1058 prot);
1059 } else {
1060 putc ('\n');
1061 }
1062
1063
1064 for (sect = s_first; sect <= s_last; sect++) {
1065 if (info->protect[sect] == 0) { /* not protected */
1066 switch (info->vendor) {
1067 case CFI_CMDSET_INTEL_STANDARD:
1068 case CFI_CMDSET_INTEL_EXTENDED:
1069 flash_write_cmd (info, sect, 0,
1070 FLASH_CMD_CLEAR_STATUS);
1071 flash_write_cmd (info, sect, 0,
1072 FLASH_CMD_BLOCK_ERASE);
1073 flash_write_cmd (info, sect, 0,
1074 FLASH_CMD_ERASE_CONFIRM);
1075 break;
1076 case CFI_CMDSET_AMD_STANDARD:
1077 case CFI_CMDSET_AMD_EXTENDED:
1078 flash_unlock_seq (info, sect);
1079 flash_write_cmd (info, sect,
1080 info->addr_unlock1,
1081 AMD_CMD_ERASE_START);
1082 flash_unlock_seq (info, sect);
1083 flash_write_cmd (info, sect, 0,
1084 AMD_CMD_ERASE_SECTOR);
1085 break;
1086 case CFI_CMDSET_SST_NEW:
1087 flash_unlock_seq (info, 0);
1088 flash_write_cmd (info, 0,
1089 info->addr_unlock1,
1090 AMD_CMD_ERASE_START);
1091 flash_unlock_seq (info, 0);
1092 flash_write_cmd (info, sect, 0,
1093 AMD_CMD_ERASE_SECTOR);
1094 break;
1095 #ifdef CONFIG_FLASH_CFI_LEGACY
1096 case CFI_CMDSET_AMD_LEGACY:
1097 flash_unlock_seq (info, 0);
1098 flash_write_cmd (info, 0, info->addr_unlock1,
1099 AMD_CMD_ERASE_START);
1100 flash_unlock_seq (info, 0);
1101 flash_write_cmd (info, sect, 0,
1102 AMD_CMD_ERASE_SECTOR);
1103 break;
1104 #endif
1105 default:
1106 debug ("Unkown flash vendor %d\n",
1107 info->vendor);
1108 break;
1109 }
1110
1111 if (flash_full_status_check
1112 (info, sect, info->erase_blk_tout, "erase")) {
1113 rcode = 1;
1114 } else
1115 putc ('.');
1116 }
1117 }
1118 puts (" done\n");
1119 return rcode;
1120 }
1121
1122 static int _flash_is_sector_erased(flash_info_t * info, int i)
1123 {
1124 int k;
1125 int size;
1126 int erased;
1127 volatile unsigned long *flash;
1128
1129 /*
1130 * Check if whole sector is erased
1131 */
1132 size = flash_sector_size(info, i);
1133 erased = 1;
1134 flash = (volatile unsigned long *) info->start[i];
1135 size = size >> 2; /* divide by 4 for longword access */
1136 for (k = 0; k < size; k++) {
1137 if (*flash++ != 0xffffffff) {
1138 erased = 0;
1139 break;
1140 }
1141 }
1142 return erased;
1143 }
1144
1145 /*-----------------------------------------------------------------------
1146 */
1147 void flash_print_info (flash_info_t * info)
1148 {
1149 int i;
1150
1151 if (info->flash_id != FLASH_MAN_CFI) {
1152 puts ("missing or unknown FLASH type\n");
1153 return;
1154 }
1155
1156 printf ("%s FLASH (%d x %d)",
1157 info->name,
1158 (info->portwidth << 3), (info->chipwidth << 3));
1159 if (info->size < 1024*1024)
1160 printf (" Size: %ld kB in %d Sectors\n",
1161 info->size >> 10, info->sector_count);
1162 else
1163 printf (" Size: %ld MB in %d Sectors\n",
1164 info->size >> 20, info->sector_count);
1165 printf (" ");
1166 switch (info->vendor) {
1167 case CFI_CMDSET_INTEL_STANDARD:
1168 printf ("Intel Standard");
1169 break;
1170 case CFI_CMDSET_INTEL_EXTENDED:
1171 printf ("Intel Extended");
1172 break;
1173 case CFI_CMDSET_AMD_STANDARD:
1174 printf ("AMD Standard");
1175 break;
1176 case CFI_CMDSET_AMD_EXTENDED:
1177 printf ("AMD Extended");
1178 break;
1179 case CFI_CMDSET_SST_NEW:
1180 printf ("SST New");
1181 break;
1182 #ifdef CONFIG_FLASH_CFI_LEGACY
1183 case CFI_CMDSET_AMD_LEGACY:
1184 printf ("AMD Legacy");
1185 break;
1186 #endif
1187 default:
1188 printf ("Unknown (%d)", info->vendor);
1189 break;
1190 }
1191 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1192 info->manufacturer_id, info->device_id);
1193 if (info->device_id == 0x7E) {
1194 printf("%04X", info->device_id2);
1195 }
1196 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1197 info->erase_blk_tout,
1198 info->write_tout);
1199 if (info->buffer_size > 1) {
1200 printf (" Buffer write timeout: %ld ms, "
1201 "buffer size: %d bytes\n",
1202 info->buffer_write_tout,
1203 info->buffer_size);
1204 }
1205
1206 if (info->sector_count <= 64) {
1207 puts ("\n Sector Start Addresses:");
1208 for (i = 0; i < info->sector_count; ++i) {
1209 if ((i % 5) == 0)
1210 printf ("\n");
1211 #ifdef CFG_FLASH_EMPTY_INFO
1212 is_erased(
1213 /* print empty and read-only info */
1214 printf (" %08lX %c %s ",
1215 info->start[i],
1216 _flash_is_sector_erased(info, i) ? 'E' : ' ',
1217 info->protect[i] ? "RO" : " ");
1218 #else /* ! CFG_FLASH_EMPTY_INFO */
1219 printf (" %08lX %s ",
1220 info->start[i],
1221 info->protect[i] ? "RO" : " ");
1222 #endif
1223 }
1224 putc ('\n');
1225 } else {
1226 puts ("\n Sector Start Addresses:\n");
1227 for (i = 0; i < info->sector_count; ++i) {
1228 if ((i % 16) == 0)
1229 printf (" %08x: ", info->start[i]);
1230 printf ("%s",
1231 _flash_is_sector_erased(info, i) ?
1232 info->protect[i] ? "E" : "e" :
1233 info->protect[i] ? "*" : "." );
1234 if ((i % 32) == 31)
1235 putc ('\n');
1236 }
1237 putc ('\n');
1238 }
1239 return;
1240 }
1241
1242 /*-----------------------------------------------------------------------
1243 * This is used in a few places in write_buf() to show programming
1244 * progress. Making it a function is nasty because it needs to do side
1245 * effect updates to digit and dots. Repeated code is nasty too, so
1246 * we define it once here.
1247 */
1248 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1249 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1250 dots -= dots_sub; \
1251 if ((scale > 0) && (dots <= 0)) { \
1252 if ((digit % 5) == 0) \
1253 printf ("%d", digit / 5); \
1254 else \
1255 putc ('.'); \
1256 digit--; \
1257 dots += scale; \
1258 }
1259 #else
1260 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1261 #endif
1262
1263 /*-----------------------------------------------------------------------
1264 * Copy memory to flash, returns:
1265 * 0 - OK
1266 * 1 - write timeout
1267 * 2 - Flash not erased
1268 */
1269 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1270 {
1271 ulong wp;
1272 uchar *p;
1273 int aln;
1274 cfiword_t cword;
1275 int i, rc;
1276 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1277 int buffered_size;
1278 #endif
1279 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1280 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1281 int scale = 0;
1282 int dots = 0;
1283
1284 /*
1285 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1286 */
1287 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1288 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1289 CONFIG_FLASH_SHOW_PROGRESS);
1290 }
1291 #endif
1292
1293 /* get lower aligned address */
1294 wp = (addr & ~(info->portwidth - 1));
1295
1296 /* handle unaligned start */
1297 if ((aln = addr - wp) != 0) {
1298 cword.l = 0;
1299 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1300 for (i = 0; i < aln; ++i)
1301 flash_add_byte (info, &cword, flash_read8(p + i));
1302
1303 for (; (i < info->portwidth) && (cnt > 0); i++) {
1304 flash_add_byte (info, &cword, *src++);
1305 cnt--;
1306 }
1307 for (; (cnt == 0) && (i < info->portwidth); ++i)
1308 flash_add_byte (info, &cword, flash_read8(p + i));
1309
1310 rc = flash_write_cfiword (info, wp, cword);
1311 unmap_physmem(p, info->portwidth);
1312 if (rc != 0)
1313 return rc;
1314
1315 wp += i;
1316 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1317 }
1318
1319 /* handle the aligned part */
1320 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1321 buffered_size = (info->portwidth / info->chipwidth);
1322 buffered_size *= info->buffer_size;
1323 while (cnt >= info->portwidth) {
1324 /* prohibit buffer write when buffer_size is 1 */
1325 if (info->buffer_size == 1) {
1326 cword.l = 0;
1327 for (i = 0; i < info->portwidth; i++)
1328 flash_add_byte (info, &cword, *src++);
1329 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1330 return rc;
1331 wp += info->portwidth;
1332 cnt -= info->portwidth;
1333 continue;
1334 }
1335
1336 /* write buffer until next buffered_size aligned boundary */
1337 i = buffered_size - (wp % buffered_size);
1338 if (i > cnt)
1339 i = cnt;
1340 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1341 return rc;
1342 i -= i & (info->portwidth - 1);
1343 wp += i;
1344 src += i;
1345 cnt -= i;
1346 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1347 }
1348 #else
1349 while (cnt >= info->portwidth) {
1350 cword.l = 0;
1351 for (i = 0; i < info->portwidth; i++) {
1352 flash_add_byte (info, &cword, *src++);
1353 }
1354 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1355 return rc;
1356 wp += info->portwidth;
1357 cnt -= info->portwidth;
1358 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1359 }
1360 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1361
1362 if (cnt == 0) {
1363 return (0);
1364 }
1365
1366 /*
1367 * handle unaligned tail bytes
1368 */
1369 cword.l = 0;
1370 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1371 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1372 flash_add_byte (info, &cword, *src++);
1373 --cnt;
1374 }
1375 for (; i < info->portwidth; ++i)
1376 flash_add_byte (info, &cword, flash_read8(p + i));
1377 unmap_physmem(p, info->portwidth);
1378
1379 return flash_write_cfiword (info, wp, cword);
1380 }
1381
1382 /*-----------------------------------------------------------------------
1383 */
1384 #ifdef CFG_FLASH_PROTECTION
1385
1386 int flash_real_protect (flash_info_t * info, long sector, int prot)
1387 {
1388 int retcode = 0;
1389
1390 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1391 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1392 if (prot)
1393 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1394 else
1395 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1396
1397 if ((retcode =
1398 flash_full_status_check (info, sector, info->erase_blk_tout,
1399 prot ? "protect" : "unprotect")) == 0) {
1400
1401 info->protect[sector] = prot;
1402
1403 /*
1404 * On some of Intel's flash chips (marked via legacy_unlock)
1405 * unprotect unprotects all locking.
1406 */
1407 if ((prot == 0) && (info->legacy_unlock)) {
1408 flash_sect_t i;
1409
1410 for (i = 0; i < info->sector_count; i++) {
1411 if (info->protect[i])
1412 flash_real_protect (info, i, 1);
1413 }
1414 }
1415 }
1416 return retcode;
1417 }
1418
1419 /*-----------------------------------------------------------------------
1420 * flash_read_user_serial - read the OneTimeProgramming cells
1421 */
1422 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1423 int len)
1424 {
1425 uchar *src;
1426 uchar *dst;
1427
1428 dst = buffer;
1429 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1430 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1431 memcpy (dst, src + offset, len);
1432 flash_write_cmd (info, 0, 0, info->cmd_reset);
1433 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1434 }
1435
1436 /*
1437 * flash_read_factory_serial - read the device Id from the protection area
1438 */
1439 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1440 int len)
1441 {
1442 uchar *src;
1443
1444 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1445 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1446 memcpy (buffer, src + offset, len);
1447 flash_write_cmd (info, 0, 0, info->cmd_reset);
1448 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1449 }
1450
1451 #endif /* CFG_FLASH_PROTECTION */
1452
1453 /*-----------------------------------------------------------------------
1454 * Reverse the order of the erase regions in the CFI QRY structure.
1455 * This is needed for chips that are either a) correctly detected as
1456 * top-boot, or b) buggy.
1457 */
1458 static void cfi_reverse_geometry(struct cfi_qry *qry)
1459 {
1460 unsigned int i, j;
1461 u32 tmp;
1462
1463 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1464 tmp = qry->erase_region_info[i];
1465 qry->erase_region_info[i] = qry->erase_region_info[j];
1466 qry->erase_region_info[j] = tmp;
1467 }
1468 }
1469
1470 /*-----------------------------------------------------------------------
1471 * read jedec ids from device and set corresponding fields in info struct
1472 *
1473 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1474 *
1475 */
1476 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1477 {
1478 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1479 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1480 udelay(1000); /* some flash are slow to respond */
1481 info->manufacturer_id = flash_read_uchar (info,
1482 FLASH_OFFSET_MANUFACTURER_ID);
1483 info->device_id = flash_read_uchar (info,
1484 FLASH_OFFSET_DEVICE_ID);
1485 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1486 }
1487
1488 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1489 {
1490 info->cmd_reset = FLASH_CMD_RESET;
1491
1492 cmdset_intel_read_jedec_ids(info);
1493 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1494
1495 #ifdef CFG_FLASH_PROTECTION
1496 /* read legacy lock/unlock bit from intel flash */
1497 if (info->ext_addr) {
1498 info->legacy_unlock = flash_read_uchar (info,
1499 info->ext_addr + 5) & 0x08;
1500 }
1501 #endif
1502
1503 return 0;
1504 }
1505
1506 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1507 {
1508 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1509 flash_unlock_seq(info, 0);
1510 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1511 udelay(1000); /* some flash are slow to respond */
1512
1513 info->manufacturer_id = flash_read_uchar (info,
1514 FLASH_OFFSET_MANUFACTURER_ID);
1515
1516 switch (info->chipwidth){
1517 case FLASH_CFI_8BIT:
1518 info->device_id = flash_read_uchar (info,
1519 FLASH_OFFSET_DEVICE_ID);
1520 if (info->device_id == 0x7E) {
1521 /* AMD 3-byte (expanded) device ids */
1522 info->device_id2 = flash_read_uchar (info,
1523 FLASH_OFFSET_DEVICE_ID2);
1524 info->device_id2 <<= 8;
1525 info->device_id2 |= flash_read_uchar (info,
1526 FLASH_OFFSET_DEVICE_ID3);
1527 }
1528 break;
1529 case FLASH_CFI_16BIT:
1530 info->device_id = flash_read_word (info,
1531 FLASH_OFFSET_DEVICE_ID);
1532 break;
1533 default:
1534 break;
1535 }
1536 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1537 }
1538
1539 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1540 {
1541 info->cmd_reset = AMD_CMD_RESET;
1542
1543 cmdset_amd_read_jedec_ids(info);
1544 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1545
1546 return 0;
1547 }
1548
1549 #ifdef CONFIG_FLASH_CFI_LEGACY
1550 static void flash_read_jedec_ids (flash_info_t * info)
1551 {
1552 info->manufacturer_id = 0;
1553 info->device_id = 0;
1554 info->device_id2 = 0;
1555
1556 switch (info->vendor) {
1557 case CFI_CMDSET_INTEL_STANDARD:
1558 case CFI_CMDSET_INTEL_EXTENDED:
1559 cmdset_intel_read_jedec_ids(info);
1560 break;
1561 case CFI_CMDSET_AMD_STANDARD:
1562 case CFI_CMDSET_AMD_EXTENDED:
1563 case CFI_CMDSET_SST_NEW:
1564 cmdset_amd_read_jedec_ids(info);
1565 break;
1566 default:
1567 break;
1568 }
1569 }
1570
1571 /*-----------------------------------------------------------------------
1572 * Call board code to request info about non-CFI flash.
1573 * board_flash_get_legacy needs to fill in at least:
1574 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1575 */
1576 static int flash_detect_legacy(ulong base, int banknum)
1577 {
1578 flash_info_t *info = &flash_info[banknum];
1579
1580 if (board_flash_get_legacy(base, banknum, info)) {
1581 /* board code may have filled info completely. If not, we
1582 use JEDEC ID probing. */
1583 if (!info->vendor) {
1584 int modes[] = {
1585 CFI_CMDSET_AMD_STANDARD,
1586 CFI_CMDSET_INTEL_STANDARD
1587 };
1588 int i;
1589
1590 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1591 info->vendor = modes[i];
1592 info->start[0] = base;
1593 if (info->portwidth == FLASH_CFI_8BIT
1594 && info->interface == FLASH_CFI_X8X16) {
1595 info->addr_unlock1 = 0x2AAA;
1596 info->addr_unlock2 = 0x5555;
1597 } else {
1598 info->addr_unlock1 = 0x5555;
1599 info->addr_unlock2 = 0x2AAA;
1600 }
1601 flash_read_jedec_ids(info);
1602 debug("JEDEC PROBE: ID %x %x %x\n",
1603 info->manufacturer_id,
1604 info->device_id,
1605 info->device_id2);
1606 if (jedec_flash_match(info, base))
1607 break;
1608 }
1609 }
1610
1611 switch(info->vendor) {
1612 case CFI_CMDSET_INTEL_STANDARD:
1613 case CFI_CMDSET_INTEL_EXTENDED:
1614 info->cmd_reset = FLASH_CMD_RESET;
1615 break;
1616 case CFI_CMDSET_AMD_STANDARD:
1617 case CFI_CMDSET_AMD_EXTENDED:
1618 case CFI_CMDSET_SST_NEW:
1619 case CFI_CMDSET_AMD_LEGACY:
1620 info->cmd_reset = AMD_CMD_RESET;
1621 break;
1622 }
1623 info->flash_id = FLASH_MAN_CFI;
1624 return 1;
1625 }
1626 return 0; /* use CFI */
1627 }
1628 #else
1629 static inline int flash_detect_legacy(ulong base, int banknum)
1630 {
1631 return 0; /* use CFI */
1632 }
1633 #endif
1634
1635 /*-----------------------------------------------------------------------
1636 * detect if flash is compatible with the Common Flash Interface (CFI)
1637 * http://www.jedec.org/download/search/jesd68.pdf
1638 */
1639 static void flash_read_cfi (flash_info_t *info, void *buf,
1640 unsigned int start, size_t len)
1641 {
1642 u8 *p = buf;
1643 unsigned int i;
1644
1645 for (i = 0; i < len; i++)
1646 p[i] = flash_read_uchar(info, start + i);
1647 }
1648
1649 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1650 {
1651 int cfi_offset;
1652
1653 for (cfi_offset=0;
1654 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1655 cfi_offset++) {
1656 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1657 FLASH_CMD_CFI);
1658 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1659 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1660 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1661 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1662 sizeof(struct cfi_qry));
1663 info->interface = le16_to_cpu(qry->interface_desc);
1664
1665 info->cfi_offset = flash_offset_cfi[cfi_offset];
1666 debug ("device interface is %d\n",
1667 info->interface);
1668 debug ("found port %d chip %d ",
1669 info->portwidth, info->chipwidth);
1670 debug ("port %d bits chip %d bits\n",
1671 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1672 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1673
1674 /* calculate command offsets as in the Linux driver */
1675 info->addr_unlock1 = 0x555;
1676 info->addr_unlock2 = 0x2aa;
1677
1678 /*
1679 * modify the unlock address if we are
1680 * in compatibility mode
1681 */
1682 if ( /* x8/x16 in x8 mode */
1683 ((info->chipwidth == FLASH_CFI_BY8) &&
1684 (info->interface == FLASH_CFI_X8X16)) ||
1685 /* x16/x32 in x16 mode */
1686 ((info->chipwidth == FLASH_CFI_BY16) &&
1687 (info->interface == FLASH_CFI_X16X32)))
1688 {
1689 info->addr_unlock1 = 0xaaa;
1690 info->addr_unlock2 = 0x555;
1691 }
1692 if (/* info->vendor */ le16_to_cpu(qry->p_id) == CFI_CMDSET_SST_NEW) {
1693 info->addr_unlock1 = 0x5555;
1694 info->addr_unlock2 = 0x2aaa;
1695 }
1696
1697 info->name = "CFI conformant";
1698 return 1;
1699 }
1700 }
1701
1702 return 0;
1703 }
1704
1705 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1706 {
1707 debug ("flash detect cfi\n");
1708
1709 #ifdef CONFIG_MINI2440
1710 /*
1711 * This bypasses the non-working probe, force the 16x16 mode, and also
1712 * forces the startup init sequence for CFI recognition.
1713 * Michel Pollet <buserror@gmail.com>
1714 */
1715 info->portwidth = CFG_FLASH_CFI_WIDTH;
1716 info->chipwidth = info->portwidth;
1717
1718 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1719 flash_write_cmd (info, 0, 0x5555, 0xaa);
1720 flash_write_cmd (info, 0, 0x2aaa, 0x55);
1721
1722 if (__flash_detect_cfi(info, qry))
1723 return 1;
1724 #endif
1725
1726 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1727 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1728 for (info->chipwidth = FLASH_CFI_BY8;
1729 info->chipwidth <= info->portwidth;
1730 info->chipwidth <<= 1) {
1731 /* We do not yet know what kind of commandset to use, so we issue
1732 the reset command in both Intel and AMD variants, in the hope
1733 that AMD flash roms ignore the Intel command. */
1734 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1735 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1736
1737 if (__flash_detect_cfi(info, qry))
1738 return 1;
1739 }
1740 }
1741 debug ("not found\n");
1742 return 0;
1743 }
1744
1745 /*
1746 * Manufacturer-specific quirks. Add workarounds for geometry
1747 * reversal, etc. here.
1748 */
1749 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1750 {
1751 /* check if flash geometry needs reversal */
1752 if (qry->num_erase_regions > 1) {
1753 /* reverse geometry if top boot part */
1754 if (info->cfi_version < 0x3131) {
1755 /* CFI < 1.1, try to guess from device id */
1756 if ((info->device_id & 0x80) != 0)
1757 cfi_reverse_geometry(qry);
1758 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1759 /* CFI >= 1.1, deduct from top/bottom flag */
1760 /* note: ext_addr is valid since cfi_version > 0 */
1761 cfi_reverse_geometry(qry);
1762 }
1763 }
1764 }
1765
1766 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1767 {
1768 int reverse_geometry = 0;
1769
1770 /* Check the "top boot" bit in the PRI */
1771 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1772 reverse_geometry = 1;
1773
1774 /* AT49BV6416(T) list the erase regions in the wrong order.
1775 * However, the device ID is identical with the non-broken
1776 * AT49BV642D since u-boot only reads the low byte (they
1777 * differ in the high byte.) So leave out this fixup for now.
1778 */
1779 #if 0
1780 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1781 reverse_geometry = !reverse_geometry;
1782 #endif
1783
1784 if (reverse_geometry)
1785 cfi_reverse_geometry(qry);
1786 }
1787
1788 /*
1789 * The following code cannot be run from FLASH!
1790 *
1791 */
1792 ulong flash_get_size (ulong base, int banknum)
1793 {
1794 flash_info_t *info = &flash_info[banknum];
1795 int i, j;
1796 flash_sect_t sect_cnt;
1797 unsigned long sector;
1798 unsigned long tmp;
1799 int size_ratio;
1800 uchar num_erase_regions;
1801 int erase_region_size;
1802 int erase_region_count;
1803 struct cfi_qry qry;
1804
1805 info->ext_addr = 0;
1806 info->cfi_version = 0;
1807 #ifdef CFG_FLASH_PROTECTION
1808 info->legacy_unlock = 0;
1809 #endif
1810
1811 info->start[0] = base;
1812
1813 if (flash_detect_cfi (info, &qry)) {
1814 info->vendor = le16_to_cpu(qry.p_id);
1815 info->ext_addr = le16_to_cpu(qry.p_adr);
1816 num_erase_regions = qry.num_erase_regions;
1817
1818 if (info->ext_addr) {
1819 info->cfi_version = (ushort) flash_read_uchar (info,
1820 info->ext_addr + 3) << 8;
1821 info->cfi_version |= (ushort) flash_read_uchar (info,
1822 info->ext_addr + 4);
1823 }
1824
1825 #ifdef DEBUG
1826 flash_printqry (&qry);
1827 #endif
1828
1829 switch (info->vendor) {
1830 case CFI_CMDSET_INTEL_STANDARD:
1831 case CFI_CMDSET_INTEL_EXTENDED:
1832 cmdset_intel_init(info, &qry);
1833 break;
1834 case CFI_CMDSET_AMD_STANDARD:
1835 case CFI_CMDSET_AMD_EXTENDED:
1836 case CFI_CMDSET_SST_NEW:
1837 cmdset_amd_init(info, &qry);
1838 break;
1839 default:
1840 printf("CFI: Unknown command set 0x%x\n",
1841 info->vendor);
1842 /*
1843 * Unfortunately, this means we don't know how
1844 * to get the chip back to Read mode. Might
1845 * as well try an Intel-style reset...
1846 */
1847 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1848 return 0;
1849 }
1850
1851 /* Do manufacturer-specific fixups */
1852 switch (info->manufacturer_id) {
1853 case 0x0001:
1854 flash_fixup_amd(info, &qry);
1855 break;
1856 case 0x001f:
1857 flash_fixup_atmel(info, &qry);
1858 break;
1859 }
1860
1861 debug ("manufacturer is %d\n", info->vendor);
1862 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1863 debug ("device id is 0x%x\n", info->device_id);
1864 debug ("device id2 is 0x%x\n", info->device_id2);
1865 debug ("cfi version is 0x%04x\n", info->cfi_version);
1866
1867 size_ratio = info->portwidth / info->chipwidth;
1868 /* if the chip is x8/x16 reduce the ratio by half */
1869 if ((info->interface == FLASH_CFI_X8X16)
1870 && (info->chipwidth == FLASH_CFI_BY8)) {
1871 size_ratio >>= 1;
1872 }
1873 debug ("size_ratio %d port %d bits chip %d bits\n",
1874 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1875 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1876 debug ("found %d erase regions\n", num_erase_regions);
1877 sect_cnt = 0;
1878 sector = base;
1879 for (i = 0; i < num_erase_regions; i++) {
1880 if (i > NUM_ERASE_REGIONS) {
1881 printf ("%d erase regions found, only %d used\n",
1882 num_erase_regions, NUM_ERASE_REGIONS);
1883 break;
1884 }
1885
1886 tmp = le32_to_cpu(qry.erase_region_info[i]);
1887 debug("erase region %u: 0x%08lx\n", i, tmp);
1888
1889 erase_region_count = (tmp & 0xffff) + 1;
1890 tmp >>= 16;
1891 erase_region_size =
1892 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1893 debug ("erase_region_count = %d erase_region_size = %d\n",
1894 erase_region_count, erase_region_size);
1895 for (j = 0; j < erase_region_count; j++) {
1896 if (sect_cnt >= CFG_MAX_FLASH_SECT) {
1897 #ifndef CONFIG_MINI2440
1898 printf("ERROR: too many flash sectors %d/%d max\n", sect_cnt, CFG_MAX_FLASH_SECT);
1899 #endif
1900 break;
1901 }
1902 info->start[sect_cnt] = sector;
1903 sector += (erase_region_size * size_ratio);
1904
1905 /*
1906 * Only read protection status from
1907 * supported devices (intel...)
1908 */
1909 switch (info->vendor) {
1910 case CFI_CMDSET_INTEL_EXTENDED:
1911 case CFI_CMDSET_INTEL_STANDARD:
1912 info->protect[sect_cnt] =
1913 flash_isset (info, sect_cnt,
1914 FLASH_OFFSET_PROTECT,
1915 FLASH_STATUS_PROTECT);
1916 break;
1917 default:
1918 /* default: not protected */
1919 info->protect[sect_cnt] = 0;
1920 }
1921
1922 sect_cnt++;
1923 }
1924 }
1925
1926 info->sector_count = sect_cnt;
1927 info->size = 1 << qry.dev_size;
1928 /* multiply the size by the number of chips */
1929 info->size *= size_ratio;
1930 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1931 tmp = 1 << qry.block_erase_timeout_typ;
1932 info->erase_blk_tout = tmp *
1933 (1 << qry.block_erase_timeout_max);
1934 tmp = (1 << qry.buf_write_timeout_typ) *
1935 (1 << qry.buf_write_timeout_max);
1936
1937 /* round up when converting to ms */
1938 info->buffer_write_tout = (tmp + 999) / 1000;
1939 tmp = (1 << qry.word_write_timeout_typ) *
1940 (1 << qry.word_write_timeout_max);
1941 /* round up when converting to ms */
1942 info->write_tout = (tmp + 999) / 1000;
1943 info->flash_id = FLASH_MAN_CFI;
1944 if ((info->interface == FLASH_CFI_X8X16) &&
1945 (info->chipwidth == FLASH_CFI_BY8)) {
1946 /* XXX - Need to test on x8/x16 in parallel. */
1947 info->portwidth >>= 1;
1948 }
1949 }
1950
1951 flash_write_cmd (info, 0, 0, info->cmd_reset);
1952 return (info->size);
1953 }
1954
1955 /*-----------------------------------------------------------------------
1956 */
1957 unsigned long flash_init (void)
1958 {
1959 unsigned long size = 0;
1960 int i;
1961
1962 #ifdef CFG_FLASH_PROTECTION
1963 char *s = getenv("unlock");
1964 #endif
1965
1966 /* Init: no FLASHes known */
1967 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
1968 flash_info[i].flash_id = FLASH_UNKNOWN;
1969
1970 if (!flash_detect_legacy (bank_base[i], i))
1971 flash_get_size (bank_base[i], i);
1972 size += flash_info[i].size;
1973 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
1974 #ifndef CFG_FLASH_QUIET_TEST
1975 #ifdef CONFIG_MINI2440
1976 printf ("NOR Flash not found. Use hardware switch and 'flinit'\n");
1977 #else
1978 printf ("## Unknown FLASH on Bank %d "
1979 "- Size = 0x%08lx = %ld MB\n",
1980 i+1, flash_info[i].size,
1981 flash_info[i].size << 20);
1982 #endif
1983 #endif /* CFG_FLASH_QUIET_TEST */
1984 }
1985 #ifdef CFG_FLASH_PROTECTION
1986 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
1987 /*
1988 * Only the U-Boot image and it's environment
1989 * is protected, all other sectors are
1990 * unprotected (unlocked) if flash hardware
1991 * protection is used (CFG_FLASH_PROTECTION)
1992 * and the environment variable "unlock" is
1993 * set to "yes".
1994 */
1995 if (flash_info[i].legacy_unlock) {
1996 int k;
1997
1998 /*
1999 * Disable legacy_unlock temporarily,
2000 * since flash_real_protect would
2001 * relock all other sectors again
2002 * otherwise.
2003 */
2004 flash_info[i].legacy_unlock = 0;
2005
2006 /*
2007 * Legacy unlocking (e.g. Intel J3) ->
2008 * unlock only one sector. This will
2009 * unlock all sectors.
2010 */
2011 flash_real_protect (&flash_info[i], 0, 0);
2012
2013 flash_info[i].legacy_unlock = 1;
2014
2015 /*
2016 * Manually mark other sectors as
2017 * unlocked (unprotected)
2018 */
2019 for (k = 1; k < flash_info[i].sector_count; k++)
2020 flash_info[i].protect[k] = 0;
2021 } else {
2022 /*
2023 * No legancy unlocking -> unlock all sectors
2024 */
2025 flash_protect (FLAG_PROTECT_CLEAR,
2026 flash_info[i].start[0],
2027 flash_info[i].start[0]
2028 + flash_info[i].size - 1,
2029 &flash_info[i]);
2030 }
2031 }
2032 #endif /* CFG_FLASH_PROTECTION */
2033 }
2034
2035 /* Monitor protection ON by default */
2036 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
2037 flash_protect (FLAG_PROTECT_SET,
2038 CFG_MONITOR_BASE,
2039 CFG_MONITOR_BASE + monitor_flash_len - 1,
2040 flash_get_info(CFG_MONITOR_BASE));
2041 #endif
2042
2043 /* Environment protection ON by default */
2044 #ifdef CFG_ENV_IS_IN_FLASH
2045 flash_protect (FLAG_PROTECT_SET,
2046 CFG_ENV_ADDR,
2047 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
2048 flash_get_info(CFG_ENV_ADDR));
2049 #endif
2050
2051 /* Redundant environment protection ON by default */
2052 #ifdef CFG_ENV_ADDR_REDUND
2053 flash_protect (FLAG_PROTECT_SET,
2054 CFG_ENV_ADDR_REDUND,
2055 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
2056 flash_get_info(CFG_ENV_ADDR_REDUND));
2057 #endif
2058 return (size);
2059 }
2060
2061 #endif /* CFG_FLASH_CFI */
Fork of the u-boot for for Samsung based MINI2440 board