2 * x86-64 code generator for TCC
4 * Copyright (c) 2008 Shinichiro Hamaji
6 * Based on i386-gen.c by Fabrice Bellard
8 * This library is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU Lesser General Public
10 * License as published by the Free Software Foundation; either
11 * version 2 of the License, or (at your option) any later version.
13 * This library is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * Lesser General Public License for more details.
18 * You should have received a copy of the GNU Lesser General Public
19 * License along with this library; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifdef TARGET_DEFS_ONLY
25 /* number of available registers */
29 /* a register can belong to several classes. The classes must be
30 sorted from more general to more precise (see gv2() code which does
31 assumptions on it). */
32 #define RC_INT 0x0001 /* generic integer register */
33 #define RC_FLOAT 0x0002 /* generic float register */
37 #define RC_ST0 0x0080 /* only for long double */
42 #define RC_XMM0 0x1000
43 #define RC_XMM1 0x2000
44 #define RC_XMM2 0x4000
45 #define RC_XMM3 0x8000
46 #define RC_XMM4 0x10000
47 #define RC_XMM5 0x20000
48 #define RC_XMM6 0x40000
49 #define RC_XMM7 0x80000
50 #define RC_IRET RC_RAX /* function return: integer register */
51 #define RC_LRET RC_RDX /* function return: second integer register */
52 #define RC_FRET RC_XMM0 /* function return: float register */
53 #define RC_QRET RC_XMM1 /* function return: second float register */
55 /* pretty names for the registers */
83 #define REX_BASE(reg) (((reg) >> 3) & 1)
84 #define REG_VALUE(reg) ((reg) & 7)
86 /* return registers for function */
87 #define REG_IRET TREG_RAX /* single word int return register */
88 #define REG_LRET TREG_RDX /* second word return register (for long long) */
89 #define REG_FRET TREG_XMM0 /* float return register */
90 #define REG_QRET TREG_XMM1 /* second float return register */
92 /* defined if function parameters must be evaluated in reverse order */
93 #define INVERT_FUNC_PARAMS
95 /* pointer size, in bytes */
98 /* long double size and alignment, in bytes */
99 #define LDOUBLE_SIZE 16
100 #define LDOUBLE_ALIGN 16
101 /* maximum alignment (for aligned attribute support) */
104 /******************************************************/
107 #define EM_TCC_TARGET EM_X86_64
109 /* relocation type for 32 bit data relocation */
110 #define R_DATA_32 R_X86_64_32
111 #define R_DATA_PTR R_X86_64_64
112 #define R_JMP_SLOT R_X86_64_JUMP_SLOT
113 #define R_COPY R_X86_64_COPY
115 #define ELF_START_ADDR 0x08048000
116 #define ELF_PAGE_SIZE 0x1000
118 /******************************************************/
119 #else /* ! TARGET_DEFS_ONLY */
120 /******************************************************/
124 ST_DATA
const int reg_classes
[NB_REGS
] = {
125 /* eax */ RC_INT
| RC_RAX
,
126 /* ecx */ RC_INT
| RC_RCX
,
127 /* edx */ RC_INT
| RC_RDX
,
141 /* xmm0 */ RC_FLOAT
| RC_XMM0
,
142 /* xmm1 */ RC_FLOAT
| RC_XMM1
,
143 /* xmm2 */ RC_FLOAT
| RC_XMM2
,
144 /* xmm3 */ RC_FLOAT
| RC_XMM3
,
145 /* xmm4 */ RC_FLOAT
| RC_XMM4
,
146 /* xmm5 */ RC_FLOAT
| RC_XMM5
,
147 /* xmm6 an xmm7 are included so gv() can be used on them,
148 but they are not tagged with RC_FLOAT because they are
149 callee saved on Windows */
155 static unsigned long func_sub_sp_offset
;
156 static int func_ret_sub
;
158 /* XXX: make it faster ? */
163 if (ind1
> cur_text_section
->data_allocated
)
164 section_realloc(cur_text_section
, ind1
);
165 cur_text_section
->data
[ind
] = c
;
169 void o(unsigned int c
)
191 void gen_le64(int64_t c
)
203 void orex(int ll
, int r
, int r2
, int b
)
205 if ((r
& VT_VALMASK
) >= VT_CONST
)
207 if ((r2
& VT_VALMASK
) >= VT_CONST
)
209 if (ll
|| REX_BASE(r
) || REX_BASE(r2
))
210 o(0x40 | REX_BASE(r
) | (REX_BASE(r2
) << 2) | (ll
<< 3));
214 /* output a symbol and patch all calls to it */
215 void gsym_addr(int t
, int a
)
219 ptr
= (int *)(cur_text_section
->data
+ t
);
220 n
= *ptr
; /* next value */
231 /* psym is used to put an instruction with a data field which is a
232 reference to a symbol. It is in fact the same as oad ! */
235 static int is64_type(int t
)
237 return ((t
& VT_BTYPE
) == VT_PTR
||
238 (t
& VT_BTYPE
) == VT_FUNC
||
239 (t
& VT_BTYPE
) == VT_LLONG
);
242 /* instruction + 4 bytes data. Return the address of the data */
243 ST_FUNC
int oad(int c
, int s
)
249 if (ind1
> cur_text_section
->data_allocated
)
250 section_realloc(cur_text_section
, ind1
);
251 *(int *)(cur_text_section
->data
+ ind
) = s
;
257 ST_FUNC
void gen_addr32(int r
, Sym
*sym
, int c
)
260 greloc(cur_text_section
, sym
, ind
, R_X86_64_32
);
264 /* output constant with relocation if 'r & VT_SYM' is true */
265 ST_FUNC
void gen_addr64(int r
, Sym
*sym
, int64_t c
)
268 greloc(cur_text_section
, sym
, ind
, R_X86_64_64
);
272 /* output constant with relocation if 'r & VT_SYM' is true */
273 ST_FUNC
void gen_addrpc32(int r
, Sym
*sym
, int c
)
276 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
280 /* output got address with relocation */
281 static void gen_gotpcrel(int r
, Sym
*sym
, int c
)
283 #ifndef TCC_TARGET_PE
286 greloc(cur_text_section
, sym
, ind
, R_X86_64_GOTPCREL
);
287 sr
= cur_text_section
->reloc
;
288 rel
= (ElfW(Rela
) *)(sr
->data
+ sr
->data_offset
- sizeof(ElfW(Rela
)));
291 printf("picpic: %s %x %x | %02x %02x %02x\n", get_tok_str(sym
->v
, NULL
), c
, r
,
292 cur_text_section
->data
[ind
-3],
293 cur_text_section
->data
[ind
-2],
294 cur_text_section
->data
[ind
-1]
296 greloc(cur_text_section
, sym
, ind
, R_X86_64_PC32
);
300 /* we use add c, %xxx for displacement */
302 o(0xc0 + REG_VALUE(r
));
307 static void gen_modrm_impl(int op_reg
, int r
, Sym
*sym
, int c
, int is_got
)
309 op_reg
= REG_VALUE(op_reg
) << 3;
310 if ((r
& VT_VALMASK
) == VT_CONST
) {
311 /* constant memory reference */
314 gen_gotpcrel(r
, sym
, c
);
316 gen_addrpc32(r
, sym
, c
);
318 } else if ((r
& VT_VALMASK
) == VT_LOCAL
) {
319 /* currently, we use only ebp as base */
321 /* short reference */
325 oad(0x85 | op_reg
, c
);
327 } else if ((r
& VT_VALMASK
) >= TREG_MEM
) {
329 g(0x80 | op_reg
| REG_VALUE(r
));
332 g(0x00 | op_reg
| REG_VALUE(r
));
335 g(0x00 | op_reg
| REG_VALUE(r
));
339 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
341 static void gen_modrm(int op_reg
, int r
, Sym
*sym
, int c
)
343 gen_modrm_impl(op_reg
, r
, sym
, c
, 0);
346 /* generate a modrm reference. 'op_reg' contains the addtionnal 3
348 static void gen_modrm64(int opcode
, int op_reg
, int r
, Sym
*sym
, int c
)
351 is_got
= (op_reg
& TREG_MEM
) && !(sym
->type
.t
& VT_STATIC
);
352 orex(1, r
, op_reg
, opcode
);
353 gen_modrm_impl(op_reg
, r
, sym
, c
, is_got
);
357 /* load 'r' from value 'sv' */
358 void load(int r
, SValue
*sv
)
360 int v
, t
, ft
, fc
, fr
;
365 sv
= pe_getimport(sv
, &v2
);
372 #ifndef TCC_TARGET_PE
373 /* we use indirect access via got */
374 if ((fr
& VT_VALMASK
) == VT_CONST
&& (fr
& VT_SYM
) &&
375 (fr
& VT_LVAL
) && !(sv
->sym
->type
.t
& VT_STATIC
)) {
376 /* use the result register as a temporal register */
377 int tr
= r
| TREG_MEM
;
379 /* we cannot use float registers as a temporal register */
380 tr
= get_reg(RC_INT
) | TREG_MEM
;
382 gen_modrm64(0x8b, tr
, fr
, sv
->sym
, 0);
384 /* load from the temporal register */
392 if (v
== VT_LLOCAL
) {
394 v1
.r
= VT_LOCAL
| VT_LVAL
;
397 if (!(reg_classes
[fr
] & RC_INT
))
398 fr
= get_reg(RC_INT
);
402 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
404 r
= REG_VALUE(r
); /* movd */
405 } else if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
406 b
= 0x7e0ff3; /* movq */
408 } else if ((ft
& VT_BTYPE
) == VT_LDOUBLE
) {
409 b
= 0xdb, r
= 5; /* fldt */
410 } else if ((ft
& VT_TYPE
) == VT_BYTE
|| (ft
& VT_TYPE
) == VT_BOOL
) {
411 b
= 0xbe0f; /* movsbl */
412 } else if ((ft
& VT_TYPE
) == (VT_BYTE
| VT_UNSIGNED
)) {
413 b
= 0xb60f; /* movzbl */
414 } else if ((ft
& VT_TYPE
) == VT_SHORT
) {
415 b
= 0xbf0f; /* movswl */
416 } else if ((ft
& VT_TYPE
) == (VT_SHORT
| VT_UNSIGNED
)) {
417 b
= 0xb70f; /* movzwl */
419 assert(((ft
& VT_BTYPE
) == VT_INT
) || ((ft
& VT_BTYPE
) == VT_LLONG
)
420 || ((ft
& VT_BTYPE
) == VT_PTR
) || ((ft
& VT_BTYPE
) == VT_ENUM
)
421 || ((ft
& VT_BTYPE
) == VT_FUNC
));
426 gen_modrm64(b
, r
, fr
, sv
->sym
, fc
);
429 gen_modrm(r
, fr
, sv
->sym
, fc
);
436 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
437 gen_addrpc32(fr
, sv
->sym
, fc
);
439 if (sv
->sym
->type
.t
& VT_STATIC
) {
441 o(0x05 + REG_VALUE(r
) * 8); /* lea xx(%rip), r */
442 gen_addrpc32(fr
, sv
->sym
, fc
);
445 o(0x05 + REG_VALUE(r
) * 8); /* mov xx(%rip), r */
446 gen_gotpcrel(r
, sv
->sym
, fc
);
449 } else if (is64_type(ft
)) {
450 orex(1,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
453 orex(0,r
,0, 0xb8 + REG_VALUE(r
)); /* mov $xx, r */
456 } else if (v
== VT_LOCAL
) {
457 orex(1,0,r
,0x8d); /* lea xxx(%ebp), r */
458 gen_modrm(r
, VT_LOCAL
, sv
->sym
, fc
);
459 } else if (v
== VT_CMP
) {
461 if ((fc
& ~0x100) != TOK_NE
)
462 oad(0xb8 + REG_VALUE(r
), 0); /* mov $0, r */
464 oad(0xb8 + REG_VALUE(r
), 1); /* mov $1, r */
467 /* This was a float compare. If the parity bit is
468 set the result was unordered, meaning false for everything
469 except TOK_NE, and true for TOK_NE. */
471 o(0x037a + (REX_BASE(r
) << 8));
473 orex(0,r
,0, 0x0f); /* setxx %br */
475 o(0xc0 + REG_VALUE(r
));
476 } else if (v
== VT_JMP
|| v
== VT_JMPI
) {
479 oad(0xb8 + REG_VALUE(r
), t
); /* mov $1, r */
480 o(0x05eb + (REX_BASE(r
) << 8)); /* jmp after */
483 oad(0xb8 + REG_VALUE(r
), t
^ 1); /* mov $0, r */
485 if ((r
>= TREG_XMM0
) && (r
<= TREG_XMM7
)) {
487 /* gen_cvt_ftof(VT_DOUBLE); */
488 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
489 /* movsd -0x10(%rsp),%xmmN */
491 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
494 assert((v
>= TREG_XMM0
) && (v
<= TREG_XMM7
));
495 if ((ft
& VT_BTYPE
) == VT_FLOAT
) {
498 assert((ft
& VT_BTYPE
) == VT_DOUBLE
);
501 o(0xc0 + REG_VALUE(v
) + REG_VALUE(r
)*8);
503 } else if (r
== TREG_ST0
) {
504 assert((v
>= TREG_XMM0
) || (v
<= TREG_XMM7
));
505 /* gen_cvt_ftof(VT_LDOUBLE); */
506 /* movsd %xmmN,-0x10(%rsp) */
508 o(0x44 + REG_VALUE(r
)*8); /* %xmmN */
510 o(0xf02444dd); /* fldl -0x10(%rsp) */
513 o(0xc0 + REG_VALUE(r
) + REG_VALUE(v
) * 8); /* mov v, r */
519 /* store register 'r' in lvalue 'v' */
520 void store(int r
, SValue
*v
)
524 /* store the REX prefix in this variable when PIC is enabled */
529 v
= pe_getimport(v
, &v2
);
534 fr
= v
->r
& VT_VALMASK
;
537 #ifndef TCC_TARGET_PE
538 /* we need to access the variable via got */
539 if (fr
== VT_CONST
&& (v
->r
& VT_SYM
)) {
540 /* mov xx(%rip), %r11 */
542 gen_gotpcrel(TREG_R11
, v
->sym
, v
->c
.ul
);
543 pic
= is64_type(bt
) ? 0x49 : 0x41;
547 /* XXX: incorrect if float reg to reg */
548 if (bt
== VT_FLOAT
) {
551 o(0x7e0f); /* movd */
553 } else if (bt
== VT_DOUBLE
) {
556 o(0xd60f); /* movq */
558 } else if (bt
== VT_LDOUBLE
) {
559 o(0xc0d9); /* fld %st(0) */
567 if (bt
== VT_BYTE
|| bt
== VT_BOOL
)
569 else if (is64_type(bt
))
575 /* xxx r, (%r11) where xxx is mov, movq, fld, or etc */
580 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
581 gen_modrm64(op64
, r
, v
->r
, v
->sym
, fc
);
582 } else if (fr
!= r
) {
583 /* XXX: don't we really come here? */
585 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
588 if (fr
== VT_CONST
|| fr
== VT_LOCAL
|| (v
->r
& VT_LVAL
)) {
589 gen_modrm(r
, v
->r
, v
->sym
, fc
);
590 } else if (fr
!= r
) {
591 /* XXX: don't we really come here? */
593 o(0xc0 + fr
+ r
* 8); /* mov r, fr */
598 /* 'is_jmp' is '1' if it is a jump */
599 static void gcall_or_jmp(int is_jmp
)
602 if ((vtop
->r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
604 if (vtop
->r
& VT_SYM
) {
605 /* relocation case */
606 greloc(cur_text_section
, vtop
->sym
,
607 ind
+ 1, R_X86_64_PC32
);
609 /* put an empty PC32 relocation */
610 put_elf_reloc(symtab_section
, cur_text_section
,
611 ind
+ 1, R_X86_64_PC32
, 0);
613 oad(0xe8 + is_jmp
, vtop
->c
.ul
- 4); /* call/jmp im */
615 /* otherwise, indirect call */
619 o(0xff); /* call/jmp *r */
620 o(0xd0 + REG_VALUE(r
) + (is_jmp
<< 4));
627 static const uint8_t arg_regs
[REGN
] = {
628 TREG_RCX
, TREG_RDX
, TREG_R8
, TREG_R9
631 /* Prepare arguments in R10 and R11 rather than RCX and RDX
632 because gv() will not ever use these */
633 static int arg_prepare_reg(int idx
) {
634 if (idx
== 0 || idx
== 1)
635 /* idx=0: r10, idx=1: r11 */
638 return arg_regs
[idx
];
641 static int func_scratch
;
643 /* Generate function call. The function address is pushed first, then
644 all the parameters in call order. This functions pops all the
645 parameters and the function address. */
647 void gen_offs_sp(int b
, int r
, int d
)
649 orex(1,0,r
& 0x100 ? 0 : r
, b
);
651 o(0x2444 | (REG_VALUE(r
) << 3));
654 o(0x2484 | (REG_VALUE(r
) << 3));
659 /* Return the number of registers needed to return the struct, or 0 if
660 returning via struct pointer. */
661 ST_FUNC
int gfunc_sret(CType
*vt
, CType
*ret
, int *ret_align
)
664 *ret_align
= 1; // Never have to re-align return values for x86-64
665 size
= type_size(vt
, &align
);
669 } else if (size
> 4) {
672 } else if (size
> 2) {
675 } else if (size
> 1) {
684 static int is_sse_float(int t
) {
687 return bt
== VT_DOUBLE
|| bt
== VT_FLOAT
;
690 int gfunc_arg_size(CType
*type
) {
692 if (type
->t
& (VT_ARRAY
|VT_BITFIELD
))
694 return type_size(type
, &align
);
697 void gfunc_call(int nb_args
)
699 int size
, r
, args_size
, i
, d
, bt
, struct_size
;
702 args_size
= (nb_args
< REGN
? REGN
: nb_args
) * PTR_SIZE
;
705 /* for struct arguments, we need to call memcpy and the function
706 call breaks register passing arguments we are preparing.
707 So, we process arguments which will be passed by stack first. */
708 struct_size
= args_size
;
709 for(i
= 0; i
< nb_args
; i
++) {
714 bt
= (sv
->type
.t
& VT_BTYPE
);
715 size
= gfunc_arg_size(&sv
->type
);
718 continue; /* arguments smaller than 8 bytes passed in registers or on stack */
720 if (bt
== VT_STRUCT
) {
721 /* align to stack align size */
722 size
= (size
+ 15) & ~15;
723 /* generate structure store */
725 gen_offs_sp(0x8d, r
, struct_size
);
728 /* generate memcpy call */
729 vset(&sv
->type
, r
| VT_LVAL
, 0);
733 } else if (bt
== VT_LDOUBLE
) {
735 gen_offs_sp(0xdb, 0x107, struct_size
);
740 if (func_scratch
< struct_size
)
741 func_scratch
= struct_size
;
744 struct_size
= args_size
;
746 for(i
= 0; i
< nb_args
; i
++) {
748 bt
= (vtop
->type
.t
& VT_BTYPE
);
750 size
= gfunc_arg_size(&vtop
->type
);
752 /* align to stack align size */
753 size
= (size
+ 15) & ~15;
756 gen_offs_sp(0x8d, d
, struct_size
);
757 gen_offs_sp(0x89, d
, arg
*8);
759 d
= arg_prepare_reg(arg
);
760 gen_offs_sp(0x8d, d
, struct_size
);
764 if (is_sse_float(vtop
->type
.t
)) {
765 gv(RC_XMM0
); /* only use one float register */
767 /* movq %xmm0, j*8(%rsp) */
768 gen_offs_sp(0xd60f66, 0x100, arg
*8);
770 /* movaps %xmm0, %xmmN */
772 o(0xc0 + (arg
<< 3));
773 d
= arg_prepare_reg(arg
);
774 /* mov %xmm0, %rxx */
777 o(0xc0 + REG_VALUE(d
));
780 if (bt
== VT_STRUCT
) {
781 vtop
->type
.ref
= NULL
;
782 vtop
->type
.t
= size
> 4 ? VT_LLONG
: size
> 2 ? VT_INT
783 : size
> 1 ? VT_SHORT
: VT_BYTE
;
788 gen_offs_sp(0x89, r
, arg
*8);
790 d
= arg_prepare_reg(arg
);
791 orex(1,d
,r
,0x89); /* mov */
792 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
800 /* Copy R10 and R11 into RCX and RDX, respectively */
802 o(0xd1894c); /* mov %r10, %rcx */
804 o(0xda894c); /* mov %r11, %rdx */
813 #define FUNC_PROLOG_SIZE 11
815 /* generate function prolog of type 't' */
816 void gfunc_prolog(CType
*func_type
)
818 int addr
, reg_param_index
, bt
, size
;
827 ind
+= FUNC_PROLOG_SIZE
;
828 func_sub_sp_offset
= ind
;
831 sym
= func_type
->ref
;
833 /* if the function returns a structure, then add an
834 implicit pointer parameter */
836 size
= gfunc_arg_size(&func_vt
);
838 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
844 /* define parameters */
845 while ((sym
= sym
->next
) != NULL
) {
847 bt
= type
->t
& VT_BTYPE
;
848 size
= gfunc_arg_size(type
);
850 if (reg_param_index
< REGN
) {
851 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
853 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
| VT_REF
, addr
);
855 if (reg_param_index
< REGN
) {
856 /* save arguments passed by register */
857 if ((bt
== VT_FLOAT
) || (bt
== VT_DOUBLE
)) {
858 o(0xd60f66); /* movq */
859 gen_modrm(reg_param_index
, VT_LOCAL
, NULL
, addr
);
861 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
864 sym_push(sym
->v
& ~SYM_FIELD
, type
, VT_LOCAL
| VT_LVAL
, addr
);
870 while (reg_param_index
< REGN
) {
871 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
872 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, addr
);
879 /* generate function epilog */
880 void gfunc_epilog(void)
885 if (func_ret_sub
== 0) {
890 g(func_ret_sub
>> 8);
894 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
895 /* align local size to word & save local variables */
896 v
= (func_scratch
+ -loc
+ 15) & -16;
899 Sym
*sym
= external_global_sym(TOK___chkstk
, &func_old_type
, 0);
900 oad(0xb8, v
); /* mov stacksize, %eax */
901 oad(0xe8, -4); /* call __chkstk, (does the stackframe too) */
902 greloc(cur_text_section
, sym
, ind
-4, R_X86_64_PC32
);
903 o(0x90); /* fill for FUNC_PROLOG_SIZE = 11 bytes */
905 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
906 o(0xec8148); /* sub rsp, stacksize */
910 cur_text_section
->data_offset
= saved_ind
;
911 pe_add_unwind_data(ind
, saved_ind
, v
);
912 ind
= cur_text_section
->data_offset
;
917 static void gadd_sp(int val
)
919 if (val
== (char)val
) {
923 oad(0xc48148, val
); /* add $xxx, %rsp */
927 typedef enum X86_64_Mode
{
935 static X86_64_Mode
classify_x86_64_merge(X86_64_Mode a
, X86_64_Mode b
) {
938 else if (a
== x86_64_mode_none
)
940 else if (b
== x86_64_mode_none
)
942 else if ((a
== x86_64_mode_memory
) || (b
== x86_64_mode_memory
))
943 return x86_64_mode_memory
;
944 else if ((a
== x86_64_mode_integer
) || (b
== x86_64_mode_integer
))
945 return x86_64_mode_integer
;
946 else if ((a
== x86_64_mode_x87
) || (b
== x86_64_mode_x87
))
947 return x86_64_mode_memory
;
949 return x86_64_mode_sse
;
952 static X86_64_Mode
classify_x86_64_inner(CType
*ty
) {
956 switch (ty
->t
& VT_BTYPE
) {
957 case VT_VOID
: return x86_64_mode_none
;
966 case VT_ENUM
: return x86_64_mode_integer
;
969 case VT_DOUBLE
: return x86_64_mode_sse
;
971 case VT_LDOUBLE
: return x86_64_mode_x87
;
977 if (f
->next
&& (f
->c
== f
->next
->c
))
978 return x86_64_mode_memory
;
980 mode
= x86_64_mode_none
;
981 for (; f
; f
= f
->next
)
982 mode
= classify_x86_64_merge(mode
, classify_x86_64_inner(&f
->type
));
990 static X86_64_Mode
classify_x86_64_arg(CType
*ty
, CType
*ret
, int *psize
, int *palign
, int *reg_count
) {
992 int size
, align
, ret_t
= 0;
994 if (ty
->t
& (VT_BITFIELD
|VT_ARRAY
)) {
999 mode
= x86_64_mode_integer
;
1001 size
= type_size(ty
, &align
);
1002 *psize
= (size
+ 7) & ~7;
1003 *palign
= (align
+ 7) & ~7;
1006 mode
= x86_64_mode_memory
;
1008 mode
= classify_x86_64_inner(ty
);
1010 case x86_64_mode_integer
:
1016 ret_t
= (size
> 4) ? VT_LLONG
: VT_INT
;
1020 case x86_64_mode_x87
:
1025 case x86_64_mode_sse
:
1031 ret_t
= (size
> 4) ? VT_DOUBLE
: VT_FLOAT
;
1034 default: break; /* nothing to be done for x86_64_mode_memory and x86_64_mode_none*/
1047 ST_FUNC
int classify_x86_64_va_arg(CType
*ty
) {
1048 /* This definition must be synced with stdarg.h */
1049 enum __va_arg_type
{
1050 __va_gen_reg
, __va_float_reg
, __va_stack
1052 int size
, align
, reg_count
;
1053 X86_64_Mode mode
= classify_x86_64_arg(ty
, NULL
, &size
, &align
, ®_count
);
1055 default: return __va_stack
;
1056 case x86_64_mode_integer
: return __va_gen_reg
;
1057 case x86_64_mode_sse
: return __va_float_reg
;
1061 /* Return the number of registers needed to return the struct, or 0 if
1062 returning via struct pointer. */
1063 int gfunc_sret(CType
*vt
, CType
*ret
, int *ret_align
) {
1064 int size
, align
, reg_count
;
1065 *ret_align
= 1; // Never have to re-align return values for x86-64
1066 return (classify_x86_64_arg(vt
, ret
, &size
, &align
, ®_count
) != x86_64_mode_memory
);
1070 static const uint8_t arg_regs
[REGN
] = {
1071 TREG_RDI
, TREG_RSI
, TREG_RDX
, TREG_RCX
, TREG_R8
, TREG_R9
1074 static int arg_prepare_reg(int idx
) {
1075 if (idx
== 2 || idx
== 3)
1076 /* idx=2: r10, idx=3: r11 */
1079 return arg_regs
[idx
];
1082 /* Generate function call. The function address is pushed first, then
1083 all the parameters in call order. This functions pops all the
1084 parameters and the function address. */
1085 void gfunc_call(int nb_args
)
1089 int size
, align
, r
, args_size
, stack_adjust
, run_start
, run_end
, i
, reg_count
;
1090 int nb_reg_args
= 0;
1091 int nb_sse_args
= 0;
1092 int sse_reg
, gen_reg
;
1094 /* calculate the number of integer/float register arguments */
1095 for(i
= 0; i
< nb_args
; i
++) {
1096 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1097 if (mode
== x86_64_mode_sse
)
1098 nb_sse_args
+= reg_count
;
1099 else if (mode
== x86_64_mode_integer
)
1100 nb_reg_args
+= reg_count
;
1103 /* arguments are collected in runs. Each run is a collection of 8-byte aligned arguments
1104 and ended by a 16-byte aligned argument. This is because, from the point of view of
1105 the callee, argument alignment is computed from the bottom up. */
1106 /* for struct arguments, we need to call memcpy and the function
1107 call breaks register passing arguments we are preparing.
1108 So, we process arguments which will be passed by stack first. */
1109 gen_reg
= nb_reg_args
;
1110 sse_reg
= nb_sse_args
;
1113 while (run_start
!= nb_args
) {
1114 int run_gen_reg
= gen_reg
, run_sse_reg
= sse_reg
;
1118 for(i
= run_start
; (i
< nb_args
) && (run_end
== nb_args
); i
++) {
1119 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1121 case x86_64_mode_memory
:
1122 case x86_64_mode_x87
:
1127 stack_adjust
+= size
;
1130 case x86_64_mode_sse
:
1131 sse_reg
-= reg_count
;
1132 if (sse_reg
+ reg_count
> 8) goto stack_arg
;
1135 case x86_64_mode_integer
:
1136 gen_reg
-= reg_count
;
1137 if (gen_reg
+ reg_count
> REGN
) goto stack_arg
;
1139 default: break; /* nothing to be done for x86_64_mode_none */
1143 gen_reg
= run_gen_reg
;
1144 sse_reg
= run_sse_reg
;
1146 /* adjust stack to align SSE boundary */
1147 if (stack_adjust
&= 15) {
1148 /* fetch cpu flag before the following sub will change the value */
1149 if (vtop
>= vstack
&& (vtop
->r
& VT_VALMASK
) == VT_CMP
)
1152 stack_adjust
= 16 - stack_adjust
;
1154 oad(0xec81, stack_adjust
); /* sub $xxx, %rsp */
1155 args_size
+= stack_adjust
;
1158 for(i
= run_start
; i
< run_end
;) {
1159 /* Swap argument to top, it will possibly be changed here,
1160 and might use more temps. At the end of the loop we keep
1161 in on the stack and swap it back to its original position
1162 if it is a register. */
1163 SValue tmp
= vtop
[0];
1167 mode
= classify_x86_64_arg(&vtop
->type
, NULL
, &size
, &align
, ®_count
);
1170 switch (vtop
->type
.t
& VT_BTYPE
) {
1172 if (mode
== x86_64_mode_sse
) {
1174 sse_reg
-= reg_count
;
1177 } else if (mode
== x86_64_mode_integer
) {
1179 gen_reg
-= reg_count
;
1185 /* allocate the necessary size on stack */
1187 oad(0xec81, size
); /* sub $xxx, %rsp */
1188 /* generate structure store */
1189 r
= get_reg(RC_INT
);
1190 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1191 o(0xe0 + REG_VALUE(r
));
1192 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1205 assert(mode
== x86_64_mode_sse
);
1209 o(0x50); /* push $rax */
1210 /* movq %xmmN, (%rsp) */
1212 o(0x04 + REG_VALUE(r
)*8);
1221 assert(mode
== x86_64_mode_integer
);
1223 /* XXX: implicit cast ? */
1224 if (gen_reg
> REGN
) {
1227 orex(0,r
,0,0x50 + REG_VALUE(r
)); /* push r */
1235 /* And swap the argument back to it's original position. */
1242 assert((vtop
->type
.t
== tmp
.type
.t
) && (vtop
->r
== tmp
.r
));
1251 /* handle 16 byte aligned arguments at end of run */
1252 run_start
= i
= run_end
;
1253 while (i
< nb_args
) {
1254 /* Rotate argument to top since it will always be popped */
1255 mode
= classify_x86_64_arg(&vtop
[-i
].type
, NULL
, &size
, &align
, ®_count
);
1261 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1263 oad(0xec8148, size
); /* sub $xxx, %rsp */
1264 o(0x7cdb); /* fstpt 0(%rsp) */
1269 assert(mode
== x86_64_mode_memory
);
1271 /* allocate the necessary size on stack */
1273 oad(0xec81, size
); /* sub $xxx, %rsp */
1274 /* generate structure store */
1275 r
= get_reg(RC_INT
);
1276 orex(1, r
, 0, 0x89); /* mov %rsp, r */
1277 o(0xe0 + REG_VALUE(r
));
1278 vset(&vtop
->type
, r
| VT_LVAL
, 0);
1289 /* XXX This should be superfluous. */
1290 save_regs(0); /* save used temporary registers */
1292 /* then, we prepare register passing arguments.
1293 Note that we cannot set RDX and RCX in this loop because gv()
1294 may break these temporary registers. Let's use R10 and R11
1296 assert(gen_reg
<= REGN
);
1297 assert(sse_reg
<= 8);
1298 for(i
= 0; i
< nb_args
; i
++) {
1299 mode
= classify_x86_64_arg(&vtop
->type
, &type
, &size
, &align
, ®_count
);
1300 /* Alter stack entry type so that gv() knows how to treat it */
1302 if (mode
== x86_64_mode_sse
) {
1303 if (reg_count
== 2) {
1305 gv(RC_FRET
); /* Use pair load into xmm0 & xmm1 */
1306 if (sse_reg
) { /* avoid redundant movaps %xmm0, %xmm0 */
1307 /* movaps %xmm0, %xmmN */
1309 o(0xc0 + (sse_reg
<< 3));
1310 /* movaps %xmm1, %xmmN */
1312 o(0xc1 + ((sse_reg
+1) << 3));
1315 assert(reg_count
== 1);
1317 /* Load directly to register */
1318 gv(RC_XMM0
<< sse_reg
);
1320 } else if (mode
== x86_64_mode_integer
) {
1322 /* XXX: implicit cast ? */
1323 gen_reg
-= reg_count
;
1325 int d
= arg_prepare_reg(gen_reg
);
1326 orex(1,d
,r
,0x89); /* mov */
1327 o(0xc0 + REG_VALUE(r
) * 8 + REG_VALUE(d
));
1328 if (reg_count
== 2) {
1329 d
= arg_prepare_reg(gen_reg
+1);
1330 orex(1,d
,vtop
->r2
,0x89); /* mov */
1331 o(0xc0 + REG_VALUE(vtop
->r2
) * 8 + REG_VALUE(d
));
1336 assert(gen_reg
== 0);
1337 assert(sse_reg
== 0);
1339 /* We shouldn't have many operands on the stack anymore, but the
1340 call address itself is still there, and it might be in %eax
1341 (or edx/ecx) currently, which the below writes would clobber.
1342 So evict all remaining operands here. */
1345 /* Copy R10 and R11 into RDX and RCX, respectively */
1346 if (nb_reg_args
> 2) {
1347 o(0xd2894c); /* mov %r10, %rdx */
1348 if (nb_reg_args
> 3) {
1349 o(0xd9894c); /* mov %r11, %rcx */
1353 oad(0xb8, nb_sse_args
< 8 ? nb_sse_args
: 8); /* mov nb_sse_args, %eax */
1361 #define FUNC_PROLOG_SIZE 11
1363 static void push_arg_reg(int i
) {
1365 gen_modrm64(0x89, arg_regs
[i
], VT_LOCAL
, NULL
, loc
);
1368 /* generate function prolog of type 't' */
1369 void gfunc_prolog(CType
*func_type
)
1372 int i
, addr
, align
, size
, reg_count
;
1373 int param_addr
= 0, reg_param_index
, sse_param_index
;
1377 sym
= func_type
->ref
;
1378 addr
= PTR_SIZE
* 2;
1380 ind
+= FUNC_PROLOG_SIZE
;
1381 func_sub_sp_offset
= ind
;
1384 if (func_type
->ref
->c
== FUNC_ELLIPSIS
) {
1385 int seen_reg_num
, seen_sse_num
, seen_stack_size
;
1386 seen_reg_num
= seen_sse_num
= 0;
1387 /* frame pointer and return address */
1388 seen_stack_size
= PTR_SIZE
* 2;
1389 /* count the number of seen parameters */
1390 sym
= func_type
->ref
;
1391 while ((sym
= sym
->next
) != NULL
) {
1393 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1397 seen_stack_size
= ((seen_stack_size
+ align
- 1) & -align
) + size
;
1400 case x86_64_mode_integer
:
1401 if (seen_reg_num
+ reg_count
<= 8) {
1402 seen_reg_num
+= reg_count
;
1409 case x86_64_mode_sse
:
1410 if (seen_sse_num
+ reg_count
<= 8) {
1411 seen_sse_num
+= reg_count
;
1421 /* movl $0x????????, -0x10(%rbp) */
1423 gen_le32(seen_reg_num
* 8);
1424 /* movl $0x????????, -0xc(%rbp) */
1426 gen_le32(seen_sse_num
* 16 + 48);
1427 /* movl $0x????????, -0x8(%rbp) */
1429 gen_le32(seen_stack_size
);
1431 /* save all register passing arguments */
1432 for (i
= 0; i
< 8; i
++) {
1434 o(0xd60f66); /* movq */
1435 gen_modrm(7 - i
, VT_LOCAL
, NULL
, loc
);
1436 /* movq $0, loc+8(%rbp) */
1441 for (i
= 0; i
< REGN
; i
++) {
1442 push_arg_reg(REGN
-1-i
);
1446 sym
= func_type
->ref
;
1447 reg_param_index
= 0;
1448 sse_param_index
= 0;
1450 /* if the function returns a structure, then add an
1451 implicit pointer parameter */
1452 func_vt
= sym
->type
;
1453 mode
= classify_x86_64_arg(&func_vt
, NULL
, &size
, &align
, ®_count
);
1454 if (mode
== x86_64_mode_memory
) {
1455 push_arg_reg(reg_param_index
);
1459 /* define parameters */
1460 while ((sym
= sym
->next
) != NULL
) {
1462 mode
= classify_x86_64_arg(type
, NULL
, &size
, &align
, ®_count
);
1464 case x86_64_mode_sse
:
1465 if (sse_param_index
+ reg_count
<= 8) {
1466 /* save arguments passed by register */
1467 loc
-= reg_count
* 8;
1469 for (i
= 0; i
< reg_count
; ++i
) {
1470 o(0xd60f66); /* movq */
1471 gen_modrm(sse_param_index
, VT_LOCAL
, NULL
, param_addr
+ i
*8);
1475 addr
= (addr
+ align
- 1) & -align
;
1478 sse_param_index
+= reg_count
;
1482 case x86_64_mode_memory
:
1483 case x86_64_mode_x87
:
1484 addr
= (addr
+ align
- 1) & -align
;
1489 case x86_64_mode_integer
: {
1490 if (reg_param_index
+ reg_count
<= REGN
) {
1491 /* save arguments passed by register */
1492 loc
-= reg_count
* 8;
1494 for (i
= 0; i
< reg_count
; ++i
) {
1495 gen_modrm64(0x89, arg_regs
[reg_param_index
], VT_LOCAL
, NULL
, param_addr
+ i
*8);
1499 addr
= (addr
+ align
- 1) & -align
;
1502 reg_param_index
+= reg_count
;
1506 default: break; /* nothing to be done for x86_64_mode_none */
1508 sym_push(sym
->v
& ~SYM_FIELD
, type
,
1509 VT_LOCAL
| VT_LVAL
, param_addr
);
1513 /* generate function epilog */
1514 void gfunc_epilog(void)
1518 o(0xc9); /* leave */
1519 if (func_ret_sub
== 0) {
1522 o(0xc2); /* ret n */
1524 g(func_ret_sub
>> 8);
1526 /* align local size to word & save local variables */
1527 v
= (-loc
+ 15) & -16;
1529 ind
= func_sub_sp_offset
- FUNC_PROLOG_SIZE
;
1530 o(0xe5894855); /* push %rbp, mov %rsp, %rbp */
1531 o(0xec8148); /* sub rsp, stacksize */
1538 /* generate a jump to a label */
1541 return psym(0xe9, t
);
1544 /* generate a jump to a fixed address */
1545 void gjmp_addr(int a
)
1553 oad(0xe9, a
- ind
- 5);
1557 /* generate a test. set 'inv' to invert test. Stack entry is popped */
1558 int gtst(int inv
, int t
)
1562 v
= vtop
->r
& VT_VALMASK
;
1564 /* fast case : can jump directly since flags are set */
1565 if (vtop
->c
.i
& 0x100)
1567 /* This was a float compare. If the parity flag is set
1568 the result was unordered. For anything except != this
1569 means false and we don't jump (anding both conditions).
1570 For != this means true (oring both).
1571 Take care about inverting the test. We need to jump
1572 to our target if the result was unordered and test wasn't NE,
1573 otherwise if unordered we don't want to jump. */
1574 vtop
->c
.i
&= ~0x100;
1575 if (!inv
== (vtop
->c
.i
!= TOK_NE
))
1576 o(0x067a); /* jp +6 */
1580 t
= psym(0x8a, t
); /* jp t */
1584 t
= psym((vtop
->c
.i
- 16) ^ inv
, t
);
1585 } else { /* VT_JMP || VT_JMPI */
1586 /* && or || optimization */
1587 if ((v
& 1) == inv
) {
1588 /* insert vtop->c jump list in t */
1591 p
= (int *)(cur_text_section
->data
+ *p
);
1603 /* generate an integer binary operation */
1604 void gen_opi(int op
)
1609 ll
= is64_type(vtop
[-1].type
.t
);
1610 uu
= (vtop
[-1].type
.t
& VT_UNSIGNED
) != 0;
1611 cc
= (vtop
->r
& (VT_VALMASK
| VT_LVAL
| VT_SYM
)) == VT_CONST
;
1615 case TOK_ADDC1
: /* add with carry generation */
1618 if (cc
&& (!ll
|| (int)vtop
->c
.ll
== vtop
->c
.ll
)) {
1625 /* XXX: generate inc and dec for smaller code ? */
1626 orex(ll
, r
, 0, 0x83);
1627 o(0xc0 | (opc
<< 3) | REG_VALUE(r
));
1630 orex(ll
, r
, 0, 0x81);
1631 oad(0xc0 | (opc
<< 3) | REG_VALUE(r
), c
);
1634 gv2(RC_INT
, RC_INT
);
1637 orex(ll
, r
, fr
, (opc
<< 3) | 0x01);
1638 o(0xc0 + REG_VALUE(r
) + REG_VALUE(fr
) * 8);
1641 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1647 case TOK_SUBC1
: /* sub with carry generation */
1650 case TOK_ADDC2
: /* add with carry use */
1653 case TOK_SUBC2
: /* sub with carry use */
1666 gv2(RC_INT
, RC_INT
);
1669 orex(ll
, fr
, r
, 0xaf0f); /* imul fr, r */
1670 o(0xc0 + REG_VALUE(fr
) + REG_VALUE(r
) * 8);
1682 opc
= 0xc0 | (opc
<< 3);
1688 orex(ll
, r
, 0, 0xc1); /* shl/shr/sar $xxx, r */
1689 o(opc
| REG_VALUE(r
));
1690 g(vtop
->c
.i
& (ll
? 63 : 31));
1692 /* we generate the shift in ecx */
1693 gv2(RC_INT
, RC_RCX
);
1695 orex(ll
, r
, 0, 0xd3); /* shl/shr/sar %cl, r */
1696 o(opc
| REG_VALUE(r
));
1709 /* first operand must be in eax */
1710 /* XXX: need better constraint for second operand */
1711 gv2(RC_RAX
, RC_RCX
);
1716 orex(ll
, 0, 0, uu
? 0xd231 : 0x99); /* xor %edx,%edx : cqto */
1717 orex(ll
, fr
, 0, 0xf7); /* div fr, %eax */
1718 o((uu
? 0xf0 : 0xf8) + REG_VALUE(fr
));
1719 if (op
== '%' || op
== TOK_UMOD
)
1731 void gen_opl(int op
)
1736 /* generate a floating point operation 'v = t1 op t2' instruction. The
1737 two operands are guaranted to have the same floating point type */
1738 /* XXX: need to use ST1 too */
1739 void gen_opf(int op
)
1741 int a
, ft
, fc
, swapped
, r
;
1743 (vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
? RC_ST0
: RC_FLOAT
;
1745 /* convert constants to memory references */
1746 if ((vtop
[-1].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
) {
1751 if ((vtop
[0].r
& (VT_VALMASK
| VT_LVAL
)) == VT_CONST
)
1754 /* must put at least one value in the floating point register */
1755 if ((vtop
[-1].r
& VT_LVAL
) &&
1756 (vtop
[0].r
& VT_LVAL
)) {
1762 /* swap the stack if needed so that t1 is the register and t2 is
1763 the memory reference */
1764 if (vtop
[-1].r
& VT_LVAL
) {
1768 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LDOUBLE
) {
1769 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1770 /* load on stack second operand */
1771 load(TREG_ST0
, vtop
);
1772 save_reg(TREG_RAX
); /* eax is used by FP comparison code */
1773 if (op
== TOK_GE
|| op
== TOK_GT
)
1775 else if (op
== TOK_EQ
|| op
== TOK_NE
)
1778 o(0xc9d9); /* fxch %st(1) */
1779 if (op
== TOK_EQ
|| op
== TOK_NE
)
1780 o(0xe9da); /* fucompp */
1782 o(0xd9de); /* fcompp */
1783 o(0xe0df); /* fnstsw %ax */
1785 o(0x45e480); /* and $0x45, %ah */
1786 o(0x40fC80); /* cmp $0x40, %ah */
1787 } else if (op
== TOK_NE
) {
1788 o(0x45e480); /* and $0x45, %ah */
1789 o(0x40f480); /* xor $0x40, %ah */
1791 } else if (op
== TOK_GE
|| op
== TOK_LE
) {
1792 o(0x05c4f6); /* test $0x05, %ah */
1795 o(0x45c4f6); /* test $0x45, %ah */
1802 /* no memory reference possible for long double operations */
1803 load(TREG_ST0
, vtop
);
1827 o(0xde); /* fxxxp %st, %st(1) */
1832 if (op
>= TOK_ULT
&& op
<= TOK_GT
) {
1833 /* if saved lvalue, then we must reload it */
1836 if ((r
& VT_VALMASK
) == VT_LLOCAL
) {
1838 r
= get_reg(RC_INT
);
1840 v1
.r
= VT_LOCAL
| VT_LVAL
;
1846 if (op
== TOK_EQ
|| op
== TOK_NE
) {
1849 if (op
== TOK_LE
|| op
== TOK_LT
)
1851 if (op
== TOK_LE
|| op
== TOK_GE
) {
1852 op
= 0x93; /* setae */
1854 op
= 0x97; /* seta */
1862 assert(!(vtop
[-1].r
& VT_LVAL
));
1864 if ((vtop
->type
.t
& VT_BTYPE
) == VT_DOUBLE
)
1866 if (op
== TOK_EQ
|| op
== TOK_NE
)
1867 o(0x2e0f); /* ucomisd */
1869 o(0x2f0f); /* comisd */
1871 if (vtop
->r
& VT_LVAL
) {
1872 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
1874 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
1879 vtop
->c
.i
= op
| 0x100;
1881 assert((vtop
->type
.t
& VT_BTYPE
) != VT_LDOUBLE
);
1899 assert((ft
& VT_BTYPE
) != VT_LDOUBLE
);
1902 /* if saved lvalue, then we must reload it */
1903 if ((vtop
->r
& VT_VALMASK
) == VT_LLOCAL
) {
1905 r
= get_reg(RC_INT
);
1907 v1
.r
= VT_LOCAL
| VT_LVAL
;
1913 assert(!(vtop
[-1].r
& VT_LVAL
));
1915 assert(vtop
->r
& VT_LVAL
);
1920 if ((ft
& VT_BTYPE
) == VT_DOUBLE
) {
1928 if (vtop
->r
& VT_LVAL
) {
1929 gen_modrm(vtop
[-1].r
, r
, vtop
->sym
, fc
);
1931 o(0xc0 + REG_VALUE(vtop
[0].r
) + REG_VALUE(vtop
[-1].r
)*8);
1939 /* convert integers to fp 't' type. Must handle 'int', 'unsigned int'
1940 and 'long long' cases. */
1941 void gen_cvt_itof(int t
)
1943 if ((t
& VT_BTYPE
) == VT_LDOUBLE
) {
1946 if ((vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1947 /* signed long long to float/double/long double (unsigned case
1948 is handled generically) */
1949 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
1950 o(0x242cdf); /* fildll (%rsp) */
1951 o(0x08c48348); /* add $8, %rsp */
1952 } else if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
1953 (VT_INT
| VT_UNSIGNED
)) {
1954 /* unsigned int to float/double/long double */
1955 o(0x6a); /* push $0 */
1957 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
1958 o(0x242cdf); /* fildll (%rsp) */
1959 o(0x10c48348); /* add $16, %rsp */
1961 /* int to float/double/long double */
1962 o(0x50 + (vtop
->r
& VT_VALMASK
)); /* push r */
1963 o(0x2404db); /* fildl (%rsp) */
1964 o(0x08c48348); /* add $8, %rsp */
1968 int r
= get_reg(RC_FLOAT
);
1970 o(0xf2 + ((t
& VT_BTYPE
) == VT_FLOAT
?1:0));
1971 if ((vtop
->type
.t
& (VT_BTYPE
| VT_UNSIGNED
)) ==
1972 (VT_INT
| VT_UNSIGNED
) ||
1973 (vtop
->type
.t
& VT_BTYPE
) == VT_LLONG
) {
1977 o(0xc0 + (vtop
->r
& VT_VALMASK
) + REG_VALUE(r
)*8); /* cvtsi2sd */
1982 /* convert from one floating point type to another */
1983 void gen_cvt_ftof(int t
)
1991 if (bt
== VT_FLOAT
) {
1993 if (tbt
== VT_DOUBLE
) {
1994 o(0x140f); /* unpcklps */
1995 o(0xc0 + REG_VALUE(vtop
->r
)*9);
1996 o(0x5a0f); /* cvtps2pd */
1997 o(0xc0 + REG_VALUE(vtop
->r
)*9);
1998 } else if (tbt
== VT_LDOUBLE
) {
2000 /* movss %xmm0,-0x10(%rsp) */
2002 o(0x44 + REG_VALUE(vtop
->r
)*8);
2004 o(0xf02444d9); /* flds -0x10(%rsp) */
2007 } else if (bt
== VT_DOUBLE
) {
2009 if (tbt
== VT_FLOAT
) {
2010 o(0x140f66); /* unpcklpd */
2011 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2012 o(0x5a0f66); /* cvtpd2ps */
2013 o(0xc0 + REG_VALUE(vtop
->r
)*9);
2014 } else if (tbt
== VT_LDOUBLE
) {
2016 /* movsd %xmm0,-0x10(%rsp) */
2018 o(0x44 + REG_VALUE(vtop
->r
)*8);
2020 o(0xf02444dd); /* fldl -0x10(%rsp) */
2026 r
= get_reg(RC_FLOAT
);
2027 if (tbt
== VT_DOUBLE
) {
2028 o(0xf0245cdd); /* fstpl -0x10(%rsp) */
2029 /* movsd -0x10(%rsp),%xmm0 */
2031 o(0x44 + REG_VALUE(r
)*8);
2034 } else if (tbt
== VT_FLOAT
) {
2035 o(0xf0245cd9); /* fstps -0x10(%rsp) */
2036 /* movss -0x10(%rsp),%xmm0 */
2038 o(0x44 + REG_VALUE(r
)*8);
2045 /* convert fp to int 't' type */
2046 void gen_cvt_ftoi(int t
)
2048 int ft
, bt
, size
, r
;
2051 if (bt
== VT_LDOUBLE
) {
2052 gen_cvt_ftof(VT_DOUBLE
);
2062 r
= get_reg(RC_INT
);
2063 if (bt
== VT_FLOAT
) {
2065 } else if (bt
== VT_DOUBLE
) {
2070 orex(size
== 8, r
, 0, 0x2c0f); /* cvttss2si or cvttsd2si */
2071 o(0xc0 + REG_VALUE(vtop
->r
) + REG_VALUE(r
)*8);
2075 /* computed goto support */
2082 /* Save the stack pointer onto the stack and return the location of its address */
2083 ST_FUNC
void gen_vla_sp_save(int addr
) {
2084 /* mov %rsp,addr(%rbp)*/
2085 gen_modrm64(0x89, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2088 /* Restore the SP from a location on the stack */
2089 ST_FUNC
void gen_vla_sp_restore(int addr
) {
2090 gen_modrm64(0x8b, TREG_RSP
, VT_LOCAL
, NULL
, addr
);
2093 /* Subtract from the stack pointer, and push the resulting value onto the stack */
2094 ST_FUNC
void gen_vla_alloc(CType
*type
, int align
) {
2095 #ifdef TCC_TARGET_PE
2096 /* alloca does more than just adjust %rsp on Windows */
2097 vpush_global_sym(&func_old_type
, TOK_alloca
);
2098 vswap(); /* Move alloca ref past allocation size */
2100 vset(type
, REG_IRET
, 0);
2103 r
= gv(RC_INT
); /* allocation size */
2106 o(0xe0 | REG_VALUE(r
));
2107 /* We align to 16 bytes rather than align */
2112 o(0xe0 | REG_VALUE(r
));
2119 /* end of x86-64 code generator */
2120 /*************************************************************/
2121 #endif /* ! TARGET_DEFS_ONLY */
2122 /******************************************************/